Did You Know...
...that Robert Adler has the dubious distinction of being the Father of the Couch Potato? Back in 1955 Adler was employed by what was then Zenith Radio Corp., where he was charged to invent something that would allow viewers to turn down the TV volume without leaving their chairs. After a series of flops (such as a wired contraption that people tripped over), Adler hit on the idea of using sound waves. Thus the Remote Control was born...
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8178941 | Semiconductor device In a semiconductor device having a pn-junction diode structure that includes anode diffusion region including edge area, anode electrode on anode diffusion region, and insulator film on edge area of anode diffusion region, the area of anode electrode above anode dif... | 05/15/2012 |
| 7999347 | Semiconductor device A semiconductor layer of a vertical diode is divided into a center region and a surrounding region. An anode electrode contacts a surface of the center region in the semiconductor layer. An insulation layer contacts a surface of the surrounding region in the semicon... | 08/16/2011 |
| 7977762 | Effective shield structure for improving substrate isolation of analog circuits from noisy digital circuits on a system-on-chip (SOC) An integrated circuit (IC) is disclosed to include a central area of the IC that is partitioned into a first section containing at least one digital circuit and a second section containing at least one analog circuit; and a guard strip (or shield) that is within the... | 07/12/2011 |
| 7911021 | Edge termination for semiconductor devices A high-voltage termination structure includes a peripheral voltage-spreading network. One or more trench structures are connected at least partly in series between first and second power supply voltages. The trench structures include first and second current-limitin... | 03/22/2011 |
| 7598587 | Semiconductor device A semiconductor layer of n− type is formed on a semiconductor substrate of p− type. A first buried impurity region of n+ type is formed at an interface between the semiconductor substrate and the semiconductor layer. A second bur... | 10/06/2009 |
| 7385273 | Power semiconductor device A power semiconductor device that includes a plurality of gate structure each having a gate insulation of a first thickness, and a termination region, the termination including a field insulation body surrounding the active region and having a recess that includes a... | 06/10/2008 |
| 7279757 | Double-sided extended drain field effect transistor A double-sided extended drain field effect transistor that includes a gate terminal overlying a channel region in a substrate. The substrate includes a drain region of a first carrier type that is laterally separated from the channel region by a first RESURF region ... | 10/09/2007 |
| 7247921 | Semiconductor apparatus and method of manufacturing same, and method of detecting defects in semiconductor apparatus A semiconductor apparatus includes a semiconductor substrate having a device region and a periphery region surrounding the device region; a semiconductor device provided in the device region of the semiconductor substrate; a first electrode pad provided on the semic... | 07/24/2007 |
| 7214627 | Graded junction termination extensions for electronic devices A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconducto... | 05/08/2007 |
| 7135718 | Diode device and transistor device A semiconductor device having improved breakdown voltage is provided. A diode device of the present invention includes relay diffusion layers provided between guard ring portions. Therefore, a depletion layer expanded outward from the guard ring portions except the ... | 11/14/2006 |
| 7071528 | Double-triggered silicon controlling rectifier and electrostatic discharge protection circuit thereof A double-triggered silicon controller rectifier (SCR) comprises a plurality of N+ diffusion areas, a plurality of P+ diffusion areas, a first N-well region, a second N-well region and a third N-well region formed in a P-substrate. The N+ diffusion areas and the P+ d... | 07/04/2006 |
| 7067883 | Lateral high-voltage junction device A lateral high-voltage junction device for over-voltage protection of an MOS circuit includes a substrate having a first junction region separated from a second junction region by a substrate region. An MOS gate electrode overlies the substrate region and is separat... | 06/27/2006 |
| 7049663 | ESD protection device with high voltage and negative voltage tolerance An electrostatic discharge protection device with high voltage and negative voltage tolerance is provided. The electrostatic discharge protection device comprises: a first type substrate; a first type well inside the first type substrate, the first type well being f... | 05/23/2006 |
| 7038280 | Integrated circuit bond pad structures and methods of making A bond pad structure for an integrated circuit includes first and second active devices formed in a substrate, first and second buses above the first and second active devices, respectively, a bond pad above the first and second buses, first interconnections between... | 05/02/2006 |
| 7033950 | Graded junction termination extensions for electronic devices A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconducto... | 04/25/2006 |
| 6943410 | High power vertical semiconductor device A vertical MOS semiconductor device exhibits a high breakdown voltage and low on-resistance, reduces the tradeoff relation between the on-resistance and the breakdown voltage, and realizes high speed switching. The semiconductor device has a breakdown-voltage sustai... | 09/13/2005 |
| 6940138 | Semiconductor device, semiconductor gate array, electro-optical device, and electronic equipment A structure is provided which suppresses a parasitic bipolar effect without decreasing the breakdown voltage at the junctions between the excessive carrier extracting region and source/drain regions of a MOS transistor for a voltage of approximately 15 volts in a se... | 09/06/2005 |
| 6879023 | Seal ring for integrated circuits The present invention is directed to a seal structure and a method for forming a seal structure for a semiconductor die. An elongate region which is electrically isolated from the remainder of the substrate, such as a well region of a conductivity type opposite that... | 04/12/2005 |
| 6818958 | Semiconductor device and process for its manufacture to increase threshold voltage stability The oxide atop a P pad below the gate electrode has a cut completely through the oxide atop the P pad to prevent the drift of contamination ions, such as sodium ions from the periphery of a MOSgated device to the periphery of the active area, thus stabilizing the de... | 11/16/2004 |
| 6815793 | Body of a semiconductor material with a reduced mean free path length A body (1) consisting of a doped semiconductor material with a pn junction (10) and an area (2) of reduced mean free path length (λr) for free charge carriers is disclosed. Said area (2) has sections (21, 22) which succeed each ot... | 11/09/2004 |
| 6787873 | Semiconductor device for providing a noise shield A first guard ring formed by high concentration ion diffusion is established around the transistor formation region of the semiconductor substrate. A second guard ring is established around the first guard ring with a prescribed gap therebetween. A metal film is for... | 09/07/2004 |
| 6788507 | Electrostatic discharge protection circuit An electrostatic discharge (ESD) protection circuit formed on a P-type substrate. The ESD protection circuit is disposed between a bonding pad and an internal circuit formed on a P-type substrate, and has a P-type metal-oxide semiconductor (PMOS) and an N-type metal... | 09/07/2004 |
| 6762456 | Multiple conductive plug structure including at least one conductive plug region and at least one between-conductive-plug region for lateral RF MOS devices A lateral RF MOS transistor with at least one conductive plug structure comprising: (1) a semiconductor material of a first conductivity type having a first dopant concentration and a top surface; (2) a conductive gate overlying and insulated from the top surface of... | 07/13/2004 |
| 6730947 | Semiconductor integrated circuit apparatus having an periphery impurity layer The present invention is characterized in comprising a semiconductor substrate, an embedded impurity layer of a first conductive type provided in the semiconductor substrate, a first impurity region of the first conductive type that becomes a first well region provi... | 05/04/2004 |
| 6661075 | Abrupt pn junction diode formed using chemical vapor deposition processing A pn junction diode (250) having its metallurgical junction of the oppositely-doped regions (254, 256) coincident with the surface WS of an electrically-doped wafer W and a method of forming such a diode. The method includes preparing (202) the wafer surf... | 12/09/2003 |
| 6621122 | Termination structure for superjunction device A termination structure for a superjunction device on which the net charge between P pylons in an N- termination region is intentionally unbalanced and is negative. The P pylons in the termination area are further non-uniformly located relative... | 09/16/2003 |
| 6603186 | Bipolar transistor with base drive circuit protection An n+ type emitter region and a p-type base region are formed in contact with one main surface of an n-type collector region, a p-type cathode region is formed in a ring shape in contact with the main surface so as to enclose the emitter region and the ba... | 08/05/2003 |
| 6476458 | Semiconductor device capable of enhancing a withstand voltage at a peripheral region around an element in comparison with a withstand voltage at the element A semiconductor device has an element region including MOS structure. A p-well region, a connecting impurity diffused region, and an impurity diffused region for guard ring are formed in an n-type semiconductor layer so as to form a well region, The well ... | 11/05/2002 |
| 6441455 | Low dosage field rings for high voltage semiconductor device The active area of a semiconductor die is surrounded by a plurality of concentrically spaced ring shaped P type diffusions. The diffusions have a low concentration produced by a total boron implant dose of from about 2E12 to 5E13 atoms/cm2. Fou... | 08/27/2002 |
| 6424014 | Semiconductor element with electric field reducing device mounted therein for increasing dielectric strength Expansion promotion means (24) for more efficiently promoting the expansion of the depletion layer (19) than the electrically insulating film(14) having a suppressor electrode layer (20) buried therein is arranged between narrow portions (23b) of the supp... | 07/23/2002 |
| 6369424 | Field effect transistor having high breakdown withstand capacity A field effect transistor having a high breakdown withstand capacity is provided. An active region 7a is surrounded by a fixed potential diffusion layer 16, and a channel region 15 is formed in the active region 7a. A gate pad 35 is provided outside the f... | 04/09/2002 |
| 6262466 | Lateral semiconductor structure for forming a temperature-compensated voltage limitation A lateral semiconductor structure having a punch-through diode for forming a temperature-compensated voltage limitation in which the space charge resistance is reduced through a lateral arrangement of preferably annular regions around a base trough. This ... | 07/17/2001 |
| 6242786 | SOI Semiconductor device with field shield electrode A field shield portion consisting of a kind of transistor is formed to electrically insulate an NMOS region of a memory cell from other regions. The field shield portion includes a field shield gate electrode layer, a p type region and a gate insulating f... | 06/05/2001 |
| 6215168 | Doubly graded junction termination extension for edge passivation of semiconductor devices A silicon semiconductor die comprises a heavily doped silicon substrate and an upper layer comprising doped silicon of a first conductivity type disposed on the substrate. The upper layer includes an active region that comprises a well region of a second,... | 04/10/2001 |
| 6198126 | Semiconductor device and power converter using same A high voltage semiconductor device is provided with a p layer which forms a main pn-junction, a plurality of p layers which surround the p layer in a ring form, a ring-like n+ layer which further surrounds those p layers, forward field plates extending i... | 03/06/2001 |
| 6177713 | Free wheel diode for preventing destruction of a field limiting innermost circumferential layer An anode electrode metal layer composed of aluminum is formed in a region on the inner side than an anode layer formed on a main surface of a semiconductor substrate. Thus, an impurity diffusion region from the innermost circumferential surface of said su... | 01/23/2001 |
| 6177712 | Schottky barrier diode having a guard ring structure A Schottky barrier diode is provided which has a substrate including a first-conductivity-type low concentration layer and a first-conductivity-type high concentration layer, and a guard ring region, comprising a second-conductivity-type diffusion layer h... | 01/23/2001 |
| 6140690 | Semiconductor device Two bipolar transistors formed on a common semiconductor substrate are separated by a separation band. The separation band includes a first separation portion having the same conductivity type, and substantially the same impurity concentration and diffusi... | 10/31/2000 |
| 6104060 | Cost savings for manufacturing planar MOSFET devices achieved by implementing an improved device structure and fabrication process eliminating passivation layer and/or field plate Improved power MOSFET structure, and fabrication process are disclosed in this invention to achieve cost savings by simplified device structure and fabrication processes, and also by reducing the required die size. Specifically, in a novel MOSFET device, ... | 08/15/2000 |
| 6037631 | Semiconductor component with a high-voltage endurance edge structure A semiconductor component having a high-voltage endurance edge structure in which a multiplicity of parallel-connected individual components are disposed in a multiplicity of cells of a cell array. In an edge region, the semiconductor component has cells ... | 03/14/2000 |
