Did You Know...
...that two musicians were responsible for the invention of color print film? Fascinated by photography, Leopold Godowsky and Leopold Mannes worked together to produce an easy-to-use, practical color film. They worked full time as music teachers and gave concerts while experimenting during their off hours in Mannes' kitchen. Their success earned them full-time, well-paying jobs at Kodak and their efforts resulted in Kodachrome film, which was introduced in 1935.
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| Number | Title | Issue Date |
| 8143678 | Thin film transistors having multi-layer channel A transistor may include: a gate insulting layer; a gate electrode formed on the gate insulating layer; a channel layer formed on the gate insulating layer; and source and drain electrodes that contact the channel layer. The channel layer may have a double-layer str... | 03/27/2012 |
| 7944003 | Asymmetric channel doping for improved memory operation for floating body cell (FBC) memory An improved dynamic memory cell using a semiconductor fin or body is described. Asymmetrical doping is used in the channel region, with more dopant under the back gate to improve retention without significantly increasing read voltage. ... | 05/17/2011 |
| 7687868 | Structure for TFT-LCD A structure for a thin film transistor LCD includes a data line extending in a first direction; a source electrode protruded for a predetermined length from the data line; a gate electrode in a second direction so as to be overlapped with a portion of the source ele... | 03/30/2010 |
| 7675126 | Metal oxide semiconductor field effect transistor and method of fabricating the same There are provided a MOSFET and a method for fabricating the same. The MOSFET includes a semiconductor substrate, a first epitaxial layer in a predetermined location of the semiconductor substrate, a second epitaxial layer doped with high concentration impurity ions... | 03/09/2010 |
| 7671425 | Semiconductor device and method of manufacturing the same In a semiconductor device, pining regions 105 are disposed along the junction portion of a drain region 102 and a channel forming region 106 locally in a channel width direction. With this structure, because the spread of a depletion layer from ... | 03/02/2010 |
| 7646071 | Asymmetric channel doping for improved memory operation for floating body cell (FBC) memory An improved dynamic memory cell using a semiconductor fin or body is described. Asymmetrical doping is used in the channel region, with more dopant under the back gate to improve retention without significantly increasing read voltage. ... | 01/12/2010 |
| 7355226 | Power semiconductor and method of fabrication This invention is generally concerned with power semiconductors such as power MOS transistors, insulated gate by bipolar transistors (IGBTs), high voltage diodes and the like, and method for their fabrication. A power semiconductor, the semiconductor comprising a po... | 04/08/2008 |
| 7301208 | Semiconductor device and method for fabricating the same A first doped layer of a conductivity type opposite to that of source/drain regions is formed in a semiconductor substrate under a gate electrode. A second doped layer of the conductivity type opposite to that of the source/drain regions is formed in the semiconduct... | 11/27/2007 |
| 7301197 | Non-volatile nanocrystal memory transistors using low voltage impact ionization A low voltage non-volatile charge storage transistor has a nanocrystal layer for permanently storing charge until erased. A subsurface charge injector generates secondary carriers by stimulating electron-hole current flowing toward the substrate, with some carriers ... | 11/27/2007 |
| 7274048 | Substrate based ESD network protection for a flip chip In accordance with the objectives of the invention a new arrangement is provided for ESD protection of mounted flip chips. In a first embodiment of the invention, the Input/Output cells and power cells are provided with ESD protection that is connected to a dedicate... | 09/25/2007 |
| 7271457 | Abrupt channel doping profile for fermi threshold field effect transistors A Fermi threshold voltage FET has Germanium implanted to form a shallow abrupt transition between the semiconductor substrate dopant type, or well dopant type, and a counter doping layer of opposite type closely adjacent the surface of the semiconductor substrate. G... | 09/18/2007 |
| 7256459 | Floating body-type DRAM cell with increased capacitance A semiconductor memory device includes transistors, each including a first-conductivity-type semiconductor layer formed on a semiconductor substrate via a first insulating film, a second-conductivity-type source/drain regions formed in the semiconductor layer, a fir... | 08/14/2007 |
| 7247532 | High voltage transistor and method for fabricating the same A high voltage transistor operating through a high voltage and a method for fabricating the same are provided. The high voltage transistor includes: an insulation layer on a substrate; an N+-type drain junction region on the insulation layer; an N−... | 07/24/2007 |
| 7224023 | Semiconductor device and method of manufacturing thereof This invention is characterized in that, a gate electrode 27F formed on a P-type well 3 via a gate oxide film 9, a high-concentration N-type source layer and a high-concentration N-type drain layer 15 respectively formed apart from the ga... | 05/29/2007 |
| 7184315 | NROM flash memory with self-aligned structural charge separation A nitride read only memory (NROM) cell has a nitride layer that is not located under the center of the transistor. The gate insulator layer, with the nitride layer, is comprised of two sections that each have structurally defined and separated charge trapping region... | 02/27/2007 |
| 7170117 | Image sensor with improved dynamic range and method of formation Embodiments of the invention provide an image sensor having an improved dynamic range. A pixel cell comprises at least one transistor structure. The transistor structure comprises at least one semiconductor channel region, at least one gate for controlling the chann... | 01/30/2007 |
| 7129544 | Vertical compound semiconductor field effect transistor structure In one embodiment, a compound semiconductor vertical FET device (11) includes a first trench (29) formed in a body of semiconductor material (13), and a second trench (34) formed within the first trench (29) to define a channel reg... | 10/31/2006 |
| 7101751 | Versatile system for limiting electric field degradation of semiconductor structures The present invention provides a system for limiting degradation of a first semiconductor structure (304) caused by an electric field (314), generated from within the semiconductor substrate (302) by high voltage on a second semiconductor struct... | 09/05/2006 |
| 7091072 | Semiconductor device and method for manufacturing the same Provided are a semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes an isolation insulating film, an epitaxial silicon layer, a junction blocking insulating film, a gate stack, and source and drain junctions... | 08/15/2006 |
| 7078776 | Low threshold voltage semiconductor device A semiconductor device has a first semiconductor region formed in a semiconductor substrate and having a first conductivity type due to first-conductivity-type active impurities contained in the first semiconductor region, and a second semiconductor region formed be... | 07/18/2006 |
| 7061058 | Forming a retrograde well in a transistor to enhance performance of the transistor A method of forming a retrograde well in a transistor is provided. A transistor structure having a substrate, a gate, and a gate oxide layer between the substrate and the gate is formed. The substrate includes a channel region located generally below the gate. A fir... | 06/13/2006 |
| 7057238 | Semiconductor device and method for fabricating the same A semiconductor device and a method for fabricating the same are provided. The provided semiconductor device includes a field oxide layer formed in a semiconductor substrate to define an active region; gate structures formed on the active region; source/drain juncti... | 06/06/2006 |
| 7053450 | Semiconductor device and method for fabricating the same A MISFET in a semiconductor device has a gate insulating film provided on a substrate, a gate electrode provided on the gate insulating film, sidewalls provided on the side surfaces of the gate electrode, lightly doped diffusion layers provided in the respective reg... | 05/30/2006 |
| 7045860 | Semiconductor device and manufacturing method thereof The semiconductor device of this invention has a P type well region formed inside a P type semiconductor substrate, on which at least three gate insulating films each having a different thickness are formed. Also, the device has the gate electrode formed extending o... | 05/16/2006 |
| 7042046 | Super-junction semiconductor device and method of manufacturing the same Disclosed is a semiconductor device facilitating a peripheral portion thereof with a breakdown voltage higher than the breakdown voltage in the drain drift layer without employing a guard ring or field plate. A preferred embodiment includes a drain drift region with... | 05/09/2006 |
| 7023060 | Methods for programming read-only memory cells and associated memories A method for programming a read-only memory cell including a transistor whose source and drain, which have a second type of doping, are formed in a semiconductor substrate with a first type of doping, includes a step of carrying out a contradoping in a region of the... | 04/04/2006 |
| 7019379 | Semiconductor device comprising voltage regulator element A semiconductor device includes a heavily doped layer 25 of p-type formed in the surface of an n-type well 21, an intermediately doped layer 26 of p-type formed to adjoin and surround the heavily p-doped layer 25, and an isolation region ... | 03/28/2006 |
| 7015546 | Deterministically doped field-effect devices and methods of making same Deterministically doped field-effect devices and methods of making same. One or more dopant atoms, also referred to as impurities or impurity atoms, are arranged in the channel region of a device in engineered arrays. Component atoms of an engineered array are subst... | 03/21/2006 |
| 7009248 | Semiconductor device with asymmetric pocket implants A semiconductor device (1) has a source (2) a gate (3) and a drain (4), a single deep-pocket ion implant (8) in a source-drain depletion region, and a single shallow-pocket ion implant (9) in the source-drain depletion regio... | 03/07/2006 |
| 7002205 | Super-junction semiconductor device and method of manufacturing the same Disclosed is a semiconductor device facilitating a peripheral portion thereof with a breakdown voltage higher than the breakdown voltage in the drain drift layer without employing a guard ring or field plate. A preferred embodiment includes a drain drift region with... | 02/21/2006 |
| 6975004 | Semiconductor component with optimized current density A cellularly constructed semiconductor component has a connection electrode, which contact-connects some of the cells, and a connection line, which contact-connects the connection electrode. In which case, in a region at a distance from a connection contact between ... | 12/13/2005 |
| 6951793 | Low-temperature polysilicon thin film transistor having buried LDD structure and process for producing same A low-temperature polysilicon thin film transistor having a buried LDD structure is provided. Two heavily doped regions are formed in a semiconductor layer and distributed just below a surface of the semiconductor layer. Two LDD regions are both sandwiched between t... | 10/04/2005 |
| 6919600 | Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact A permanently-ON MOS transistor comprises silicon source and drain regions of a first conductivity type in a silicon well region of a second conductivity type. A silicon contact region of the first conductivity types is buried in the well region, said contact region... | 07/19/2005 |
| 6873053 | Semiconductor device with smoothed pad portion A semiconductor forming transistors on a semiconductor substrate includes a low concentration source/drain region formed in the semiconductor substrate, a high concentration source/drain region formed in the source/drain region, a gate electrode formed on the substr... | 03/29/2005 |
| 6873008 | Asymmetrical devices for short gate length performance with disposable sidewall An asymmetrical channel implant from source to drain improves short channel characteristics. The implant provides a relatively high VT net dopant adjacent to the source region and a relatively low VT net dopant in the remainder of the channel r... | 03/29/2005 |
| 6867472 | Reduced hot carrier induced parasitic sidewall device activation in isolated buried channel devices by conductive buried channel depth optimization A semiconductor device includes a transistor junction formed in a substrate adjacent to an isolation region. A region between the transistor junction and the isolation region includes an area susceptible to hot carrier effects. The transistor junction extends from a... | 03/15/2005 |
| 6864507 | MISFET P-type active region 12; n-type source/drain regions 13a and 13b; gate insulating film 14 made of a thermal oxide film; gate electrode 15; source/drain electrodes 16a and 16b, are provided ... | 03/08/2005 |
| 6828605 | Field-effect-controlled semiconductor component and method of fabricating a doping layer in a vertically configured semiconductor component A field-effect-controllable semiconductor component has at least one source zone and at least one drain zone of a first conductivity type, and at least one body zone of a second conductivity type. The body zone is provided between the source zone and the drain zone.... | 12/07/2004 |
| 6815766 | Semiconductor device with alternating conductivity type layer and method of manufacturing the same A semiconductor device has an alternating conductivity type layer that improves the tradeoff relation between the ON-resistance and the breakdown voltage and a method of manufacturing such a semiconductor device. The alternating conductivity type layer is formed of ... | 11/09/2004 |
| 6800909 | Semiconductor device and method of manufacturing the same There are provided a gate electrode formed on a semiconductor substrate of one conductivity type via a gate insulating film, ion-implantation controlling films formed on both side surfaces of the gate electrode and having a space between the gate electrode and an up... | 10/05/2004 |
