Did You Know...
...that it was melting ice cream that inspired the invention of the outboard motor? It was a lovely August day and Ole Evinrude was rowing his boat to his favorite island picnic spot. As he rowed, he watched his ice cream melt and wished he had a faster way to get to the island. At that moment the idea for the outboard motor was born!
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8188553 | Semiconductor device and method for making the same In a MOS-type semiconductor device in which, on a Si substrate (201), a SiGe layer (202) having a valence band edge energy value smaller than a valence band edge energy value of the first semiconductor layer and a mobility larger than a mobility of the... | 05/29/2012 |
| 8169039 | Semiconductor device A disclosed semiconductor device includes an MOS transistor having an N-type low-concentration drain region, a source region, an ohmic drain region, a P-type channel region, an ohmic channel region, a gate isolation film, and a gate electrode. The N-type low-concent... | 05/01/2012 |
| 8022487 | Increasing body dopant uniformity in multi-gate transistor devices Techniques and structures for increasing body dopant uniformity in multi-gate transistor devices are generally described. In one example, an electronic device includes a semiconductor substrate, a multi-gate fin coupled with the semiconductor substrate, the multi-ga... | 09/20/2011 |
| 8022486 | CMOS semiconductor device A semiconductor device includes a semiconductor substrate, and a p-channel MOS transistor provided on the semiconductor substrate, the p-channel MOS transistor comprising a first gate dielectric film including Hf, a second gate dielectric film provided on the first ... | 09/20/2011 |
| 7989899 | Transistor, inverter including the same and methods of manufacturing transistor and inverter A transistor, an inverter including the transistor, and methods of manufacturing the inverter and the transistor. A gate insulating layer of the transistor has a charge trap region. A threshold voltage may be moved in a positive (+) direction by trapping charges in ... | 08/02/2011 |
| 7964921 | MOSFET and production method of semiconductor device To provide a MOSFET which is increased in substrate bias effect γ without increasing parasitic capacitance and junction leak current, the MOSFET includes: a gate electrode (104) formed on a semiconductor substrate (101) and an insulating film (103 | 06/21/2011 |
| 7893507 | Metal oxide semiconductor (MOS) transistors with increased break down voltages and methods of making the same A transistor comprises a substrate of a first conductivity type, a drain region and a source region of a second conductivity type, a gate, a gate oxide layer, an adjustment implant region of the first conductivity type and a planar junction. The drain region and the... | 02/22/2011 |
| 7843018 | Transistor providing different threshold voltages and method of fabrication thereof A transistor includes a channel region with a first portion and a second portion. A length of the first portion is smaller than a length of the second portion. The first portion has a higher threshold voltage than the second portion. The lower threshold voltage of t... | 11/30/2010 |
| 7795691 | Semiconductor transistor with P type re-grown channel layer The invention is a device for controlling conduction across a semiconductor body with a P type channel layer between active semiconductor regions of the device and the controlling gate contact. The device, often a MOSFET or an IGBT, includes at least one source, wel... | 09/14/2010 |
| 7705409 | High voltage transistors Some embodiments of the present invention provide high voltage transistors including a semiconductor substrate and a device isolation film defining an active region in the semiconductor substrate. A gate electrode extends along a central portion of the active region... | 04/27/2010 |
| 7683439 | Semiconductor device having a metal carbide gate with an electropositive element and a method of making the same A semiconductor device structure is formed over a semiconductor substrate and has a gate dielectric over the semiconductor substrate and a gate over the gate dielectric. The gate, at an interface with the gate dielectric, comprises a transition metal, carbon, and an... | 03/23/2010 |
| 7655990 | Voltage-clipping device with high breakdown voltage The present invention proposes a voltage-clipping device utilizing a pinch-off mechanism formed by two depletion boundaries. A clipping voltage of the voltage-clipping device can be adjusted in response to a gate voltage; a gap of a quasi-linked well; and a doping c... | 02/02/2010 |
| 7619288 | Thin film transistor substrate, liquid crystal display device provided with such thin film transistor substrate and method for manufacturing thin film transistor substrate A method for manufacturing a thin film transistor substrate includes a step of forming a plurality of island-like semiconductor films above an insulating transparent substrate; a step of forming a gate insulating film on each of the island-like semiconductor films; ... | 11/17/2009 |
| 7569901 | P channel radhard device with boron diffused P-type polysilicon gate A MOS gated device is resistant to both high radiation and SEE environments. Spaced, N-type body regions are formed in the surface of a P-type substrate of a semiconductor wafer. P-type dopants are introduced into the surface within each of the channel regions to fo... | 08/04/2009 |
| 7564106 | Semiconductor device comprising gate electrode A semiconductor device capable of reducing a threshold voltage is obtained. The semiconductor device includes a pair of source/drain regions formed on the main surface of a semiconductor region to hold a channel region therebetween, and a gate electrode formed on th... | 07/21/2009 |
| 7442971 | Self-biasing transistor structure and an SRAM cell having less than six transistors By providing a self-biasing semiconductor switch, an SRAM cell having a reduced number of individual active components may be realized. In particular embodiments, the self-biasing semiconductor device may be provided in the form of a double channel field effect tran... | 10/28/2008 |
| 7432542 | Semiconductor device with electrostrictive layer in semiconductor layer and method of manufacturing the same A semiconductor device includes a first semiconductor layer, and a first insulated-gate field-effect transistor of a first conductivity type that is provided in a major surface region of the first semiconductor layer. The semiconductor device further includes an ele... | 10/07/2008 |
| 7427791 | Method of forming a CMOS structure having gate insulation films of different thicknesses The semiconductor integrated circuit device employs on the same silicon substrate a plurality of kinds of MOS transistors with different magnitudes of tunnel current flowing either between the source and gate or between the drain and gate thereof. These MOS transist... | 09/23/2008 |
| 7368980 | Producing reference voltages using transistors An exemplary circuit embodiment includes a depletion-mode transistor and an enhancement-mode transistor. The circuit also includes a circuit portion coupled to a gate region of the depletion-mode transistor and to a gate region of the enhancement-mode transistor. In... | 05/06/2008 |
| 7355249 | Silicon-on-insulator based radiation detection device and method Structures and a method for detecting ionizing radiation using silicon-on-insulator (SOI) technology are disclosed. In one embodiment, the invention includes a substrate having a buried insulator layer formed over the substrate and an active layer formed over the bu... | 04/08/2008 |
| 7348629 | Metal gated ultra short MOSFET devices MOSFET devices suitable for operation at gate lengths less than about 40 nm, and methods of their fabrication is being presented. The MOSFET devices include a ground plane formed of a monocrystalline Si based material. A Si based body layer is epitaxially disposed o... | 03/25/2008 |
| 7338898 | MOS transistor and fabrication thereof A method for fabricating a MOS transistor is described. A gate dielectric layer, a first barrier layer, an interlayer, a work-function-dominating layer, a second barrier layer and a poly-Si layer are sequentially formed on a substrate. The interlayer is capable of a... | 03/04/2008 |
| 7339235 | Semiconductor device having SOI structure and manufacturing method thereof A fine semiconductor device having a short channel length while suppressing a short channel effect. Linearly patterned or dot-patterned impurity regions 104 are formed in a channel forming region 103 so as to be generally parallel with the channel dire... | 03/04/2008 |
| 7332770 | Semiconductor device A semiconductor device of this invention is a vertical power MOSFET having a plurality of first trenches where a trench gate is formed. It has a first column region of a second conductivity type placed beneath the first trenches and formed vertically in an epitaxial... | 02/19/2008 |
| 7332954 | Eased gate voltage restriction via body-bias voltage governor An arrangement, to ease restriction upon gate voltage (Vgg) magnitudes for a dynamic threshold MOS (DTMOS) transistor, may include: an MOS transistor including a gate and a body; and a body-bias-voltage (Vbb) governor (Vbb-governor) circuit to provide a governed ver... | 02/19/2008 |
| 7315060 | Semiconductor storage device, manufacturing method therefor and portable electronic equipment A semiconductor storage device has a single gate electrode formed on a semiconductor substrate through a gate insulation film. First and second memory function bodies formed on both sides of the gate electrode. A P-type channel region is formed in a surface of the s... | 01/01/2008 |
| 7297996 | Semiconductor memory device for storing data in memory cells as complementary information A twin-cell type semiconductor memory device in which the area of a chip can be reduced. In the twin-cell type semiconductor memory device for storing data in at least one pair of memory cells as complementary information, memory cells are arranged at each of a plur... | 11/20/2007 |
| 7282768 | MOS field-effect transistor A high-reliable depletion-type MOS field-effect transistor as a process monitor is provided. A diode formed in polycrystalline silicon and a diode formed in a semiconductor substrate form a bi-directional diode. The bi-directional diode connects a gate electrode wit... | 10/16/2007 |
| 7282941 | Method of measuring semiconductor wafers with an oxide enhanced probe A method of measuring at least one electrical property of a semiconductor wafer includes providing an elastically deformable and electrically conductive contact having an insulative oxide layer formed on an exterior surface thereof by a controlled oxidation process,... | 10/16/2007 |
| 7274076 | Threshold voltage adjustment for long channel transistors A threshold voltage adjusted long-channel transistor fabricated according to short-channel transistor processes is described. The threshold-adjusted transistor includes a substrate with spaced-apart source and drain regions formed in the substrate and a channel regi... | 09/25/2007 |
| 7265421 | Insulated-gate field-effect thin film transistors A new Insulated-Gate Field-Effect Thin Film Transistor (Gated-FET) is disclosed. A semiconductor thin film Gated-FET device, comprising: a lightly doped resistive channel region formed on a semiconductor thin film layer, the thickness of the channel comprising the e... | 09/04/2007 |
| 7242055 | Nitrogen-containing field effect transistor gate stack containing a threshold voltage control layer formed via deposition of a metal oxide A semiconductor structure is provided that includes a Vt stabilization layer between a gate dielectric and a gate electrode. The Vt stabilization layer is capable of stabilizing the structure's threshold voltage and flatband voltage to a target... | 07/10/2007 |
| 7242063 | Symmetric non-intrusive and covert technique to render a transistor permanently non-operable A technique for and structures for camouflaging an integrated circuit structure. The technique including forming active areas of a first conductivity type and LDD regions of a second conductivity type resulting in a transistor that is always non-operational when sta... | 07/10/2007 |
| 7224023 | Semiconductor device and method of manufacturing thereof This invention is characterized in that, a gate electrode 27F formed on a P-type well 3 via a gate oxide film 9, a high-concentration N-type source layer and a high-concentration N-type drain layer 15 respectively formed apart from the ga... | 05/29/2007 |
| 7224205 | Apparatus and method for improving drive-strength and leakage of deep submicron MOS transistors An apparatus and method for manufacturing metal-oxide semiconductor (MOS) transistors that are operable at voltages below 1.5V, which MOS transistors are area efficient, and where the drive strength and leakage current of the MOS transistors is improved. The inventi... | 05/29/2007 |
| 7217977 | Covert transformation of transistor properties as a circuit protection method A technique for and structures for camouflaging an integrated circuit structure. The technique includes the use of a light density dopant (LDD) region of opposite type from the active regions resulting in a transistor that is always off when standard voltages are ap... | 05/15/2007 |
| 7205610 | Source follower circuit or bootstrap circuit, driver circuit comprising such circuit, and display device comprising such driver circuit In the case of using an analog buffer circuit, an input voltage is required to be added a voltage equal to a voltage between the gate and source of a polycrystalline silicon TFT; therefore, a power supply voltage is increased, thus a power consumption is increased w... | 04/17/2007 |
| 7205619 | Method of producing semiconductor device and semiconductor device A semiconductor device able to secure electrical effective thicknesses required for insulating films of electronic circuit elements by using depletion of electrodes of the electronic circuit elements even if the physical thicknesses of the insulating films are not d... | 04/17/2007 |
| 7199000 | Method for manufacturing semiconductor device Several a transistor, which are inhibited short channel effect moderately according to each transistor's channel length, are formed on a same SOI substrate. In the present invention, forming a first transistor on SOI substrate, and forming a second transistor... | 04/03/2007 |
| 7192836 | Method and system for providing halo implant to a semiconductor device with minimal impact to the junction capacitance A method and system for providing a halo implant to a semiconductor device is disclosed. The method and system includes providing a thin photoresist layer that covers a substantial amount of an active area including a source region and a drain region of the semicond... | 03/20/2007 |
