Class 257/401 - With specified physical layout (e.g., ring gate, source/drain regions shared between plural FETs, plural sections connected in parallel to form power MOSFET)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: Subject matter wherein the device has a specific physical
No. of patents: 1694
Last issue date: 05/29/2012

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Number	Title	Issue Date
8188551	Semiconductor devices and methods of manufacture thereof Semiconductor devices and methods of manufacture thereof are disclosed. A complimentary metal oxide semiconductor (CMOS) device includes a PMOS transistor having at least two first gate electrodes comprising a first parameter, and an NMOS transistor having at least ...	05/29/2012
8188552	Transistor structure A dynamic random access memory structure is disclosed, in which, the active area is a donut-type pillar at which a novel vertical transistor is disposed and has a gate filled in the central cavity of the pillar and upper and lower sources/drains located in the upper...	05/29/2012
8183646	Field effect transistor with narrow bandgap source and drain regions and method of fabrication A transistor having a narrow bandgap semiconductor source/drain region is described. The transistor includes a gate electrode formed on a gate dielectric layer formed on a silicon layer. A pair of source/drain regions are formed on opposite sides of the gate electro...	05/22/2012
8178933	Semiconductor device A semiconductor device including first and second transistors, each of the first and second transistors being formed with a plurality of fin transistors, and the first and second transistors being connected in parallel to electrically share a source, wherein the plu...	05/15/2012
8169038	Semiconductor device and method of manufacturing the same A semiconductor device and a method of manufacturing the same are disclosed. The method includes forming ion impurity regions of a first conductivity type by forming a trench in a semiconductor substrate and implanting impurity ions into a lower portion of the trenc...	05/01/2012
8154088	Semiconductor topography and method for reducing gate induced drain leakage (GIDL) in MOS transistors Improved semiconductor topographies and methods are provided herein for reducing the gate induced drain leakage (GIDL) associated with MOS transistors. In particular, a disposable spacer layer is used as an additional mask during implantation of one or more source/d...	04/10/2012
8154089	Semiconductor device A semiconductor device according to one embodiment includes: a substrate; a plurality of fins made of a semiconductor and formed on the substrate; a plurality of via contact regions formed between the fins, the plurality of via contact regions and the plurality of t...	04/10/2012
8148786	Complementary metal oxide semiconductor integrated circuit using raised source drain and replacement metal gate A complementary metal oxide semiconductor integrated circuit may be formed with a PMOS device formed using a replacement metal gate and a raised source drain. The raised source drain may be formed of epitaxially deposited silicon germanium material that is doped p-t...	04/03/2012
8138557	Layout structure of MOSFET and layout method thereof A layout structure of a MOSFET is provided. The layout structure of the MOSFET includes a plurality of MOSFET cells, a first source/drain metal bus structure and a second source/drain metal bus structure. The first source/drain metal bus structure is electrically co...	03/20/2012
8138556	Pre-released structure device A pre-released structure device comprising: at least one first stacking, comprising at least one first layer based on at least one first material, arranged against a second stacking comprising at least one second layer based on at ...	03/20/2012
8138558	Semiconductor device and method of forming low voltage MOSFET for portable electronic devices and data processing centers A semiconductor device has a well region formed within a substrate. A gate structure is formed over a surface of the substrate. A source region is formed within the substrate adjacent to the gate structure. A drain region is formed within the substrate adjacent to t...	03/20/2012
8136070	Shallow trench isolation dummy pattern and layout method using the same A dummy cell pattern for shallow trench isolation (STI). Active and shallow trench isolation areas are bounded by a circumference. An active area pattern completely overlaps the active area and a first polysilicon pattern in the shallow trench isolation area is outs...	03/13/2012
8129800	Gate-all-around integrated circuit devices Gate-all-around integrated circuit devices include first and second source/drain regions on an active area of an integrated circuit substrate. The first and second source/drain regions form p-n rectifying junctions with the active area. A channel region extends betw...	03/06/2012
8120122	Self-aligned masks using multi-temperature phase-change materials A method of forming a pattern includes forming a first layer on a substrate, forming a second layer on the first layer, depositing a multi-temperature phase-change material on the second layer, patterning the second layer using the multi-temperature phase-change mat...	02/21/2012
8120123	Semiconductor device and method of forming the same A semiconductor device, and a method of forming the same, includes forming a cell bit line pattern and a peripheral gate pattern on a semiconductor substrate. The cell bit line pattern may be formed on an inactive region adjacent to a cell active region of the semic...	02/21/2012
8115260	Wafer level stack die package This document discusses, among other things, an IC package including first and a second discrete components fabricated into a semiconductor substrate. The first and second discrete components can be adjacent to one another in the semiconductor substrate, and an inte...	02/14/2012
8106464	Semiconductor device having bar type active pattern A semiconductor device having a bar type active pattern and a method of manufacturing the same are provided. The semiconductor device may include a semiconductor substrate having a semiconductor fin configured to protrude from a surface of the semiconductor substrat...	01/31/2012
8102012	Transistor component having a shielding structure A transistor component having a shielding structure. One embodiment provides a source terminal, a drain terminal and control terminal. A source zone of a first conductivity type is connected to the source terminal. A drain zone of the first conductivity type is conn...	01/24/2012
8076734	Semiconductor structure including self-aligned deposited gate dielectric A semiconductor structure, such as a field effect device structure, and more particularly a CMOS structure, includes a gate dielectric that is at least in-part aligned to an active region of a semiconductor substrate over which is located the gate dielectric. The ga...	12/13/2011
8076733	Flat panel display device having an organic thin film transistor and method of manufacturing the same Provided are an organic TFT that reduces contact resistance between a source and drain electrode and an organic semiconductor layer and that can be easily manufactured, a flat panel display device having the organic TFT, and methods of manufacturing the organic TFT ...	12/13/2011
8067808	Apparatus of memory array using FinFETs A memory cell includes a FinFET select device and a memory element. In some embodiments a memory cell has a contact element coupled between a surface of the fin and the memory element. ...	11/29/2011
8063451	Self-aligned nano field-effect transistor and its fabrication Our invention discloses a self-aligned-gate structure for nano FET and its fabrication method. One dimension semiconductor material is used as conductive channel, whose two terminals are source and drain electrodes. Gate dielectric grown by ALD covers the area betwe...	11/22/2011
8058694	Semiconductor device In a semiconductor device, such as a MOSFET or the like, which is a high-frequency LSI achieving a low noise figure and a high maximum oscillation frequency and which has unit cells with a ring-shaped gate electrode arranged in an array, gate drawing wires connectin...	11/15/2011
8053846	Field effect transistor (FET) having nano tube and method of manufacturing the FET A transistor includes: a semiconductor substrate; a channel region arranged on the semiconductor substrate; a source and a drain respectively arranged on either side of the channel region; and a conductive nano tube gate arranged on the semiconductor substrate to tr...	11/08/2011
8049286	Semiconductor device and semiconductor device manufacturing method In the present invention, there is provided a semiconductor device including: element isolation regions formed in a state of being buried in a semiconductor substrate such that an element formation region of the semiconductor substrate is interposed between the elem...	11/01/2011
8035171	CMOS image sensor A pixel of a complementary metal oxide semiconductor (CMOS) image sensor includes a plurality of photodiodes for sensing light to thereby generate photoelectric charges in different regions; a plurality of transfer transistors for transferring photoelectric charges ...	10/11/2011
8035169	Semiconductor device with suppressed crystal defects in active areas A technique that makes it possible to suppress a crystal defect produced in an active area and thereby reduce the fraction defective of semiconductor devices is provided. A first embodiment relates to the planar configuration of SRAM. One of the features of the firs...	10/11/2011
8035170	Semiconductor device including SRAM A semiconductor device according to an embodiment of the invention includes: a semiconductor substrate; device regions formed on the semiconductor substrate, the device regions having a length direction in a predetermined direction; a plurality of transistors having...	10/11/2011
8030714	Coaxial transistor structure The present invention discloses a coaxial transistor formed on a substrate, particularly a coaxial metal-oxide-semiconductor field-effect transistor (CMOSFET). The chips or substrates of the CMOSFETs can be stacked up and connected via through-holes to form a coaxia...	10/04/2011
8030715	Semiconductor device with a gate having a bulbous area and a flattened area underneath the bulbous area and method for manufacturing the same A semiconductor device with a gate having a bulbous area and a flattened area underneath the bulbous are is presented. The semiconductor device includes a semiconductor substrate, an isolation layer, a gate insulation layer, and gates. The semiconductor substrate ha...	10/04/2011
8026558	Semiconductor power device having a top-side drain using a sinker trench A semiconductor power device includes a plurality of groups of stripe-shaped trenches extending in a silicon region over a substrate, and a contiguous sinker trench completely surrounding each group of the plurality of stripe-shaped trenches so as to isolate the plu...	09/27/2011
8026557	Semiconductor device with increased channel length and method for fabricating the same A semiconductor device with an increased channel length and a method for fabricating the same are provided. The semiconductor device includes: a substrate with an active region including a planar active region and a prominence active region formed on the planar acti...	09/27/2011
8022484	Semiconductor memory device In a semiconductor memory device which includes a shared sense amplifier portion, a pair of memory cell portions disposed on opposite sides of the shared sense amplifier portion, a pair of transfer gates between the pair of memory cell portions and the shared sense ...	09/20/2011
8022485	Transistor structure having reduced input capacitance A semiconductor device having reduced input capacitance is disclosed. The semiconductor device includes a pedestal region having a gate overlying a sidewall of the pedestal region and gate interconnect overlying a major surface of the pedestal region. The pedestal r...	09/20/2011
8018008	Semiconductor device including a plurality of chips and method of manufacturing semiconductor device A semiconductor device includes a first chip and a second chip. The first chip includes a first conductivity type channel power MOSFET. The second chip includes a second conductivity type channel power MOSFET. The first chip and the second chip are integrated in suc...	09/13/2011
8013400	Method and system for scaling channel length A method for scaling channel length in a semiconductor device is provided. The method includes increasing a pitch to reduce a development inspection critical dimension (DICD) for a plurality of polysilicon lines. The polysilicon lines are trimmed to provide a reduce...	09/06/2011
8004049	Power semiconductor device A device includes an array of cells, the source regions of the individual cells comprising a plurality of source region branches each extending towards a source region branch of an adjacent cell, the base regions of the individual cells comprising a corresponding pl...	08/23/2011
7968953	Semiconductor device including schottky barrier diode and method of manufacturing the same A semiconductor device includes a substrate, a plurality of first columns having a first conductivity type, a plurality of second columns having a second conductivity type, a first electrode, and a second electrode. The first columns and the second columns are alter...	06/28/2011
7968952	Stressed barrier plug slot contact structure for transistor performance enhancement A method for forming a slot contact structure for transistor performance enhancement. A contact opening is formed to expose a contact region, and a slot contact is disposed within the contact opening in order to induce a stress on an adjacent channel region. In an e...	06/28/2011
7960800	Semiconductor dice with backside trenches filled with elastic material for improved attachment, packages using the same, and methods of making the same Disclosed are semiconductor dice with backside trenches filled with elastic conductive material. The trenches reduce the on-state resistances of the devices incorporated on the dice. The elastic conductive material provides a conductive path to the backsides of the ...	06/14/2011

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Class 257/401 - With specified physical layout (e.g., ring gate, source/drain regions shared between plural FETs, plural sections connected in parallel to form power MOSFET)