Class 257/396 - Recessed into semiconductor surface

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: Subject matter wherein the thick insulator portion is recessed
No. of patents: 249
Last issue date: 04/10/2012

«First «Previous1 2 3 4 5 6 7 Next»Last»

Number	Title	Issue Date
8154087	Multi-component strain-inducing semiconductor regions A multi-component strain-inducing semiconductor region is described. In an embodiment, formation of such a strain-inducing semiconductor region laterally adjacent to a crystalline substrate results in a uniaxial strain imparted to the crystalline substrate, providin...	04/10/2012
8110879	Controlling lateral distribution of air gaps in interconnects Properties of a hard mask liner are used against the diffusion of a removal agent to prevent air cavity formation in specific areas of an interconnect stack. According to one embodiment, there is provided a method in which there is defined a portion on a surface of ...	02/07/2012
8084832	Semiconductor device Embodiments relate to a semiconductor device and a method of manufacturing a semiconductor. In embodiments, the method may include a first exposure step of performing an exposure process for forming a first photoresist on a semiconductor substrate at one side of the...	12/27/2011
8084833	Semiconductor device Provided is a LOCOS offset MOS field-effect transistor in which a first lightly-doped N-type drain offset region with a LOCOS oxide film and a second lightly-doped N-type drain offset region without a LOCOS oxide film are formed in a drain-side offset region, and bo...	12/27/2011
8004048	Semiconductor device having a buried gate that can realize a reduction in gate-induced drain leakage (GIDL) and method for manufacturing the same A semiconductor device having a buried gate that can realize a reduction in gate-induced drain leakage is presented. The semiconductor device includes a semiconductor substrate, a buried gate, and a barrier layer. The semiconductor substrate has a groove. The buried...	08/23/2011
7968951	Interconnecting bit lines in memory devices for multiplexing An embodiment of a memory device has a plurality of conductive plugs formed on a semiconductor substrate and a pair of successively adjacent first and second bit lines overlying and in contact with each of the conductive plugs. ...	06/28/2011
7968950	Semiconductor device having improved gate electrode placement and decreased area design A semiconductor device includes a gate electrode having ends that overlap isolation regions, wherein the gate electrode is located over an active region located within a semiconductor substrate. A gate oxide is located between the gate electrode and the active regio...	06/28/2011
7960798	Structure and method to form multilayer embedded stressors A multilayer embedded stressor having a graded dopant profile for use in a semiconductor structure for inducing strain on a device channel region is provided. The inventive multilayer stressor is formed within areas of a semiconductor structure in which source/drain...	06/14/2011
7948038	Non-volatile semiconductor memory device and process of manufacturing the same In device isolation trenches, a first device-isolation insulator film is formed to have recesses thereon and a second device-isolation insulator film is formed in the recesses. The uppermost portions at both ends of the first device-isolation insulator film are loca...	05/24/2011
7902613	Self-alignment for semiconductor patterns Various systems and methods related to semiconductor devices having a plurality of layers and having a first conductive trace on a first layer electrically connected to a second conductive trace on a second layer and electrically isolated from a third electrical tra...	03/08/2011
7804139	Device having conductive material disposed in a cavity formed in an isolation oxide disposed in a trench Devices, such as transistors, having vertical junction edges. More specifically, shallow trenches are formed in a substrate and filled with an isolation oxide. Cavities are formed in the isolation oxide and filled with a conductive material, such a doped polysilicon...	09/28/2010
7804140	Field effect transistor with reduced shallow trench isolation induced leakage current Edges of source and drain regions along the direction of a channel of a field effect transistor are formed within an active area offset from the boundary between the active area and a shallow trench isolation structure. Such a structure may be manufactured by formin...	09/28/2010
7732873	Non-volatile semiconductor memory device and process of manufacturing the same In device isolation trenches, a first device-isolation insulator film is formed to have recesses thereon and a second device-isolation insulator film is formed in the recesses. The uppermost portions at both ends of the first device-isolation insulator film are loca...	06/08/2010
7709905	Dual damascene wiring and method A structure and method of fabricating a dual damascene interconnect structure, the structure including a dual damascene wire in a dielectric layer, the dual damascene wires extending a distance into the dielectric layer less than the thickness of the dielectric laye...	05/04/2010
7705407	High voltage semicondutor transistor device having small size and long electron flow path Embodiments relate to a high voltage semiconductor device. The device includes a substrate having impurities of a first conductivity and having a first surface and a second surface, a gate electrode over the first surface, an LDD region having low concentration impu...	04/27/2010
7649233	High performance transistor with a highly stressed channel A MOS transistor having a highly stressed channel region and a method for forming the same are provided. The method includes forming a first semiconductor plate over a semiconductor substrate, forming a second semiconductor plate on the first semiconductor plate whe...	01/19/2010
7528453	Field effect transistor with local source/drain insulation and associated method of production A field-effect transistor (FET) with local source-drain insulation is described. The FET includes a semiconductor substrate, source and drain depressions, a depression insulation layer, an electrically conductive filling layer, a gate dielectric, and a gate layer. T...	05/05/2009
7525164	Strained Si/SiGe/SOI islands and processes of making same A process of making a strained silicon-on-insulator structure is disclosed. A recess is formed in a substrate to laterally isolate an active area. An undercutting etch forms a bubble recess under the active area to partially vertically isolate the active area. A the...	04/28/2009
7501687	Method of forming isolation structure of semiconductor device for preventing excessive loss during recess gate formation An isolation structure of a semiconductor device is formed by forming a hard mask layer on a semiconductor substrate having active and field regions to expose the field region. A trench is defined by etching the exposed field region of the semiconductor substrate us...	03/10/2009
7436040	Method and apparatus for diverting void diffusion in integrated circuit conductors A method of diverting void diffusion in an integrated circuit includes steps of forming an electrical conductor having a boundary in a first electrically conductive layer of an integrated circuit, forming a via inside the boundary of the electrical conductor in a di...	10/14/2008
7432563	Method for producing a semiconductor component and semiconductor component produced by the same A method for producing a gate head which can be precisely scaled and for reducing parasitic capacities, for a semiconductor component comprising an at least approximately T-shaped electrode. ...	10/07/2008
7427546	Transistor device and method for manufacturing the same A transistor device includes a recess in a surface of semiconductor substrate, a gate insulation layer formed over an inner side of the recess, a gate conductor filling the recess in which the gate insulation layer is formed, and source and drain regions located ove...	09/23/2008
7411284	Accessible electronic storage apparatus A storage apparatus 10 is disclosed, that comprises a wiring substrate 11 having a first surface and a second surface, a flat type external connection terminal 12a disposed on the first surface of the wiring substrate 11, a semicon...	08/12/2008
7408232	Semiconductor device and method for fabricating the same A semiconductor device of the present invention includes a plurality of lower electrodes covering the entire surfaces of a plurality of trenches formed in a first interlayer insulating film, a capacitive insulating film covering the entire surfaces of the plurality ...	08/05/2008
7405470	Adaptable electronic storage apparatus A storage apparatus 10 is disclosed, that comprises a wiring substrate 11 having a first surface and a second surface, a flat type external connection terminal 12a disposed on the first surface of the wiring substrate 11, a semicon...	07/29/2008
7391087	MOS transistor structure and method of fabrication An MOS device comprising a gate dielectric formed on a first conductivity type region. A gate electrode formed on the gate dielectric. A pair of sidewall spacers are formed along laterally opposite sidewalls of the gate electrode. A pair of deposited silicon or sili...	06/24/2008
7368790	Strained Si/SiGe/SOI islands and processes of making same A process of making a strained silicon-on-insulator structure is disclosed. A recess is formed in a substrate to laterally isolate an active area. An undercutting etch forms a bubble recess under the active area to partially vertically isolate the active area. A the...	05/06/2008
7364997	Methods of forming integrated circuitry and methods of forming local interconnects In one implementation, field oxide is grown within bulk semiconductive material in a first circuitry area and not over immediately adjacent bulk semiconductive material in a second circuitry area. The field oxide is etched from the first circuitry area. After the et...	04/29/2008
7361965	Method and apparatus for redirecting void diffusion away from vias in an integrated circuit design A method and apparatus for redirecting void diffusion away from vias in an integrated circuit design includes steps of forming an electrical conductor in a first electrically conductive layer of an integrated circuit design, forming a via between a distal end of the...	04/22/2008
7358576	Word line structure with single-sided partially recessed gate structure A word line structure with a single-sided partially recessed gate structure. The word line structure includes a gate structure, a first gate spacer, and a second gate spacer. The gate structure includes a gate dielectric layer, a first gate layer, a second gate laye...	04/15/2008
7354835	Method of fabricating CMOS transistor and CMOS transistor fabricated thereby In a method of fabricating a CMOS transistor, and a CMOS transistor fabricated according to the method, the characteristics of first and second conductivity type MOS transistors are both simultaneously improved. At the same time, the fabrication process is simplifie...	04/08/2008
7342276	Method and apparatus utilizing monocrystalline insulator A semiconductor device, including: a semiconductor material; a conductive element; and a substantially monocrystalline insulator disposed between the semiconductor material and the conductive eleme...	03/11/2008
7326983	Selective silicon-on-insulator isolation structure and method A first aspect of the present invention is a method of forming an isolation structure including: (a) providing a semiconductor substrate; (b) forming a buried N-doped region in the substrate; (c) forming a vertical trench in the substrate, the trench extending into ...	02/05/2008
7323394	Method of producing element separation structure A method of producing an element separation structure includes the steps of: forming a first thermal oxide film on the substrate; forming a silicon nitride film on the first thermal oxide film; removing the first thermal oxide film and the silicon nitride film in an...	01/29/2008
7321141	Image sensor device and manufacturing method thereof A semiconductor substrate is provided on which a plurality of shallow trench isolations (STI) defining a plurality of active areas are formed. The active areas comprise a photo sensing region, and a plurality of photodiodes are formed in each photo sensing region. T...	01/22/2008
7307324	MOS transistor in an active region After an isolation region is formed using a field-forming silicon nitride film, this silicon nitride film is patterned, thereby a gate trench is formed. Next, a gate electrode material is buried into the gate trench, and this is etched back. Thereafter, the silicon ...	12/11/2007
7307320	Differential mechanical stress-producing regions for integrated circuit field effect transistors Integrated circuit field effect transistors include a substrate, an isolation region in the substrate that defines an active region in the substrate, spaced apart source/drain regions in the active region, a channel region in the active region between the spaced apa...	12/11/2007
7285841	Method of manufacturing signal processing apparatus In a signal processing apparatus for transmitting or processing a signal, a substrate has a recessed portion in a surface of the substrate, a first interconnecting conductor is on the substrate, including at least the recessed portion of the substrate, and a dielect...	10/23/2007
7268043	Semiconductor device and method of manufacturing the same A semiconductor device and a method of manufacturing the same is disclosed. A trench is formed in an active region of a semiconductor substrate. A doped layer is formed on the inner walls of the trench. The trench is filled up with a first semiconductor layer. A gat...	09/11/2007
7268362	High performance transistors with SiGe strain A preferred embodiment of the invention comprises a semiconductor device having stress in the source/drain channel. The device comprises a substrate having a lattice constant greater than or equal to silicon and a first layer on the substrate, wherein the first laye...	09/11/2007

«First «Previous1 2 3 4 5 6 7 Next»Last»

PatentStorm

Bizarre Patents

PatentStorm News

Class 257/396 - Recessed into semiconductor surface