A method of swing on a swing is disclosed, in which a user positioned on a standard swing suspended by two chains from a substantially horizontal tree branch induces side to side motion by pulling alternately on one chain and then the other.
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| Number | Title | Issue Date |
| 8169035 | Semiconductor device A semiconductor device, including: a semiconductor substrate; a plurality of unit cells connected in parallel with each other, each unit cell including a plurality of electric field effect transistors formed on the semiconductor substrate; a plurality of gate bus wi... | 05/01/2012 |
| 8138553 | Semiconductor device and method of manufacturing the same A gate insulating film is formed on a main surface of a substrate in which an element isolation region is formed. A metal film is formed on the gate insulating film. A silicon film is formed on the metal film. A gate electrode of a MIS transistor composed of a stack... | 03/20/2012 |
| 8115258 | Memory devices having diodes and resistors electrically connected in series A non-volatile memory devices includes: a substrate including a circuit device and a metal line electrically connected with the circuit device; a diode connected with the metal line in a vertical direction with respect to a surface of the substrate, and including a ... | 02/14/2012 |
| 8084829 | Semiconductors device and method of manufacturing such a device The invention relates to a semiconductor device (10) comprising a semiconductor body (1) with a high-ohmic semi-conductor substrate (2) which is covered with a dielectric layer (3, 4) containing charges, on which dielectric layer one or m... | 12/27/2011 |
| 8084830 | Nonvolatile semiconductor memory device The memory cell is located at respective intersections between the first wirings and the second wirings. Each of the memory cells has a rectifier element and a variable resistance element connected in series. The rectifier element includes a p type first semiconduct... | 12/27/2011 |
| 8063448 | Resistive memory and method A memory device includes a multi gate field effect transistor (MuGFET) having a fin with a contact area. A programmable memory element abuts the fin contact area. ... | 11/22/2011 |
| 8030712 | Method for manufacturing high-stability resistors, such as high ohmic poly resistors, integrated on a semiconductor substrate A method for protecting a circuit component on a semiconductor substrate from a plasma etching or other removal process includes forming a screening layer over an auxiliary layer to conceal at least an area of the auxiliary layer that overlays at least a portion of ... | 10/04/2011 |
| 7989895 | Integration using package stacking with multi-layer organic substrates Example embodiments of the invention may provide for a multi-package system. The multi-package system may include a first package having a plurality of first organic dielectric layers, where the first package includes at least one first conductive layer positioned b... | 08/02/2011 |
| 7989896 | Semiconductor device and method of fabricating the same A method of fabricating a semiconductor device according to one embodiment includes: laying out a first region, a second region, a third region and a fourth region on a semiconductor substrate by forming an element isolation region in the semiconductor substrate; fo... | 08/02/2011 |
| 7977754 | Poly resistor and poly eFuse design for replacement gate technology A semiconductor device and method for fabricating a semiconductor device is disclosed. The semiconductor device comprises a semiconductor substrate; an active region of the substrate, wherein the active region includes at least one transistor; and a passive region o... | 07/12/2011 |
| 7964919 | Thin film resistors integrated at two different metal single die An integrated circuit includes a first thin film resistor on a first dielectric layer. A first layer of interconnect conductors on the first dielectric layer includes a first and second interconnect conductors electrically contacting the first thin film resistor. A ... | 06/21/2011 |
| 7906816 | Semiconductor integrated circuit device including memory cells having floating gates and resistor elements A semiconductor integrated circuit device includes an element isolation region which is formed in a semiconductor substrate to isolate an element region of the semiconductor substrate, memory cells having floating gates and formed on the element region, and resistor... | 03/15/2011 |
| 7888746 | Semiconductor structure and method of manufacture In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a semiconductor structure having a silicon-on-insulator (SOI) substrate and a dielectric region is disclosed. The dielectric region is adja... | 02/15/2011 |
| 7868393 | Space efficient integrated circuit with passive devices A multimodal integrated circuit (IC) is provided, comprising, first (74) and second (76) semiconductor (SC) devices, and first (78) and second (80) integrated passive devices (IPDs) coupled, respectively, to the first (74) and seco... | 01/11/2011 |
| 7863689 | Apparatus for using a well current source to effect a dynamic threshold voltage of a MOS transistor Deep submicron wells of MOS transistors, implemented over an ungrounded well, exhibit two modes of operation: a current sink mode and a current source mode. While operation as a current sink is well understood and successfully controlled, it is also necessary to con... | 01/04/2011 |
| 7855422 | Formation of high sheet resistance resistors and high capacitance capacitors by a single polysilicon process A semiconductor device includes a transistor, a capacitor and a resistor wherein the capacitor includes a doped polysilicon layer to function as a bottom conductive layer with a salicide block (SAB) layer as a dielectric layer covered by a Ti/TiN layer as a top cond... | 12/21/2010 |
| 7851870 | Monolithically integrated semiconductor assembly having a power component and method for producing a monolithically integrated semiconductor assembly A monolithically integrated semiconductor assembly having a power component, and a method for manufacturing a semiconductor assembly, are proposed, a monolithically integrated resistor element being provided between a first terminal and the second region, and a comp... | 12/14/2010 |
| 7843013 | Semiconductor device and method for fabricating the same A semiconductor device includes: an isolation region formed in a semiconductor substrate; active regions surrounded by the isolation region and including p-type and n-type regions, respectively; an NMOS transistor formed in the active region including the p-type reg... | 11/30/2010 |
| 7838946 | Method for fabricating semiconductor structure and structure of static random access memory A method for fabricating a semiconductor structure is disclosed. A substrate with a first transistor having a first dummy gate and a second transistor having a second dummy gate is provided. The conductive types of the first transistor and the second transistor are ... | 11/23/2010 |
| 7825478 | Polarity dependent switch for resistive sense memory Polarity dependent switches for resistive sense memory are described. A memory unit includes a resistive sense memory cell configured to switch between a high resistance state and a low resistance state upon passing a current through the resistive sense memory cell ... | 11/02/2010 |
| 7821079 | Preparation of thin film transistors (TFTs) or radio frequency identification (RFID) tags or other printable electronics using ink-jet printer and carbon nanotube inks The invented ink-jet printing method for the construction of thin film transistors using all SWNTs on flexible plastic films is a new process. This method is more practical than all of existing printing methods in the construction TFT and RFID tags because SWNTs hav... | 10/26/2010 |
| 7821078 | Semiconductor device having resistor elements and method for manufacturing the same A semiconductor device of the invention has a plurality of resistor elements formed on an element isolating oxide film in predetermined regions on a surface of a semiconductor substrate. Active regions are furnished close to the resistor elements. This allows the el... | 10/26/2010 |
| 7781846 | Semiconductor integrated circuit device Prior known static random access memory (SRAM) cells are required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leadin... | 08/24/2010 |
| 7692251 | Transistor for semiconductor device and method of forming the same Disclosed herein is a transistor for a semiconductor device and a method of forming the same. According to the present invention, a novel transistor structure combining a plane channel transistor and a fin-type channel transistor formed on the semiconductor substrat... | 04/06/2010 |
| 7683433 | Apparatus and method for improving drive-strength and leakage of deep submicron MOS transistors An apparatus and method of manufacture for metal-oxide semiconductor (MOS) transistors is disclosed. Devices in accordance with the invention are operable at voltages below 2V. The devices are area efficient, have improved drive strength, and have reduced leakage cu... | 03/23/2010 |
| 7675122 | Semiconductor memory device A contact connected to a word line is formed on a gate electrode of an access transistor of an SRAM cell. The contact passes through an element isolation insulating film to reach an SOI layer. A body region of a driver transistor and that of the access transistor ar... | 03/09/2010 |
| 7646068 | Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit A semiconductor chip includes a semiconductor substrate 126, in which first and second active regions are disposed. A resistor 124 is formed in the first active region and the resistor 124 includes a doped region 128 formed between two te... | 01/12/2010 |
| 7612417 | Semiconductor integrated circuit device Prior known static random access memory (SRAM) cells are required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leadin... | 11/03/2009 |
| 7602027 | Semiconductor component and method of manufacture A semiconductor component that includes an integrated passive device and method for manufacturing the semiconductor component. Vertically integrated passive devices are manufactured above a substrate. In accordance with one embodiment, a resistor is manufactured in ... | 10/13/2009 |
| 7602026 | Memory cell, semiconductor memory device, and method of manufacturing the same A memory cell in a semiconductor memory device comprises a variable resistor element configured so that a variable resistor body is sandwiched between a first electrode and a second electrode, and a transistor element capable of controlling a flow of current in the ... | 10/13/2009 |
| 7550806 | Bondwire utilized for coulomb counting and safety circuits A sense resistor and integrated circuit package combination is disclosed. A package lead frame is provided having a plurality of landing zones associated therewith and a die mounting area for mounting of a die thereon. The die has a plurality of bond pads associated... | 06/23/2009 |
| 7495292 | Integrated circuit devices having pad contact plugs in the cell array and peripheral circuit regions of the integrated circuit substrate Integrated circuit devices, for example, dynamic random access memory (DRAM) devices, are provided including an integrated circuit substrate having a cell array region and a peripheral circuit region. A buried contact plug is provided on the integrated circuit subst... | 02/24/2009 |
| 7479681 | Multilayered semiconductor structure containing a MISFET, a resistor, a capacitor, and an inductor A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is... | 01/20/2009 |
| 7439566 | Semiconductor memory device having metal-insulator transition film resistor A semiconductor memory device may have a lower leakage current and/or higher reliability, e.g., a longer retention time and/or a shorter refresh time. The device may include a switching device and a capacitor. A source of the switching device may be connected to a f... | 10/21/2008 |
| 7436031 | Device for implementing an inverter having a reduced size A semiconductor device according to this invention includes: two level shift switches (28A and 28B) each having first and second electrodes, a control electrode, a signal output electrode, and a first semiconductor region forming a transistor device se... | 10/14/2008 |
| 7432555 | Testable electrostatic discharge protection circuits A semiconductor die has a bonding pad for a MOSFET such as a power MOSFET and a separate bonding pad for ESD protection circuitry. Connecting the bonding pads together makes the ESD protection circuitry functional to protect the MOSFET. Before connecting the bonding... | 10/07/2008 |
| 7432540 | Dual conversion gain gate and capacitor combination A pixel cell array architecture having a dual conversion gain. A dual conversion gain element is coupled between a floating diffusion region and a respective storage capacitor. The dual conversion gain element having a control gate switches in the capacitance of the... | 10/07/2008 |
| 7425747 | Semiconductor device The present invention provides a miniaturized semiconductor device at low-cost having high integration density and for restraining an increase of an insertion loss and a deterioration of an isolation characteristic of a circuit resulting from parasitic inductance of... | 09/16/2008 |
| 7408213 | Ferroelectric memory device and method of manufacture of same A ferroelectric memory device has a lower insulating film formed on a semiconductor substrate. A ferroelectric capacitor structure is formed on the lower insulating film. The ferroelectric capacitor structure is created by layering in order a lower electrode, ferroe... | 08/05/2008 |
| 7405447 | Silicon rich barrier layers for integrated circuit devices Semiconductor devices and memory cells are formed using silicon rich barrier layers to prevent diffusion of dopants from differently doped polysilicon films to overlying conductive layers or to substrates. A polycilicide gate electrode structure may be formed using ... | 07/29/2008 |