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| Number | Title | Issue Date |
| 8049278 | ESD protection for high voltage applications An ESD device includes a low doped well connected to a first contact and a diffusion area connected to a second contact. A substrate between the low doped well and the diffusion area has a dopant polarity that is opposite a dopant polarity of the low doped well and ... | 11/01/2011 |
| 7956419 | Trench IGBT with depletion stop layer A very low VCEON non punch through trench IGBT built-in non-epitaxial float zone silicon has a depletion stop layer structure added to its bottom surface. ... | 06/07/2011 |
| 7932562 | Gate protection diode for high-frequency power amplifier A high-frequency power amplifier of the type to be mounted in an RF module for mobile phones having high-frequency power field effect transistors and gate protective diodes which are coupled between the gates and the sources of the high-frequency power field effect ... | 04/26/2011 |
| 7928511 | Semiconductor device and method for manufacturing semiconductor device A semiconductor device (1) includes a plurality of photodiodes (20) on a semiconductor substrate (11). Cathodes (22) and a common anode (21) of the plurality of photodiodes (20 (20a, 20b)) are for... | 04/19/2011 |
| 7893498 | Semiconductor device A semiconductor device 10 comprises a P type base region 13 formed in an N− type base region 11, and N+ type emitter regions 14 formed plurally in the P type base region 13 so as to be spaced form each other... | 02/22/2011 |
| 7868387 | Low leakage protection device A high-voltage, low-leakage, bidirectional electrostatic discharge (ESD, or other electrical overstress) protection device includes a doped well disposed between the terminal regions and the substrate. The device includes an embedded diode for conducting current in ... | 01/11/2011 |
| 7855419 | ESD device layout for effectively reducing internal circuit area and avoiding ESD and breakdown damage and effectively protecting high voltage IC An improved layout pattern for electrostatic discharge protection is disclosed. A first heavily doped region of a first type is formed in a well of said first type. A second heavily doped region of a second type is formed in a well of said second type. A battlement ... | 12/21/2010 |
| 7514751 | SiGe DIAC ESD protection structure A diode for alternating current (DIAC) electrostatic discharge (ESD) protection circuit is formed in a silicon germanium (SiGe) hetrojunction bipolar transistor (HBT) process that utilizes a very thin collector region. ESD protection for a pair of to-be-protected pa... | 04/07/2009 |
| 7514750 | Semiconductor device and fabrication method suitable therefor A semiconductor device according to the invention has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of th... | 04/07/2009 |
| 7439145 | Tunable semiconductor diodes A diode structure fabrication method. In a P− substrate, an N+ layer is implanted. The N+ layer has an opening whose size affects the breakdown voltage of the diode structure. Upon the N+ layer, an N− layer is formed. Then, a P+ region is formed to serve as an a... | 10/21/2008 |
| 7439592 | ESD protection for high voltage applications An ESD device includes a low doped well connected to a first contact and a diffusion area connected to a second contact. A substrate between the low doped well and the diffusion area has a dopant polarity that is opposite a dopant polarity of the low doped well and ... | 10/21/2008 |
| 7427787 | Guardringed SCR ESD protection Methods and circuits are disclosed for protecting an electronic circuit from ESD damage using an SCR ESD cell. An SCR circuit is coupled to a terminal of an associated microelectronic circuit for which ESD protection is desired. The SCR used in the ESD cell of the i... | 09/23/2008 |
| 7405445 | Semiconductor structure and method for ESD protection A semiconductor integrated circuit structure includes a plurality of diodes disposed in the substrate. These diodes are electrically coupled in series. At least one insertion region is disposed in the substrate between two of the diodes and a supply voltage node ele... | 07/29/2008 |
| 7402846 | Electrostatic discharge (ESD) protection structure and a circuit using the same An electrostatic discharge (ESD) protection structure is disclosed. The ESD protection structure includes an active device. The active device includes a plurality of drains. Each of the drains has a contact row and at least one body contact row. The at least one bod... | 07/22/2008 |
| 7397088 | Electrostatic discharge protection device for radio frequency applications based on an isolated L-NPN device A lateral bipolar transistor is used to protect a passive radio frequency (RF) microelectronic circuit during electrostatic discharge (ESD) events. The microelectronic circuit receives a high frequency differential input signal across first and second pads. The late... | 07/08/2008 |
| 7382025 | ESD protection structure with lower maximum voltage A semiconductor structure for protecting integrated circuits from ESD pulses includes a semiconductor substrate of a first conductivity type and with a first dopant concentration. A well of a second conductivity type and with a second dopant concentration lies withi... | 06/03/2008 |
| 7369379 | Methods, circuits, and applications using a resistor and a Schottky diode A combination of a current limiting resistor and a clamping Schottky diode prevent substantial forward biasing of a pn junction associated with a pad in a snapback device during normal operation, but do not substantially affect triggering of the device during an unb... | 05/06/2008 |
| 7361957 | Device for electrostatic discharge protection and method of manufacturing the same The present invention relates to a device for electrostatic discharge protection (ESD). According to an embodiment of the present invention, a device for electrostatic discharge protection includes a semiconductor substrate, a plurality of field oxide films formed i... | 04/22/2008 |
| 7355250 | Electrostatic discharge device with controllable holding current An electrostatic discharge (ESD) device with a parasitic silicon controlled rectifier (SCR) structure and controllable holding current is provided. A first distance is kept between a first N+ doped region and a first P+ doped region, and a second distance is kept be... | 04/08/2008 |
| 7348643 | Semiconductor dual guardring arrangement A semiconductor dual guardring arrangement is provided which is useful during electrostatic discharge (ESD) events as well as during normal operating conditions. In particular, an inner guard that is located closer to an active area provides desirable performance du... | 03/25/2008 |
| 7342282 | Compact SCR device and method for integrated circuits A semiconductor device and method for electrostatic discharge protection. The semiconductor device includes a first semiconductor controlled rectifier and a second semiconductor controlled rectifier. The first semiconductor controlled rectifier includes a first semi... | 03/11/2008 |
| 7332778 | Semiconductor device and method of manufacturing same To refine a semiconductor device (100), in particular a S[ilicon]O[n]I[nsulator] device, comprising: at least one isolating layer (10) made of a dielectric material; at least one silicon substrate ( | 02/19/2008 |
| 7329925 | Device for electrostatic discharge protection A device for electrostatic discharge (ESD) protection is disclosed. The device for electrostatic discharge protection includes a lateral bipolar transistor and a diode. The semiconductor transistor has an emitter, a base and a collector electrically connected to a f... | 02/12/2008 |
| 7304827 | ESD protection circuits for mixed-voltage buffers An ESD protection circuit that protects a mixed-voltage input/output (I/O) buffer circuit in an integrated circuit is provided. The ESD protection circuit includes an ESD discharging circuit coupled to the I/O pad and ESD detection circuit coupled to the discharging... | 12/04/2007 |
| 7291888 | ESD protection circuit using a transistor chain An electrostatic discharge (ESD) protection circuit for dissipating an ESD current from a first pad to a second pad during an ESD event. The ESD protection circuit includes a first bipolar transistor having an emitter coupled to the first pad. A second bipolar trans... | 11/06/2007 |
| 7288450 | General protection of an integrated circuit against permant overloads and electrostatic discharges In an integrated circuit, a diode is interposed between the semiconductor substrate and the contact pad to an external bias voltage, and the substrate is biased at an internal voltage reference. Between each contact pad of the integrated circuit and semiconductor su... | 10/30/2007 |
| 7285828 | Electrostatic discharge protection device for digital circuits and for applications with input/output bipolar voltage much higher than the core circuit power supply An electrostatic discharge (ESD) device and method is provided. The ESD device can comprise a substrate doped to a first conductivity type, an epitaxial region doped to the second conductivity type, and a first well doped to the first conductivity type disposed in t... | 10/23/2007 |
| 7282768 | MOS field-effect transistor A high-reliable depletion-type MOS field-effect transistor as a process monitor is provided. A diode formed in polycrystalline silicon and a diode formed in a semiconductor substrate form a bi-directional diode. The bi-directional diode connects a gate electrode wit... | 10/16/2007 |
| 7282770 | Semiconductor device and fabrication process thereof A semiconductor device includes a semiconductor substrate of a first conductivity type, a well of the first conductivity type formed in the semiconductor substrate, a transistor formed in the well, a diffusion region of a second conductivity type formed in the semic... | 10/16/2007 |
| 7280328 | Semiconductor integrated circuit device An inventive semiconductor integrated circuit device includes: an external connection terminal 1; an electrostatic discharge protection circuit 2; an output circuit 3; an output prebuffer circuit 4; an input prebuffer circuit 5; an... | 10/09/2007 |
| 7274071 | Electrostatic damage protection device with protection transistor This invention provides an electrostatic damage protection device which can protects a device to be protected enough from an electrostatic damage and prevents damages of protection transistors themselves. A N-channel type first MOS transistor and a N-channel type se... | 09/25/2007 |
| 7256460 | Body-biased pMOS protection against electrostatic discharge A protection circuit for protecting an integrated circuit pad 201 against an ESD pulse, which comprises a discharge circuit having an elongated MOS transistor 202 (preferably pMOS) in a substrate 205 (preferably n-type), said discharge circuit o... | 08/14/2007 |
| 7250660 | ESD protection that supports LVDS and OCT Circuits are described that provide electrostatic discharge protection for I/O circuits that support the low voltage differential signaling (LVDS) and on-chip termination (OCT) standards. At least one additional transistor is connected across an I/O transistor. In t... | 07/31/2007 |
| 7244992 | Turn-on-efficient bipolar structures with deep N-well for on-chip ESD protection A semiconductor device suitable for applications in an electrostatic discharge (ESD) protection circuit, including a semiconductor substrate, a first well formed in the substrate, a second well formed in the substrate, and a first doped region formed in the second w... | 07/17/2007 |
| 7245467 | ESD protection circuit between different voltage sources An ESD protection circuit for hybrid voltage sources includes a first bipolar transistor set and a second bipolar transistor set, a first detection circuit, and a second detection circuit. The ON/OFF states of the first bipolar transistor set and the second bipolar ... | 07/17/2007 |
| 7242061 | Semiconductor device The invention provides semiconductor devices having an output circuit in which transistors do not fail to achieve their original capability, and electrostatic breakdown is difficult to occur. A semiconductor device is equipped with a semiconductor substrate, an elem... | 07/10/2007 |
| 7238969 | Semiconductor layout structure for ESD protection circuits A semiconductor layout structure for an electrostatic discharge (ESD) protection circuit is disclosed. The semiconductor layout structure includes a first area, in which one or more devices are constructed for functioning as a silicon controlled rectifier, and a sec... | 07/03/2007 |
| 7233179 | Output stage interface circuit for outputting digital data onto a data bus An output stage interface circuit (1) comprises a main bipolar transistor (Q1) coupling a data output terminal (5) to a first rail (2) to which the positive of the power supply voltage (VDD) is applied, and a substrate diffusio... | 06/19/2007 |
| 7217980 | CMOS silicon-control-rectifier (SCR) structure for electrostatic discharge (ESD) protection An electrostatic discharge protection device, including a silicon-control-rectifier, in complementary metal-oxide semiconductor (CMOS) process is disclosed. in one embodiment of the present invention, the protection device includes a semiconductor substrate having a... | 05/15/2007 |
| 7215005 | Bipolar ESD protection structure The invention describes the fabrication and structure of an ESD protection device for integrated circuit semiconductor devices with improved ESD protection and resiliency. A vertical bipolar npn transistor forms the basis of the protection device. To handle the larg... | 05/08/2007 |
