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Microwave Oven With Removable Storage Cassette in Dashboard of Motor Vehicle
A microwave oven adapted for use within a motor vehicle dashboard area. The microwave oven has a removable storage cassette, and slidable platforms for securing and serving containers of beverages and foods.
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| Number | Title | Issue Date |
| 8188543 | Electronic device including a conductive structure extending through a buried insulating layer An electronic device can include a substrate, a buried insulating layer overlying the substrate, and a semiconductor layer overlying the buried insulating layer, wherein the semiconductor layer is substantially monocrystalline. The electronic device can also include... | 05/29/2012 |
| 8102000 | P-channel germanium on insulator (GOI) one transistor memory cell According to one exemplary embodiment, a p-channel germanium on insulator (GOI) one transistor memory cell comprises a buried oxide (BOX) layer formed over a bulk substrate, and a gate formed over a gate dielectric layer situated over a germanium layer formed over t... | 01/24/2012 |
| 8044465 | Method for producing partial SOI structures comprising zones connecting a superficial layer and a substrate The invention relates to a method for producing a semiconductor structure comprising a superficial layer, at least one embedded layer, and a support, which method comprises: a step of forming, on a first support, patterns in a firs... | 10/25/2011 |
| 7880233 | Transistor with raised source and drain formed on SOI substrate Embodiments relate to a method for fabricating a transistor by using a SOI wafer. A gate insulation layer and a first gate conductive layer on a silicon-on-insulator substrate of a substrate to form a first gate conductive pattern, a gate insulation layer pattern, a... | 02/01/2011 |
| 7772649 | SOI field effect transistor with a back gate for modulating a floating body A masking layer is applied over a top semiconductor layer and patterned to expose in an opening a shallow trench isolation structure and a portion of a top semiconductor region within which a first source/drain region and a body is to be formed. Ions are implanted i... | 08/10/2010 |
| 7755142 | Thin-film transistor and image display device In either of a source side and a drain side of an insular semiconductor thin film, a gate electrode is extended without a break along the contour of the insular semiconductor thin film to provide a branch closed circuit, thereby removing a current component path to ... | 07/13/2010 |
| 7709895 | Semiconductor device having insulating stripe patterns An uneven portion is formed on a substrate extending in a linear shape stripe pattern, convex portions of an insulating film that intersects with a crystalline semiconductor film divided into island shapes are removed, and an amorphous semiconductor film is formed o... | 05/04/2010 |
| 7579657 | Semiconductor device with multiple channels A semiconductor device with multiple channels includes a semiconductor substrate and a pair of conductive regions spaced apart from each other on the semiconductor substrate and having sidewalls that face to each other. A partial insulation layer is disposed on the ... | 08/25/2009 |
| 7423324 | Double-gate MOS transistor, double-gate CMOS transistor, and method for manufacturing the same In a double-gate MOS transistor, a substrate, an insulating layer, and a semiconductor layer are formed or laminated in that order, an opening extending to the insulating layer is formed in the semiconductor layer while leaving an island-shaped region, the island-sh... | 09/09/2008 |
| 7417283 | CMOS device with dual polycide gates and method of manufacturing the same A CMOS device having dual polycide gates is formed by first providing a silicon substrate, which is divided into a cell area and a peripheral circuit area and has a device isolation layer, a P-well, and a N-well in the peripheral circuit area. The n+ polycide gate a... | 08/26/2008 |
| 7394116 | Semiconductor device including a multi-channel fin field effect transistor including protruding active portions and method of fabricating the same In a semiconductor device, and a method of fabricating the same, the semiconductor device includes a semiconductor substrate having a cell region and a peripheral circuit region, a portion of the semiconductor substrate in the cell region and in the peripheral circu... | 07/01/2008 |
| RE40339 | Silicon-on-insulator chip having an isolation barrier for reliability An SOI chip having an isolation barrier. The SOI chip includes a substrate, an oxide layer deposited on the substrate, and a silicon layer deposited on the oxide layer. A gate is deposited above the silicon layer. A first metal contact is deposited above the gate to... | 05/27/2008 |
| 7355225 | Semiconductor device and method for providing a reduced surface area electrode An apparatus (200) such as a semiconductor device comprises a gate electrode (201) and at least a first electrode (202). The first electrode preferably has an established perimeter that at least partially overlaps with respect to the gate electr... | 04/08/2008 |
| 7355247 | Silicon on diamond-like carbon devices Embodiments of the invention provide substrate with an insulator layer on the substrate. The insulator layer may include diamond-like carbon. A device, such a tri-gate transistor may be formed on the diamond-like carbon layer. ... | 04/08/2008 |
| 7341923 | Substrate, manufacturing method therefor, and semiconductor device A step of forming the first substrate which has a separation layer and a Ge layer on the separation layer, and a step of forming a bonded substrate stack by bonding the first substrate to the second substrate through an insulating layer, and a step of dividing the b... | 03/11/2008 |
| 7332777 | STI liner for SOI structure In a method of manufacturing a semiconductor device, an initial structure is provided. The initial structure includes a substrate, a patterned silicon layer, and a covering layer. The substrate has a buried insulator layer formed thereon. The patterned silicon layer... | 02/19/2008 |
| 7316959 | Semiconductor device and method for fabricating the same The semiconductor device comprises a semiconductor layer 18 formed on an insulation layer 16, a gate electrode 22 formed on the semiconductor layer with a gate insulation film 20 formed therebetween, a source/drain region 24 formed... | 01/08/2008 |
| 7317227 | Method for forming pattern of stacked film A semiconductor film serving as an active region of a thin film transistor and an upper oxide film protecting the semiconductor film are dry etched to form the active region. In this case, a fluorine-based gas is used as the etching gas, and the etching gas is switc... | 01/08/2008 |
| 7317226 | Patterned SOI by oxygen implantation and annealing Methods for forming a patterned SOI region in a Si-containing substrate is provided which has geometries of about 0.25 μm or less. Specifically, one method includes the steps of: forming a patterned dielectric mask on a surface of a Si-containing substrate, wherein... | 01/08/2008 |
| 7288819 | Stable PD-SOI devices and methods One aspect of the present subject matter relates to a partially depleted silicon-on-insulator structure. The structure includes a well region formed above an oxide insulation layer. In various embodiments, the well region is a multilayer epitaxy that includes a sili... | 10/30/2007 |
| 7279369 | Germanium on insulator fabrication via epitaxial germanium bonding A method of forming a germanium-on-insulator (GOI). An epitaxial germanium layer is formed on top of a first substrate. A first dielectric film is formed on top of the epitaxial germanium layer. A second substrate is provided. The first substrate is bonded to the se... | 10/09/2007 |
| 7276793 | Semiconductor device and semiconductor module A semiconductor device is provided wherein conductive paths 40, formed of crystal that grows better along the X-Y axis than along the Z axis, are embedded in an insulating resin 44, and the back surface of the conductive path 40 is exposed throu... | 10/02/2007 |
| 7274072 | Hybrid bulk-SOI 6T-SRAM cell for improved cell stability and performance The present invention provides a 6T-SRAM semiconducting structure including a substrate having an SOI region and a bulk-Si region, wherein the SOI region and the bulk-Si region have a same or differing crystallographic orientation; an isolation region separating the... | 09/25/2007 |
| 7268022 | Stable PD-SOI devices and methods One aspect of the present subject matter relates to a partially depleted silicon-on-insulator structure. The structure includes a well region formed above an oxide insulation layer. In various embodiments, the well region is a multilayer epitaxy that includes a sili... | 09/11/2007 |
| 7268391 | Semiconductor device having an under stepped gate for preventing gate failure and method of manufacturing the same A semiconductor device and a method of manufacturing the same capable of preventing a not open fail of a landing plug contact caused by the leaning of a gate. The method includes the steps of preparing a semiconductor substrate, forming first recesses by etching an ... | 09/11/2007 |
| 7268839 | Array substrate comprising an island shaped drain electrode enclosed by the source electrode and liquid crystal display device including the same An array substrate for a liquid crystal display device including a substrate, a gate electrode on the substrate, a first insulating layer on the gate electrode, an active layer on the first insulating layer and corresponding to the gate electrode, a source electrode... | 09/11/2007 |
| 7259428 | Semiconductor device using SOI structure having a triple-well region A semiconductor device includes a support substrate, a buried insulation film, provided on the support substrate, having a thickness of 5 to 10 nm, a silicon layer provided on the buried insulation film, a MOSFET provided in the silicon layer, and a triple-well regi... | 08/21/2007 |
| 7235433 | Silicon-on-insulator semiconductor device with silicon layers having different crystal orientations and method of forming the silicon-on-insulator semiconductor device A semiconductor device comprising a substrate having a first crystal orientation and an insulating layer overlying the substrate is provided. A plurality of silicon layers are formed overlying the insulating layer. A first silicon layer comprises silicon having the ... | 06/26/2007 |
| 7221032 | Semiconductor device including FinFET having vertical double gate structure and method of fabricating the same A semiconductor device includes a semiconductor layer formed on a semiconductor substrate via an insulating film and having a projecting shape, a gate electrode formed, via a gate insulating film, on a pair of side surfaces of four side surfaces of the semiconductor... | 05/22/2007 |
| 7208803 | Method of forming a raised source/drain and a semiconductor device employing the same A method of forming a raised source/drain proximate a spacer of a gate of a transistor on a substrate, and a semiconductor device of an integrated circuit employing the same. In one embodiment, the method includes orienting the gate substantially along a direc... | 04/24/2007 |
| 7202118 | Fully depleted SOI MOSFET arrangement with sunken source/drain regions A fully depleted SOI MOSFET arrangement includes a buried oxide (BOX) layer with recesses in the BOX layer and a post extended upwardly between the recesses. A thin channel region is formed on the post and a gate over the channel. Deep source/drain region are adjace... | 04/10/2007 |
| 7199024 | Method of manufacturing a semiconductor device There is provided a method of removing trap levels and defects, which are caused by stress, from a single crystal silicon thin film formed by an SOI technique. First, a single crystal silicon film is formed by using a typical bonding SOI technique such as Smart-Cut ... | 04/03/2007 |
| 7192840 | Semiconductor device fabrication method using oxygen ion implantation A method of fabricating a semiconductor device having a silicon layer disposed on an insulating film. Oxygen ions are implanted into selected parts of the silicon layer, which are then oxidized to form isolation regions dividing the silicon layer into a plurality of... | 03/20/2007 |
| 7180109 | Field effect transistor and method of fabrication The present invention is a novel field effect transistor having a channel region formed from a narrow bandgap semiconductor film formed on an insulating substrate. A gate dielectric layer is formed on the narrow bandgap semiconductor film. A gate electrode is then f... | 02/20/2007 |
| 7176527 | Semiconductor device and method of fabricating same A semiconductor device and a method of fabricating the same suppress a substrate floating effect without causing lowering of a degree of integration. The semiconductor device has a Silicon-On-Insulator structure which includes a semiconductor layer formed on an insu... | 02/13/2007 |
| 7176525 | Process for production of SOI substrate and process for production of semiconductor device A process for producing an adhered SOI substrate without causing cracking and peeling of a single-crystal silicon thin film. The process consists of selectively forming a porous silicon layer in a single-crystal semiconductor substrate, adding hydrogen into the sing... | 02/13/2007 |
| 7166894 | Schottky power diode with SiCOI substrate and process for making such diode The present invention relates to a power junction device including a substrate of the SiCOI type with a layer of silicon carbide (16) insulated from a solid carrier (12) by a buried layer of insulant (14), and including at least one Schottky con... | 01/23/2007 |
| 7161264 | Semiconductor circuit having drivers of different withstand voltage within the same chip A semiconductor device comprises an embedded insulation layer 101 formed on a semiconductor substrate 100, plural power semiconductor elements 2, 3 formed on a semiconductor substrate 100 on the embedded insulation layer, a trench 4 | 01/09/2007 |
| 7151301 | Sensitivity enhanced biomolecule field effect transistor There is provided a biomolecule FET enhancing a sensitivity. The biomolecule FET includes a substrate, first and second impurity regions formed on both sides of the substrate, and doped with impurities of a polarity opposite to that of the substrate, a gate formed o... | 12/19/2006 |
| 7148543 | Semiconductor chip which combines bulk and SOI regions and separates same with plural isolation regions A semiconductor chip includes a base substrate, a bulk device region having a bulk growth layer on a part of the base substrate, an SOI device region having a buried insulator on the base substrate and a silicon layer on the buried insulator, and a boundary layer lo... | 12/12/2006 |
