Pillow with retractable umbrella
A pillow assembly having a supporting assembly and a retractable umbrella assembly that is easily transportable and allows a user to support his/her head while covering their face from sunlight.
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8053840 | Thin film transistor comprising novel conductor and dielectric compositions The invention relates to thin film transistors comprising novel dielectric layers and novel electrodes comprising metal compositions that can be provided by a dry thermal transfer process. ... | 11/08/2011 |
| 7919815 | Spinel wafers and methods of preparation Wafer suitable for semiconductor deposition application can be fabricated to have low bow, warp, total thickness variation, taper, and total indicated reading properties. The wafers can be fabricated by cutting a boule to produce rough-cut wafers, lapping the rough-... | 04/05/2011 |
| 7816736 | Method of manufacturing a semiconductor device There is provided a method of removing trap levels and defects, which are caused by stress, from a single crystal silicon thin film formed by an SOI technique. First, a single crystal silicon film is formed by using a typical bonding SOI technique such as Smart-Cut ... | 10/19/2010 |
| 7745880 | Dielectric substrate with reflecting films A semiconductor device has a transparent dielectric substrate such as a sapphire substrate. To enable fabrication equipment to detect the presence of the substrate optically, the back surface of the substrate is coated with a triple-layer light-reflecting film, pref... | 06/29/2010 |
| 7732867 | Method for manufacturing SOQ substrate Hydrogen ions are implanted to a surface (main surface) of the single crystal Si substrate 10 to form the hydrogen ion implanted layer (ion-implanted damage layer) 11. As a result of the hydrogen ion implantation, the hydrogen ion implanted boundary | 06/08/2010 |
| 7714387 | Semiconductor device with thin-film transistors and method of fabricating the same A semiconductor device with a TFT includes a substrate, an island-shaped semiconductor film serving as an active layer of the TFT on or over the substrate, a pair of source/drain regions formed in the semiconductor film, and a channel region formed between the pair ... | 05/11/2010 |
| 7663189 | Silicon-on-sapphire semiconductor device with shallow lightly-doped drain A semiconductor device is created in a doped silicon layer at most one-tenth of a micrometer thick formed on and having an interface with a sapphire substrate. An oppositely doped source region is formed in the silicon layer. A gate electrode is formed above part of... | 02/16/2010 |
| 7564100 | Silicon on sapphire wafer The present invention provides an SOS wafer comprising a non-transparent polysilicon layer provided on a back surface of a sapphire substrate, a silicon nitride layer which protects the polysilicon layer, and a stress relaxing film which cancels stress produced in t... | 07/21/2009 |
| 7528448 | Thin film transistor comprising novel conductor and dielectric compositions The invention relates to thin film transistors comprising novel dielectric layers and novel electrodes comprising metal compositions that can be provided by a dry thermal transfer process. ... | 05/05/2009 |
| 7525157 | Semiconductor device and manufacturing method thereof A semiconductor device includes: an insulating layer selectively formed on the semiconductor base material; a first semiconductor layer made of single-crystal and formed on the semiconductor base material that is exposed below the insulating layer, the first semicon... | 04/28/2009 |
| 7436027 | Semiconductor device and fabrication method for the same In a semiconductor device including a monocrystalline thin film transistor 16a that has been formed on a monocrystalline Si wafer 100 and then is transferred to a insulating substrate 2, LOCOS oxidization is performed with respect to the ... | 10/14/2008 |
| 7423324 | Double-gate MOS transistor, double-gate CMOS transistor, and method for manufacturing the same In a double-gate MOS transistor, a substrate, an insulating layer, and a semiconductor layer are formed or laminated in that order, an opening extending to the insulating layer is formed in the semiconductor layer while leaving an island-shaped region, the island-sh... | 09/09/2008 |
| 7417286 | Semiconductor integrated circuit devices having single crystalline thin film transistors and methods of fabricating the same Semiconductor integrated circuit devices having single crystalline thin film transistors and methods of fabricating the same are provided. The semiconductor integrated circuit devices include an interlayer insulating layer formed on a semiconductor substrate and a s... | 08/26/2008 |
| 7411250 | Radiation-hardened silicon-on-insulator CMOS device, and method of making the same A silicon-on-insulator metal oxide semiconductor device comprising ultrathin silicon-on-sapphire substrate; at least one P-channel MOS transistor formed in the ultrathin silicon layer; and N-type impurity implanted within the ultrathin silicon layer and the sapphire... | 08/12/2008 |
| 7400030 | Schottky diode with silver layer contacting the ZnO and MgZnO films In the present invention, there is provided semiconductor devices such as a Schottky UV photodetector fabricated on n-type ZnO and MgxZn1-xO epitaxial films. The ZnO and MgxZn1-xO films are grown on R-plane sapphire substr... | 07/15/2008 |
| RE40339 | Silicon-on-insulator chip having an isolation barrier for reliability An SOI chip having an isolation barrier. The SOI chip includes a substrate, an oxide layer deposited on the substrate, and a silicon layer deposited on the oxide layer. A gate is deposited above the silicon layer. A first metal contact is deposited above the gate to... | 05/27/2008 |
| 7361592 | Method for producing a component comprising at least one germanium-based element and component obtained by such a method The method successively comprises production, on a substrate, of a stack of layers comprising at least one first layer made from germanium and silicon compound initially having a germanium concentration comprised between 10% and 50%. The first layer is arranged betw... | 04/22/2008 |
| 7355247 | Silicon on diamond-like carbon devices Embodiments of the invention provide substrate with an insulator layer on the substrate. The insulator layer may include diamond-like carbon. A device, such a tri-gate transistor may be formed on the diamond-like carbon layer. ... | 04/08/2008 |
| 7348226 | Method of forming lattice-matched structure on silicon and structure formed thereby A method (and resultant structure) of forming a semiconductor structure, includes processing an oxide to have a crystalline arrangement, and depositing an amorphous semiconductor layer on the oxide by one of evaporation and chemical vapor deposition (CVD). ... | 03/25/2008 |
| 7335950 | Semiconductor device and method of making thereof To provide a thin film transistor having a low OFF characteristic and to provide P-channel type and N-channel type thin film transistors where a difference in characteristics of the P-channel type and the N-channel type thin film transistors is corrected, a region | 02/26/2008 |
| 7322015 | Simulating a dose rate event in a circuit design Behaviors of a transistor during a dose rate event can be modeled using a circuit simulation software package. A subcircuit model replaces a transistor in a circuit design to be simulated. The subcircuit model can be in the form of a schematic-based representation o... | 01/22/2008 |
| 7320931 | Interfacial layer for use with high k dielectric materials Methods and apparatus are provided for depositing a layer of pure germanium can on a silicon substrate. This germanium layer is very thin, on the order of about 14 Å, and is less than the critical thickness for pure germanium on silicon. The germanium layer serves... | 01/22/2008 |
| 7285495 | Methods for thermally treating a semiconductor layer A method for thermally treating a semiconductor layer is described. An embodiment of the technique includes implanting atomic species into a first surface of a donor wafer to form a zone of weakness at a predetermined depth that defines the thickness of a transfer l... | 10/23/2007 |
| 7283111 | Display device and method of driving thereof False contouring during display by time division gray scales can be prevented with high efficiency. The order of appearance of subframe periods, and the times at which the subframe periods begin, are changed between pixels driven by odd number gate signal lines and ... | 10/16/2007 |
| 7282449 | Thermal treatment of a semiconductor layer A method for thermally treating a silicon germanium semiconductor layer from a donor wafer is described. An embodiment of the technique includes co-implanting atomic species into a first surface of the donor wafer to form a zone of weakness at a predetermined depth ... | 10/16/2007 |
| 7276428 | Methods for forming a semiconductor structure Methods for forming a semiconductor structure are described. In an embodiment, the technique includes providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface, implanting atomic species ... | 10/02/2007 |
| 7274036 | Gate shorted to body thin film transistor, manufacturing method thereof, and display including the same A TFT including a gate metallic layer, a body layer doped with a dopant having a first polarity, a source layer and a drain layer doped with a dopant having a second polarity, a semiconductor layer formed between the source layer and the drain layer, and a contact c... | 09/25/2007 |
| 7259428 | Semiconductor device using SOI structure having a triple-well region A semiconductor device includes a support substrate, a buried insulation film, provided on the support substrate, having a thickness of 5 to 10 nm, a silicon layer provided on the buried insulation film, a MOSFET provided in the silicon layer, and a triple-well regi... | 08/21/2007 |
| 7247908 | Method of fabricating a FinFET A FinFET structure and method of forming a FinFET device. The method includes: (a) providing a semiconductor substrate, (b) forming a dielectric layer on a top surface of the substrate; (c) forming a silicon fin on a top surface of the dielectric layer; (d) forming ... | 07/24/2007 |
| 7244990 | Semiconductor device On an SOI substrate, a hydrogen ion implantation section in which distribution of hydrogen ions peaks in a BOX layer (buried oxide film layer), and a single-crystal silicon thin-film transistor are formed. Then this SOI substrate is bonded with an insulating substra... | 07/17/2007 |
| 7229898 | Methods for fabricating a germanium on insulator wafer Improved fabrication processes for manufacturing GeOI type wafers are disclosed. In an implementation, a method for fabricating a germanium on insulator wafer includes providing a source substrate having a surface, at least a layer of germanium and a weakened area. ... | 06/12/2007 |
| 7229018 | Manufacture of RFID tags and intermediate products therefor In the manufacture of RFID tags, electronic components are connected with soldered connections to antennas stamped from a thin strip of electrically conductive metal, utilizing methods and intermediate products which enable accurate registration of the leads of the ... | 06/12/2007 |
| 7221032 | Semiconductor device including FinFET having vertical double gate structure and method of fabricating the same A semiconductor device includes a semiconductor layer formed on a semiconductor substrate via an insulating film and having a projecting shape, a gate electrode formed, via a gate insulating film, on a pair of side surfaces of four side surfaces of the semiconductor... | 05/22/2007 |
| 7214570 | Encapsulating a device An encapsulation for an electrical device is disclosed. A cap support is provided in the non-active regions of the device to prevent the package from contacting the active components of the device due to mechanical stress induced in the package. ... | 05/08/2007 |
| 7214592 | Method and apparatus for forming a semiconductor substrate with a layer structure of activated dopants Methods of forming semiconductor devices with a layered structure of thin and well defined layer of activated dopants, are disclosed. In a preferred method, a region in a semiconductor substrate is amorphized, after which the region is implanted with a first dopant ... | 05/08/2007 |
| 7208804 | Crystalline or amorphous medium-K gate oxides, Y0and Gd0 A gate oxide and method of fabricating a gate oxide that produces a more reliable and thinner equivalent oxide thickness than conventional SiO2 gate oxides are provided. Also shown is a gate oxide with a conduction band offset of 2 eV or greater. Gate oxi... | 04/24/2007 |
| 7208803 | Method of forming a raised source/drain and a semiconductor device employing the same A method of forming a raised source/drain proximate a spacer of a gate of a transistor on a substrate, and a semiconductor device of an integrated circuit employing the same. In one embodiment, the method includes orienting the gate substantially along a direc... | 04/24/2007 |
| 7198671 | Layered substrates for epitaxial processing, and device A substrate comprising at least two layers which have different thermal expansion coefficients (TECs) is used for subsequent epitaxial growth of semiconductors. A typical example is an epitaxial growth of III-V Nitride (InGaAlBNAsP alloy semiconductor) on sapphire. ... | 04/03/2007 |
| 7187057 | Nitrogen controlled growth of dislocation loop in stress enhanced transistor Known techniques to improve metal-oxide-semiconductor field effect transistor (MOSFET) performance is to add a high stress dielectric layer to the MOSFET. The high stress dielectric layer introduces stress in the MOSFET that causes electron mobility drive current to... | 03/06/2007 |
| 7180109 | Field effect transistor and method of fabrication The present invention is a novel field effect transistor having a channel region formed from a narrow bandgap semiconductor film formed on an insulating substrate. A gate dielectric layer is formed on the narrow bandgap semiconductor film. A gate electrode is then f... | 02/20/2007 |