A kissing shield comprised of a thin, flexible membrane and a frame or holder.
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| Number | Title | Issue Date |
| 7544964 | Method for fabricating thin layer device A method for producing a thin layer device such as a superconductive device excellent in mechanical strength and useful as a submillimeter band receiver is provided. The thin layer device is produced by forming a multilayer structure substance comprising an NbN/MgO/... | 06/09/2009 |
| 7439089 | Method of fabricating array substrate having color filter on thin film transistor structure In a liquid crystal display device substrate, an insulating layer covers a thin film transistor. Another insulating layer covers a black matrix, which is formed on the insulating layer and covers the thin film transistor, a gate line, and a data line except a portio... | 10/21/2008 |
| 7342266 | Field effect transistors with dielectric source drain halo regions and reduced miller capacitance A field effect transistor (FET) device includes a gate conductor and gate dielectric formed over an active device area of a semiconductor substrate. A drain region is formed in the active device area of the semiconductor substrate, on one side of the gate conductor,... | 03/11/2008 |
| 7332738 | Quantum phase-charge coupled device A method for reading out the state of a mesoscopic phase device. In the method the mesoscopic phase device is coherently coupled to a mesoscopic charge device using a phase shift device and the quantum state of the mesoscopic charge device is measured. A method for ... | 02/19/2008 |
| 7326686 | Compounds and methods for regulating cell adhesion Methods for using modulating agents to enhance or inhibit cadherin-mediated cell adhesion in a variety of in vivo and in vitro contexts are provided. In particular, the modulating agents may be used in the therapy of multiple sclerosis and other demyelinating diseas... | 02/05/2008 |
| 7314765 | Switching device using superlattice without any dielectric barriers A switching device has an S (Superconductor)-N (Normal Metal)-S superlattice to control the stream of electrons without any dielectric materials. Each layer of said Superconductor has own terminal. The superlattice spacing is selected based on “Dimensional Crossov... | 01/01/2008 |
| 7312182 | Rare earth metal compounds for use in high critical temperature thin film super-conductors Rare earth metal containing compounds of the formula Sr2LuSbO6 and Sr2LaSbO6 have been prepared as high critical temperature thin film superconductor structures, and can be used in other ferroelectrics, pyroelectrics, piez... | 12/25/2007 |
| 7253069 | Method for manufacturing silicon-on-insulator wafer A method for manufacturing a SOI wafer includes a step of heat-treating a wafer in a furnace to form an SOI wafer including a silicon support, an insulating layer containing oxide, and a superficial silicon layer arranged in that order and a step of unloading the SO... | 08/07/2007 |
| 7224019 | Semiconductor device and method of manufacture thereof A semiconductor device comprises a semiconductor substrate, an electrically rewritable semiconductor memory cell provided on the semiconductor substrate, the memory cell comprising an island semiconductor portion provided on the surface of the semiconductor substrat... | 05/29/2007 |
| 7176483 | Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions An electrical junction that includes a semiconductor (e.g., C, Ge, or an Si-based semiconductor), a conductor, and an interface layer disposed therebetween. The interface layer is sufficiently thick to depin a Fermi level of the semiconductor, yet sufficiently thin ... | 02/13/2007 |
| 7138369 | Compounds and methods for modulating apoptosis Cyclic peptides and compositions comprising such cyclic peptides are provided. The cyclic peptides comprise a classical cadherin cell adhesion recognition sequence HAV. Methods for using such peptides and compositions for inducing apoptosis in cadherin-expressing ce... | 11/21/2006 |
| 7122623 | Compounds and methods for modulating cell adhesion Cyclic peptides comprising a cadherin cell adhesion recognition sequence HAV, and compositions comprising such cyclic peptides, are provided. Methods for using such peptides for modulating cadherin-mediated cell adhesion in a variety of contexts are also provided. | 10/17/2006 |
| 7105852 | High speed electron tunneling devices A detector includes a voltage source for providing a bias voltage and first and second non-insulating layers, which are spaced apart such that the bias voltage can be applied therebetween and form an antenna for receiving electromagnetic radiation and directing it t... | 09/12/2006 |
| 7105853 | Self-aligned junction passivation for superconductor integrated circuit A superconductor integrated circuit (1) includes an anodization ring (35) disposed around a perimeter of a tunnel junction region (27) for preventing a short-circuit between an outside contact (41) and the base electrode layer (18)... | 09/12/2006 |
| 7060508 | Self-aligned junction passivation for superconductor integrated circuit A superconductor integrated circuit (1) includes an anodization ring (35) disposed around a perimeter of a tunnel junction region (27) for preventing a short-circuit between an outside contact (41) and the base electrode layer (18)... | 06/13/2006 |
| 7049593 | Superconducting single photon detector A single-photon detector includes a superconductor strip biased near its critical current. The superconductor strip provides a discernible output signal upon absorption of a single incident photon. In one example, the superconductor is a strip of NbN (niobium nitrid... | 05/23/2006 |
| 7041343 | Method for providing a substrate structure for oriented neurite outgrowth, substrate structure, and device for monitoring neuron The invention relates to a method for providing a substrate structure for oriented neurite outgrowth, wherein a basic substrate is provided, characterized in that at least one alignment layer is deposited on said substrate and a mono- or multi-layer of a liquid crys... | 05/09/2006 |
| 7030379 | Methods for detecting photons, radiations or neutrons using superconductors and methods for obtaining two-dimensional images thereof In the improved neutron image detector, MgB2 enriched in a constituent element 10B of wide energy gap is used as a neutron detection plate, which is provided at the center and the four corners with a phonon sensor comprising an insulation layer... | 04/18/2006 |
| 7002174 | Characterization and measurement of superconducting structures A structure comprising a tank circuit inductively coupled to a flux qubit or a phase qubit. In some embodiments, a low temperature preamplifier is in electrical communication with the tank circuit. The tank circuit comprises an effective capacitance and an effective... | 02/21/2006 |
| 6999806 | High temperature superconducting josephson junctin, superconducting electronic device provided with the former and method of manufacturing high temperature superconducting josephson junction A Josephson junction having a barrier layer sandwiched by two superconductors wherein the superconductors include one or more elements selected from the group of Y, La, Nd, Sm, Eu, Gd, Dy, Ho, Er, Tm, Yb and Lu, one or more elements selected from the group of Ba, Sr... | 02/14/2006 |
| 6998656 | Transparent double-injection field-effect transistor A double-injection field-effect transistor has an anode, a cathode, a substantially transparent channel, a substantially transparent gate insulator, and at least one substantially transparent gate electrode. The transistor may also have a substantially transparent a... | 02/14/2006 |
| 6995390 | Switching device using superlattice without any dielectric barriers A switching device has an S (Superconductor)-N (Normal Metal)-S superlattice to control the stream of electrons without any dielectric materials. Each layer of said Superconductor has own terminal. The superlattice spacing is selected based on “Dimensional Crossov... | 02/07/2006 |
| 6987282 | Quantum bit with a multi-terminal junction and loop with a phase shift A solid-state quantum computing qubit includes a multi-terminal junction coupled to a superconducting loop where the superconducting loop introduces a phase shift to the superconducting order parameter. The ground state of the supercurrent in the superconducting loo... | 01/17/2006 |
| 6971165 | Method for fabrication of separators for electrode pairs in diodes An improved method for manufacturing a matching pair of electrodes comprises the steps of: fabricating a first electrode with a substantially flat surface; depositing islands of an oxidizable material over regions of the surface; depositing a layer of a third materi... | 12/06/2005 |
| 6967238 | Compounds and methods for modulating cell adhesion Cyclic peptides comprising a cadherin cell adhesion recognition sequence HAV, and compositions comprising such cyclic peptides, are provided. Methods for using such peptides for modulating cadherin-mediated cell adhesion in a variety of contexts are also provided. | 11/22/2005 |
| 6919579 | Quantum bit with a multi-terminal junction and loop with a phase shift A solid-state quantum computing qubit includes a multi-terminal junction coupled to a superconducting loop where the superconducting loop introduces a phase shift to the superconducting order parameter. The ground state of the supercurrent in the superconducting loo... | 07/19/2005 |
| 6914044 | Compounds and methods for modulating cell adhesion Cyclic peptides and compositions comprising such cyclic peptides are provided. The cyclic peptides comprise a cadherin cell adhesion recognition sequence HAV. Methods for using such peptides and compositions for modulating cadherin-mediated cell adhesion in a variet... | 07/05/2005 |
| 6911665 | Superconducting integrated circuit and method for fabrication thereof A superconducting integrated circuit includes a substrate, a multilayer structure formed on the substrate and composed of a lower superconducting electrode, a tunnel barrier and an upper superconducting electrode sequentially joined together upward in the order ment... | 06/28/2005 |
| 6790675 | Josephson device and fabrication process thereof A method of fabricating a Josephson device includes the steps of forming a first superconducting layer and forming a second superconducting layer to form a Josephson junction therebetween, wherein the step of forming the second superconducting layer includes the ste... | 09/14/2004 |
| 6777808 | Capacitor for signal propagation across ground plane boundaries in superconductor integrated circuits The self inductance associated with a capacitance A52 in a superconductor integrated circuit (FIG. 1) is reduced by adding a layer of superconductor metal (A54) overlying the capacitor, effectively producing a negative inductance to counteract t... | 08/17/2004 |
| 6750473 | Transistor design for use in the construction of an electronically driven display A transistor having a channel width, W, and a channel length, L, defined by non-rectangular electrodes. The transistor is a thin film field effect transistor having an insulated gate electrode. One of a source and drain electrodes is connected to a display electrode... | 06/15/2004 |
| 6649929 | Quantum computing with d-wave superconductors A method and structure for a d-wave qubit structure includes a qubit disk formed at a multi-crystal junction (or qubit ring) and a superconducting screening structure surrounding the qubit. The structure may also include a superconducting sensing loop, wh... | 11/18/2003 |
| 6545291 | Transistor design for use in the construction of an electronically driven display A transistor having a channel width, W, and a channel length, L, defined by non-rectangular electrodes. The transistor is a thin film field effect transistor having an insulated gate electrode. One of a source and drain electrodes is connected to a displa... | 04/08/2003 |
| 6495854 | Quantum computing with d-wave superconductors A method and structure for a d-wave qubit structure includes a qubit disk formed at a multi-crystal junction (or qubit ring) and a superconducting screening structure surrounding the qubit. The structure may also include a superconducting sensing loop, wh... | 12/17/2002 |
| 6429494 | Semiconductor read-only memory and method of manufacturing the same A semiconductor read-only memory (ROM) has trenches and vertical transistors. The trenches are filled with insulator material during the manufacturing process. Holes, which are as wide as the trenches are etched into the insulator at regions where word li... | 08/06/2002 |
| 6426539 | Bolometric detector with intermediate electrical insulation and manufacturing process for this detector Bolometric detector with intermediate electrical insulation and manufacturing process for this detector. According to the invention, at least two electrodes are formed facing the same face of a layer of bolometric material (5) and starting from the same l... | 07/30/2002 |
| 6365912 | Superconducting tunnel junction device A superconductive tunnel junction device in which quasiparticles in a superconductive region (S1), relax into a normal metal trap (N1) releasing their potential energy in electron-electron interactions to increase the number of excit... | 04/02/2002 |
| 6353234 | Layered arrangement and component containing the latter The invention concerns a layered arrangement comprising at least one layer based on a high-temperature superconductive material with at least one unit cell having a CuO2 plane, the layer being connected to a non-supeconductive layer. A modified... | 03/05/2002 |
| 6348699 | Josephson junction array device, and manufacture thereof A superconductive device is disclosed, which has specific characteristics of a generator and/or detector of sub-millimeter wave length radiation, comprising a two-dimensional lateral array of mesas (column-shaped elements) each containing vertically stack... | 02/19/2002 |
| 6274412 | Material and method for printing high conductivity electrical conductors and other components on thin film transistor arrays A process sequence is disclosed for fabricating arrays of Thin Film Transistors by printing metallic conductors for the gate and data lines and possibly the Indium Tin Oxide Pixel electrode as well. The process eliminates conventional step-and-repeat phot... | 08/14/2001 |