Did You Know...
...that Thomas Edison's patent application on his phonograph was approved by the Patent Office in just seven weeks? In contrast, it took Gordon Gould, the inventor of the laser, 30 years to obtain his patent -- finally awarded in 1988!
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| Number | Title | Issue Date |
| 8232588 | Increasing the surface area of a memory cell capacitor Methods and apparatuses to increase a surface area of a memory cell capacitor are described. An opening in a second insulating layer deposited over a first insulating layer on a substrate is formed. The substrate has a fin. A first insulating layer is deposited over... | 07/31/2012 |
| 8232587 | Method of forming a metal-insulator-metal capacitor A method of forming a metal-insulator-metal capacitor has the following steps. A stack dielectric structure is formed by alternately depositing a plurality of second dielectric layers and a plurality of third dielectric layers. A wet etch selectivity of the second d... | 07/31/2012 |
| 8154065 | Semiconductor memory devices including a vertical channel transistor having a buried bit line Semiconductor memory devices include a semiconductor substrate and a plurality of semiconductor material pillars in a spaced relationship on the semiconductor substrate. Respective surrounding gate electrodes surround ones of the pillars. A first source/drain region... | 04/10/2012 |
| 8129773 | Fin-type field effect transistor Disclosed herein are improved fin-type field effect transistor (FinFET) structures and the associated methods of manufacturing the structures. In one embodiment FinFET drive current is optimized by configuring the FinFET asymmetrically to decrease fin resistance bet... | 03/06/2012 |
| 8106439 | Fin-type field effect transistor Disclosed herein are improved fin-type field effect transistor (FinFET) structures and the associated methods of manufacturing the structures. In one embodiment FinFET drive current is optimized by configuring the FinFET asymmetrically to decrease fin resistance bet... | 01/31/2012 |
| 7989867 | Semiconductor memory device having a semiconductor layer disposed between first and second gate electrodes A semiconductor memory device includes a semiconductor substrate, a semiconductor layer, a source/drain layer, first and second insulating films, and first and second gate electrodes. The semiconductor layer of one conductivity type is formed on a principal surface ... | 08/02/2011 |
| 7915659 | Devices with cavity-defined gates and methods of making the same A method that includes forming a semiconductor fin, forming a sacrificial material adjacent the semiconductor fin, covering the sacrificial material with a dielectric material, forming a cavity by removing the sacrificial material from under the dielectric material,... | 03/29/2011 |
| 7902584 | Semiconductor memory device and manufacturing method thereof This disclosure concerns a semiconductor memory device including a substrate; an insulating film provided above the substrate; a semiconductor layer provided above the insulating film and extending in a plane which is parallel to a surface of the substrate; a first ... | 03/08/2011 |
| 7888724 | Capacitors for semiconductor memory devices A capacitor of a semiconductor memory device, and methods of forming the same, are disclosed. A pad interlayer insulating layer is disposed on a semiconductor substrate of an active region. Landing pads and a central landing pad are disposed in peripheral portions a... | 02/15/2011 |
| 7872293 | Capacitance cell, semiconductor device, and capacitance cell arranging method A capacitance cell 21 is wired while using adjacent wiring layers Ma and Mb as a pair of electrode layers T1 and T2 orthogonally to opposed lateral end faces out of lateral end faces X1, X2, Y1, and Y2 that section th... | 01/18/2011 |
| 7863666 | Capacitor pair structure for increasing the match thereof A capacitor pair structure for increasing the match thereof has two finger electrode structures interlacing with each other in parallel and a common electrode being between the two finger electrode structures to form a capacitor pair structure with an appropriate ra... | 01/04/2011 |
| 7781820 | Semiconductor memory device and method of manufacturing the same The semiconductor memory device includes: an interlayer insulating film that is formed on a semiconductor substrate; an insulating film that is formed on the interlayer insulating film and has a cylinder hole; and a capacitor that has an impurity-containing silicon ... | 08/24/2010 |
| 7763926 | Semiconductor device manufacturing method and semiconductor device A technique is provided which makes it possible to achieve both of a reduction in contact resistance in a memory device and a reduction in contact resistance in a logic device even when oxidation is performed during formation of dielectric films of capacitors. Condu... | 07/27/2010 |
| 7741672 | Bridged gate FinFet In a fin-type field effect transistor (FinFET) structure, a gate strap is positioned on the top of a gate conductor and runs along the gate conductor. The top of the gate strap is positioned a greater height above the top surface of the substrate than the top of the... | 06/22/2010 |
| 7719043 | Semiconductor device with fin-type field effect transistor and manufacturing method thereof. The present invention relates to a semiconductor device including a Fin type field effect transistor (FET) having a protrusive semiconductor layer protruding from a substrate plane, a gate electrode formed so as to straddle the protrusive semiconductor layer, a gate... | 05/18/2010 |
| 7633112 | Metal-insulator-metal capacitor and method of manufacturing the same A metal-insulator-metal capacitor includes a first electrode in a first wiring level, a second electrode above the first wiring level and extending into a first portion of the first electrode that surrounds the second electrode, and a dielectric film separating the ... | 12/15/2009 |
| 7576383 | Capacitor having tapered cylindrical storage node and method for manufacturing the same A capacitor is made by forming a buffer oxide layer, an etching stop layer, and a mold insulation layer over a semiconductor substrate having a storage node contact plug. The mold insulation layer and the etching stop layer are etched to form a hole in an upper port... | 08/18/2009 |
| 7485913 | Semiconductor memory device and method for fabricating the same A semiconductor memory device includes a memory cell and a dummy cell. The amount of leakage current per unit area in a capacitor in the dummy cell is larger than that in a capacitor in the memory cell. ... | 02/03/2009 |
| 7476924 | Semiconductor device having recessed landing pad and its method of fabrication A semiconductor device having a recessed landing pad includes a semiconductor substrate and a lower interlayer dielectric layer disposed on the semiconductor substrate. A first landing pad is disposed through the lower interlayer dielectric layer to be in contact wi... | 01/13/2009 |
| 7456463 | Capacitor having electrodes at different depths to reduce parasitic capacitance Capacitors are disclosed having reduced parasitic capacitance. In one embodiment, the capacitor includes a first set of electrodes, each electrode of the first set extending through at least one of a plurality of back-end-of-line (BEOL) layers above a substrate; a s... | 11/25/2008 |
| 7453114 | Segmented end electrode capacitor and method of segmenting an end electrode of a capacitor An exemplary embodiment providing one or more improvements includes a capacitor with a segmented end electrode and methods for segmenting an end electrode of a capacitor for reducing or eliminating instances of thermally induced damage of the capacitor. ... | 11/18/2008 |
| 7442981 | Capacitor of semiconductor device and method of fabricating the same Provided is a capacitor of a semiconductor device and a method of fabricating the same. In one embodiment, the capacitor includes a lower electrode formed on a semiconductor substrate; a dielectric layer formed on the lower electrode; and an upper electrode that is ... | 10/28/2008 |
| 7439569 | Semiconductor device manufacturing method and semiconductor device A technique is provided which makes it possible to achieve both of a reduction in contact resistance in a memory device and a reduction in contact resistance in a logic device even when oxidation is performed during formation of dielectric films of capacitors. Condu... | 10/21/2008 |
| 7423310 | Charge-trapping memory cell and charge-trapping memory device The memory cell is arranged in a ridge of semiconductor material forming a fin with sidewalls and a channel region between source and drain regions. Memory layer sequences provided for charge-trapping are applied to the sidewalls, and gate electrodes are arranged on... | 09/09/2008 |
| 7417275 | Capacitor pair structure for increasing the match thereof A capacitor pair structure for increasing the match thereof has two finger electrode structures interlacing with each other in parallel and a common electrode being between the two finger electrode structures to form a capacitor pair structure with an appropriate ra... | 08/26/2008 |
| 7413951 | Stacked capacitor and method for producing stacked capacitors for dynamic memory cells A method produces stacked capacitors for dynamic memory cells, in which a number of trenches (48) are formed in the masking layer (40), each trench (48) being arranged above a respective contact plug (26) and extending from the top (42... | 08/19/2008 |
| 7388243 | Self-Aligned buried contact pair A self-aligned buried contact (BC) pair includes a substrate having diffusion regions; an oxide layer exposing a pair of diffusion regions formed on the substrate; bit lines formed between adjacent diffusion regions and on the oxide layer, each of the bit lines havi... | 06/17/2008 |
| 7385241 | Vertical-type capacitor structure Disclosed are a vertical-type capacitor and a formation method thereof. The capacitor includes a first electrode wall and a second electrode wall perpendicular to a semiconductor substrate, and at least one dielectric layer on the substrate to insulate the first ele... | 06/10/2008 |
| 7382014 | Semiconductor device with capacitor suppressing leak current A semiconductor device with a capacitor includes a lower electrode, a dielectric and an upper electrode on the dielectric layer. The dielectric layer including more than one polycrystalline tantalum oxide layer and more than one separation layer, wherein the polycry... | 06/03/2008 |
| 7378739 | Capacitor and light emitting display using the same A capacitor including a polysilicon layer doped with impurities to be conductive, a first dielectric layer formed on the polysilicon layer, a first conductive layer formed on the first dielectric layer, a second dielectric layer formed on the first conductive layer,... | 05/27/2008 |
| 7375376 | Semiconductor display device and method of manufacturing the same A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulating film is prevented from esca... | 05/20/2008 |
| 7371678 | Semiconductor device with a metal line and method of forming the same A semiconductor device with a metal line and a method of forming the same. The method includes forming an insulation layer on a semiconductor substrate including a predetermined lower structure, forming a vertical hole and a horizontal hole by etching the insulation... | 05/13/2008 |
| 7368344 | Methods of reducing floating body effect Methods of reducing the floating body effect in vertical transistors are disclosed. The floating body effect occurs when an active region in a pillar is cut off from the substrate by a depletion region and the accompanying electrostatic potential created. In a prefe... | 05/06/2008 |
| 7361950 | Integration of a MIM capacitor with a plate formed in a well region and with a high-k dielectric A MIM capacitor is formed on a semiconductor substrate having a top surface and including regions formed in the surface selected from a Shallow Trench Isolation (STI) region and a doped well having exterior surfaces coplanar with the semiconductor substrate. A capac... | 04/22/2008 |
| 7355233 | Apparatus and method for multiple-gate semiconductor device with angled sidewalls A multiple-gate transistor has an active region with a side that forms an interior angle with the base of the active region of less than 80°. A process for fabricating a FinFET includes the steps of etching a silicon-on-insulator wafer to form an active region, inc... | 04/08/2008 |
| 7355234 | Semiconductor device including a stacked capacitor A stacked capacitor formed in a capacitor hole includes a bottom electrode, capacitor insulation film and a top electrode. The bottom electrode includes a plurality of islands formed on an underlying insulating film, and a metallic film covering the islands on the u... | 04/08/2008 |
| 7348246 | Methods of fabricating non-volatile memory devices including divided charge storage structures A semiconductor memory device includes a substrate having first and second source/drain regions therein and a channel region therebetween. The device also includes first and second charge storage layers on the channel region, a first insulating layer on the channel ... | 03/25/2008 |
| 7341916 | Self-aligned nanometer-level transistor defined without lithography A field effect transistor (FET) device structure and method for forming FETs for scaled semiconductor devices. Specifically, FinFET devices are fabricated from silicon-on-insulator (SOI) wafers in a highly uniform and reproducible manner. The method facilitates form... | 03/11/2008 |
| 7342314 | Device having a useful structure and an auxiliary structure The present invention provides a device having a useful structure which is arranged on a substrate and has a useful structure side edge. In addition, an auxiliary structure is arranged on the substrate adjacent to the useful structure, the auxiliary structure having... | 03/11/2008 |
| 7342276 | Method and apparatus utilizing monocrystalline insulator A semiconductor device, including: a semiconductor material; a conductive element; and a substantially monocrystalline insulator disposed between the semiconductor material and the conductive eleme... | 03/11/2008 |
