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| Number | Title | Issue Date |
| 7851830 | Multigate Schottky diode A multigate Schottky diode comprising an electrically conducting active semiconductor region; first and second electrically connected metallic contact arms on the active semiconductor region forming ohmic contacts therewith; th... | 12/14/2010 |
| 7361536 | Method of fabrication of a field effect transistor with materialistically different two etch stop layers in an enhanced mode transistor and an depletion mode transistor A semiconductor structure a structure with an enhancement mode transistor device disposed in a first region and depletion mode transistor device disposed in a laterally displaced second region. The structure has a channel layer for the depletion mode and enhancement... | 04/22/2008 |
| 7351377 | Methods and devices for enhancing bonded substrate yields and regulating temperature Methods and devices that include the use of venting elements for enhancing bonded substrate yields and regulating temperature. Venting elements are generally fabricated proximal to functionalized regions in substrate surfaces to prevent bond voids that form during b... | 04/01/2008 |
| 7345350 | Process and integration scheme for fabricating conductive components, through-vias and semiconductor components including conductive through-wafer vias A method for forming a conductive via in a semiconductor component is disclosed. The method includes providing a substrate having a first surface and an opposing, second surface. At least one hole is formed in the substrate extending between the first surface and th... | 03/18/2008 |
| 7335395 | Methods of using pre-formed nanotubes to make carbon nanotube films, layers, fabrics, ribbons, elements and articles Methods of Using Preformed Nanotubes to Make Carbon Nanotube Films, Layers, Fabrics, Ribbons, Elements and Articles are disclosed. To make various articles, certain embodiments provide a substrate. Preformed nanotubes are applied to a surface of the substrate to cre... | 02/26/2008 |
| 7176505 | Electromechanical three-trace junction devices Three trace electromechanical circuits and methods of using same. A circuit includes first and second electrically conductive elements with a nanotube ribbon (or other electromechanical elements) disposed therebetween. An insulative layer is disposed on one of the f... | 02/13/2007 |
| 7135718 | Diode device and transistor device A semiconductor device having improved breakdown voltage is provided. A diode device of the present invention includes relay diffusion layers provided between guard ring portions. Therefore, a depletion layer expanded outward from the guard ring portions except the ... | 11/14/2006 |
| 7120047 | Device selection circuitry constructed with nanotube technology A memory system having electromechanical memory cells and decoders is disclosed. A decoder circuit selects at least one of the memory cells of an array of such cells. Each cell in the array is a crossbar junction at least one element of which is a nanotube or a nano... | 10/10/2006 |
| 6979590 | Methods of making electromechanical three-trace junction devices Methods of producing an electromechanical circuit element are described. A lower structure having lower support structures and a lower electrically conductive element is provided. A nanotube ribbon (or other electromechanically responsive element) is formed on an up... | 12/27/2005 |
| 6929987 | Microelectronic device fabrication method In a method of forming a semiconductor device with a first channel layer formed over a portion of a second channel layer, a portion of the second channel underlying the first channel is etched so as to form an overhanging ledge in the first channel, and then a metal... | 08/16/2005 |
| 6921945 | Semiconductor device with structure for improving breakdown voltage A semiconductor layer (10) provided on a BOX (buried oxide) layer (2) includes a first P-type region (11), an N+-type region (12), and an N−type region (13) which together form a diode. A plurality of second... | 07/26/2005 |
| 6919592 | Electromechanical memory array using nanotube ribbons and method for making same Electromechanical circuits, such as memory cells, and methods for making same are disclosed. The circuits include a structure having electrically conductive traces and supports extending from a surface of the substrate, and nanotube ribbons suspended by the supports... | 07/19/2005 |
| 6911682 | Electromechanical three-trace junction devices Three trace electromechanical circuits and methods of using same are described. A circuit includes first and second electrically conductive elements with a nanotube ribbon (or other electromechanical elements) disposed therebetween. The nanotube ribbon is movable to... | 06/28/2005 |
| 6852615 | Ohmic contacts for high electron mobility transistors and a method of making the same A process and related product in which ohmic contacts are formed in High Electron Mobility Transistors (HEMTs) employing compound substrates such as gallium nitride. An improved device and an improvement to a process for fabrication of ohmic contacts to GaN/AlGaN HE... | 02/08/2005 |
| 6670687 | Semiconductor device having silicon carbide layer of predetermined conductivity type and module device having the same A semiconductor device having a silicon carbide layer of a singular conductivity type. The silicon carbide layer includes a surface having a first region, a second region, and a third region sandwiched between the first region and the second region. An an... | 12/30/2003 |
| 6608325 | Transistor and semiconductor device having columnar crystals A semiconductor device having high carrier mobility, which comprises a substrate provided thereon a base film and further thereon a crystalline non-single crystal silicon film by crystal growth, wherein, the crystals are grown along the crystallographic [... | 08/19/2003 |
| 6590240 | Method of manufacturing unipolar components A method of manufacturing a unipolar component of vertical type in a substrate of a first conductivity type, including the steps of: forming trenches in a silicon layer of the first conductivity type; coating the lateral walls of the trenches with a silic... | 07/08/2003 |
| 6538273 | Ferroelectric transistor and method for fabricating it A ferroelectric transistor is disclosed which has two source/drain regions and a channel region disposed in between in a semiconductor substrate. A metallic intermediate layer is disposed on the surface of the channel region and forms a Schottky diode wit... | 03/25/2003 |
| 6515317 | Sidewall charge-coupled device with multiple trenches in multiple wells Increased pixel density and increased sensitivity to blue light are provided in a charge couple device employing sidewall and surface gates.... | 02/04/2003 |
| 6498381 | Semiconductor structures having multiple conductive layers in an opening, and methods for fabricating same In some embodiments, a circuit structure comprises a semiconductor substrate, an opening passing through the substrate between a first side of the substrate and a second side of the substrate, and a plurality of conductive layers in the opening. In some e... | 12/24/2002 |
| 6476427 | Microwave monolithic integrated circuit and fabrication process thereof A microwave monolithic integrated circuit comprises a T-shaped gate electrode including a Schottky gate electrode formed on a first region of a compound semiconductor substrate, a pair of ohmic electrodes making an ohmic contact with a surface of the subs... | 11/05/2002 |
| 6451667 | Self-aligned double-sided vertical MIMcap A vertical MIM capacitor (140) including a first conductive line (124) and second conductive line (136) sandwiched around a vertical portion of a capacitor dielectric (134). Additional conductive lines (136) may be positioned vertically proximate first co... | 09/17/2002 |
| 6410950 | Geometrically coupled field-controlled-injection diode, voltage limiter and freewheeling diode having the geometrically coupled field-controlled-injection diode A pin diode includes an inner zone, a cathode zone and an anode zone. A boundary surface between the inner zone and the anode zone is at least partly curved and/or at least one floating region having the same conduction type and a higher dopant concentrat... | 06/25/2002 |
| 6365918 | Method and device for interconnected radio frequency power SiC field effect transistors The present invention relates to a method and device for interconnecting radio frequency power SiC field effect transistors. To improve the parasitic source inductance advantage is taken of the small size of the transistors, wherein the bonding pads are p... | 04/02/2002 |
| 6313482 | Silicon carbide power devices having trench-based silicon carbide charge coupling regions therein Silicon carbide power devices having trench-based charge coupling regions include a silicon carbide substrate having a silicon carbide drift region of first conductivity type (e.g., N-type) and a trench therein at a first face thereof. A uniformly doped s... | 11/06/2001 |
| 6144066 | Protection of the logic well of a component including an integrated MOS power transistor The present invention relates to a structure for ground connection on a component including a vertical MOS power transistor and logic components, the substrate of a first type of conductivity of the component corresponding to the drain of the MOS transist... | 11/07/2000 |
| 6097046 | Vertical field effect transistor and diode A vertical field effect transistor (1400) and diode (1450) formed on a single III-V substrate. The diode cathode and the transistor drain or collector may be formed in a common layer (1408).... | 08/01/2000 |
| 5994728 | Field effect transistor and method for producing the same A method for producing a field effect transistor includes: a first step of forming an insulating film over a substrate; a second step of dry etching the insulating film to form a rectangular insulating pattern having side surfaces; a third step of forming... | 11/30/1999 |
| 5962893 | Schottky tunneling device An n-semiconductor layer is arranged on a low-resistance n-substrate. A drain electrode is in ohmic contact with the n-substrate. A source electrode forms a Schottky junction with the n-semiconductor layer. A gate electrode is arranged adjacent to the sou... | 10/05/1999 |
| 5945701 | Static induction transistor A static induction transistor having source, drain and gate regions. Channel regions are defined between adjacent gates and a drift region is defined from the ends of the channel regions to the drain. The channel and drift regions have predetermined dopin... | 08/31/1999 |
| 5864159 | Insulated gate semiconductor device structure to prevent a reduction in breakdown voltage A P- layer (51) is formed between a P base layer (43) and an N- layer (42) so as to be in contact with the P base layer (43), facing an insulating film (46) of a trench (45) with the N- layer (42) between. In the configu... | 01/26/1999 |
| 5814832 | Electron emitting semiconductor device An electron emitting semiconductor device is provided with a P-type semiconductor layer arranged on a semiconductor substrate having an impurity concentration. A Schottky barrier electrode is arranged on a surface of the P-type semiconductor layer. Plural... | 09/29/1998 |
| 5705830 | Static induction transistors A static induction transistor includes a substrate and a drift layer with different doping levels. At least two mesas are formed on the drift layer and a heavily doped region is positioned on a top surface of each of the mesas. A gate contact extends alon... | 01/06/1998 |
| 5612547 | Silicon carbide static induction transistor A static induction transistor fabricated of silicon carbide, preferably 6H polytype, although any silicon carbide polytype may be used. The preferred static induction transistor is the recessed Schottky barrier gate type. Thus, a silicon carbide substrate... | 03/18/1997 |
| 5608244 | Semiconductor diode with reduced recovery current A high speed soft recovery diode having a large breakdown voltage is disclosed. Anode P layers (3) are selectively formed in a top portion of an N- body (2). A P- layer (4a) is disposed in the top portion of the N- body... | 03/04/1997 |
| 5396085 | Silicon carbide switching device with rectifying-gate A silicon carbide switching device includes a three-terminal interconnected silicon MOSFET and silicon carbide MESFET (or JFET) in a composite substrate of silicon and silicon carbide. For three terminal operation, the gate electrode of the silicon carbid... | 03/07/1995 |
| 5264713 | Junction field-effect transistor formed in silicon carbide A junction field-effect transistor is disclosed that comprises a bulk single crystal silicon carbide substrate having respective first and second surfaces opposite one another, the substrate having a single polytype and having a concentration of suitable ... | 11/23/1993 |
| 5250834 | Silicide interconnection with schottky barrier diode isolation In a semiconductor device, an interconnection of differentially doped diffusion regions formed on a substrate includes an interconnecting layer disposed between the two diffusion regions so that the two regions are coupled to one another. The interconnect... | 10/05/1993 |
| 5175597 | Semiconductor component with Schottky junction for microwave amplification and fast logic circuits A semiconducting component with a Schottky junction with stacked electrodes has a lower electrode forming an emitter or source, a central electrode forming a base or grid and an upper electrode forming either a collector or a drain. Semiconductor material... | 12/29/1992 |
| 5138406 | Ion implantation masking method and devices Semiconductor processing techniques and devices are provided using a partially opaque ion implantation mask to control the profile of active layers in microwave and millimeter wave monolithic integrated circuits. An N+ layer can be implanted before or aft... | 08/11/1992 |
