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| Number | Title | Issue Date |
| 8004022 | Field effect transistor A field effect transistor includes a GaN epitaxial substrate, a gate electrode formed on an electron channel layer of the substrate, and source and drain electrodes arranged spaced apart by a prescribed distance on opposite sides of the gate electrode. The source an... | 08/23/2011 |
| 7939861 | Non-volatile memory devices having floating-gates FETs with different source-gate and drain-gate border lengths Non-volatile memory (NVM) devices are disclosed. In one aspect, a NVM device may include a substrate, and a field-effect transistor (FET). The FET may include a first doped region in the substrate and a second doped region in the substrate. The first and the second ... | 05/10/2011 |
| 7859028 | Independently controlled, double gate nanowire memory cell with self-aligned contacts A double gate, dynamic storage device and method of fabrication are disclosed. A back (bias gate) surrounds three sides of a semiconductor body with a front gate disposed on the remaining surface. Two different gate insulators and gate materials may be used. ... | 12/28/2010 |
| 7842981 | Semiconductor device and method of manufacturing the same A semiconductor device includes an active region extending along a first direction on a semiconductor substrate, the active region having a first sidewall and a second sidewall spaced apart and facing each other, a distance between the first and second sidewalls ext... | 11/30/2010 |
| 7638824 | Field effect transistor having a crank-shaped multigate structure A field effect transistor includes a pair of ohmic electrodes and an n-type GaAs layer between the pair of ohmic electrodes and having recesses. Crank-shaped gate fingers are located within the recesses of the n-type GaAs layer between the pair of ohmic electrodes, ... | 12/29/2009 |
| 7592652 | Electro-optical device An object of the present invention is to realize a numerical aperture higher than that of a pixel having a conventional construction by using a pixel circuit having a novel construction in an electro-optical device. Therefore, it is utilized that the electric potent... | 09/22/2009 |
| 7586134 | Semiconductor device with element isolation structure When an STI element isolation structure is formed, it is formed in such a manner that its upper portion protrudes further than the surface of a substrate than by a normal STI method, and a dummy electrode pattern is formed in a gate electrode forming portion. After ... | 09/08/2009 |
| 7501672 | Method and structure for a self-aligned silicided word line and polysilicon plug during the formation of a semiconductor device A method used to form a semiconductor device provides a silicide layer on a plurality of transistor word lines and on a plurality of conductive plugs. In one embodiment, the word lines, one or more sacrificial dielectric layers on the word lines, conductive plugs, a... | 03/10/2009 |
| 7440019 | Solid-state image pick-up device A plurality of low-sensitivity pixels 10 and a plurality of high-sensitivity pixels 20 are arranged like a tetragonal grid respectively, and are provided in positions shifted by ½ of an array pitch from each other in a row direction X and a column dir... | 10/21/2008 |
| 7402852 | Charge coupled device having a back electrode A charge coupled device (CCD) is disclosed which has a semiconductor body (20) comprising polymer or oligomer semiconductor material in place of the conventional silicon. A back electrode (22) of the device is electrically coupled to the semi-conductor... | 07/22/2008 |
| 7354838 | Technique for forming a contact insulation layer with enhanced stress transfer efficiency By removing an outer spacer, used for the formation of highly complex lateral dopant profiles, prior to the formation of metal silicide, a high degree of process compatibility with conventional processes is obtained, while at the same time a contact liner layer may ... | 04/08/2008 |
| 7348814 | Power-on reset circuit A circuit and a method generate a power-on reset signal having a leading part and a trailing part. The circuit includes a startup circuit generating the leading part of the power-on reset signal and a second circuit generating the trailing part of the power-on reset... | 03/25/2008 |
| 7339211 | Semiconductor device and method for fabricating the same Semiconductor devices and methods of manufacture thereof are disclosed that are capable of preventing a short of lower electrodes caused by a leaning or lifting phenomenon while forming the lower electrodes and securing enough capacitance of a capacitor by widening ... | 03/04/2008 |
| 7335930 | Borderless contact structures An SRAM cell. The SRAM cell including: a first gate segment common to a first PFET and a first NFET, a second gate segment common to a second PFET and a second NFET; a first silicide layer contacting a first end of the first gate segment and a drain of the second PF... | 02/26/2008 |
| 7335544 | Method of making MOSFET device with localized stressor A metal-oxide-semiconductor field-effect transistors (MOSFET) having localized stressors is provided. In accordance with embodiments of the present invention, a transistor comprises a high-stress film over the source/drain regions, but not over the gate electrode. T... | 02/26/2008 |
| 7326958 | Solid state imaging device A solid state imaging device includes: a plurality of photoelectric conversion elements which are arranged in a two-dimensional matrix on a semiconductor chip; vertical transfer registers including a vertical transfer channel and vertical transfer electrodes, respec... | 02/05/2008 |
| 7301184 | Solid state image sensor having planarized structure under light shielding metal layer Shift register electrodes are formed in an imaging area and a peripheral area through use of a single layer of conductive film, and a thick insulating film is deposited over those electrodes and planarized. The thick insulating film overlying the shift register elec... | 11/27/2007 |
| 7289183 | Copper conducting wire structure and fabricating method thereof A copper conducting wire structure is for use in the thin-film-transistor liquid crystal display (LCD) device. The copper conducting wire structure includes at least a buffer layer and a copper layer. A fabricating method of the copper conducting wire structure incl... | 10/30/2007 |
| 7285465 | Method of manufacturing a SiC vertical MOSFET A semiconductor device and its manufacturing method are provided in which the trade-off relation between channel resistance and JFET resistance, an obstacle to device miniaturization, is improved and the same mask is used to form a source region and a base region by... | 10/23/2007 |
| 7265397 | CCD imager constructed with CMOS fabrication techniques and back illuminated imager with improved light capture An optical sensor circuit for generating signals corresponding to received photoelectrons is formed on a single monolithic substrate and includes a charge coupled device (CCD) array. The array is formed of a plurality of pixels constructed by a standard CMOS process... | 09/04/2007 |
| 7262102 | Reduction of field edge thinning in peripheral devices A dielectric layer (e.g., an interpoly dielectric layer) is deposited over low and high voltage devices of a peripheral memory device. The dielectric behaves as an oxidation and wet oxide etch barrier. The dielectric prevents the devices from being stripped by a wet... | 08/28/2007 |
| 7242064 | Semiconductor device and method of manufacturing the same In a semiconductor device in which the gate electrode of a MISFET formed on a semiconductor substrate is electrically connected to a well region under the channel of the MISFET, the MISFET is formed in an island-shaped element region formed on the semiconductor subs... | 07/10/2007 |
| 7241662 | Reduction of field edge thinning in peripheral devices A dielectric layer (e.g., an interpoly dielectric layer) is deposited over low and high voltage devices of a peripheral memory device. The dielectric behaves as an oxidation and wet oxide etch barrier. The dielectric prevents the devices from being stripped by a wet... | 07/10/2007 |
| 7233063 | Borderless contact structures A borderless contact structure and method of fabricating the structure, the method including: (a) providing a substrate; (b) forming a polysilicon line on the substrate, the polysilicon line having sidewalls; (c) forming an insulating sidewall layer on the sidewalls... | 06/19/2007 |
| 7226831 | Device with scavenging spacer layer Embodiments of the invention provide a device with a metal gate, a high-k gate dielectric layer and reduced oxidation of a substrate beneath the high-k gate dielectric layer. An oxygen-scavenging spacer layer on side walls of the high-k gate dielectric layer and met... | 06/05/2007 |
| 7223992 | Thermal conducting trench in a semiconductor structure The invention relates to a trench filled with a thermally conducting material in a semiconductor substrate. In one embodiment, the semiconductor device has a trench defining a cell region, wherein a portion of the trench includes a thermally conducting material, and... | 05/29/2007 |
| 7199410 | Pixel structure with improved charge transfer An active pixel is described comprising a semiconductor substrate and a radiation sensitive source of carriers in the substrate, such as for instance, a photodiode. A non-carrier storing, carrier collecting region in the substrate is provided for attracting carriers... | 04/03/2007 |
| 7193253 | Transition metal alloys for use as a gate electrode and devices incorporating these alloys Embodiments of a transition metal alloy having an n-type or p-type work function that does not significantly shift at elevated temperature. The disclosed transition metal alloys may be used as, or form a part of, the gate electrode in a transistor. Methods of formin... | 03/20/2007 |
| 7193252 | Solid-state imaging device and solid-state imaging device array In a photosensitive part 10, arranged from pixels A aligned in n rows and m columns, supply wiring lines 13a and 13b, which are electrically connected and apply transfer voltages to transfer electrodes 12a to 12 | 03/20/2007 |
| 7184083 | Solid state image pickup apparatus of low power consumption and its driving method A charge transfer device whose output end is electrically connected to a charge detector circuit is driven by negative pulse voltage trains to reduce power consumption of the charge detector circuit. ... | 02/27/2007 |
| 7183221 | Method of fabricating a semiconductor having dual gate electrodes using a composition-altered metal layer Fabricating a semiconductor includes depositing a metal layer outwardly from a dielectric layer and forming a mask layer outwardly from a first portion of the metal layer. Atoms are incorporated into an exposed second portion of the metal layer to form a composition... | 02/27/2007 |
| 7176109 | Method for forming raised structures by controlled selective epitaxial growth of facet using spacer Raised structures comprising overlying silicon layers formed by controlled selective epitaxial growth, and methods for forming such raised-structure on a semiconductor substrate are provided. The structures are formed by selectively growing an initial epitaxial laye... | 02/13/2007 |
| 7166879 | Photogate for use in an imaging device A photogate-based photosensor for use in a CMOS imager exhibiting improved short wavelength light response. The photogate is formed of a thin conductive layer about 50 to 3000 Angstroms thick. The conductive layer may be a silicon layer, a layer of indium and/or tin... | 01/23/2007 |
| 7163848 | Semiconductor device and manufacturing method thereof OFF current of a TFT is reduced. There is provided a semiconductor device includung: a substrate; a shielding film formed so as to be in contact with the substrate; a planarization insulating film formed on the substrate so as to cover the shielding film; and a semi... | 01/16/2007 |
| 7154549 | Solid state image sensor having a single-layered electrode structure Provided is a CCD image sensor wherein driving power and power consumption are reduced without increasing unusable regions. Photodiodes are arranged in a honeycomb form. Each vertical charge-transfer channel is made in such a manner that invasion portions, which inv... | 12/26/2006 |
| 7132724 | Complete-charge-transfer vertical color filter detector A vertical-color-filter detector disposed in a semiconductor structure comprises a complete-charge-transfer detector comprising semiconductor material doped to a first conductivity type and has a horizontal portion disposed at a first depth in the semiconductor stru... | 11/07/2006 |
| 7078747 | Semiconductor device having a HMP metal gate A semiconductor device has a dual-gate electrode structure. The gate electrode has a layered structure including a doped polysilicon film, WSi2 film, WN film and a W film. The WSi2 film formed on the polysilicon film in the P-channel area is fo... | 07/18/2006 |
| 7064394 | Nonvolatile semiconductor memory device A memory cell and a selection transistor for selecting the memory cell are provided. The memory cell includes a floating gate formed on a semiconductor substrate via a first gate insulation film, a pair of first diffusion layers positioned on the opposite sides of t... | 06/20/2006 |
| 7034346 | Semiconductor device and method for manufacturing the same A semiconductor device according to an embodiment of the present invention has a gate electrode which is formed on a semiconductor substrate via a gate insulating film, and which has a slit portion; side wall films formed at both side faces of the gate electrode and... | 04/25/2006 |
| 7030430 | Transition metal alloys for use as a gate electrode and devices incorporating these alloys Embodiments of a transition metal alloy having an n-type or p-type work function that does not significantly shift at elevated temperature. The disclosed transition metal alloys may be used as, or form a part of, the gate electrode in a transistor. Methods of formin... | 04/18/2006 |
