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| Number | Title | Issue Date |
| 7479669 | Current aperture transistors and methods of fabricating same Transistors and/or methods of fabricating transistors that include a source contact, drain contact and gate contact are provided. In some embodiments, a channel region is provided between the source and drain contacts and at least a portion of the channel regions in... | 01/20/2009 |
| 7425735 | Multi-layer phase-changeable memory devices A phase-changeable memory device includes a phase-changeable material pattern and first and second electrodes electrically connected to the phase-changeable material pattern. The first and second electrodes are configured to provide an electrical signal to the phase... | 09/16/2008 |
| 7420235 | Solid-state imaging device and method for producing the same In the solid-state imaging device of the present invention having a photoelectric conversion section and a charge transfer section equipped with a charge transfer electrode for transferring an electric charge generated in the photoelectric conversion section, the ch... | 09/02/2008 |
| 7335944 | High-voltage vertical transistor with a multi-gradient drain doping profile A high-voltage transistor includes first and second trenches that define a mesa in a semiconductor substrate. First and second field plate members are respectively disposed in the first and second trenches, with each of the first and second field plate members being... | 02/26/2008 |
| 7314765 | Switching device using superlattice without any dielectric barriers A switching device has an S (Superconductor)-N (Normal Metal)-S superlattice to control the stream of electrons without any dielectric materials. Each layer of said Superconductor has own terminal. The superlattice spacing is selected based on “Dimensional Crossov... | 01/01/2008 |
| 7294563 | Semiconductor on insulator vertical transistor fabrication and doping process A process for conformally doping through the vertical and horizontal surfaces of a 3-dimensional vertical transistor in a semiconductor-on-insulator structure employs an RF oscillating torroidal plasma current to perform either conformal ion implantation, or conform... | 11/13/2007 |
| 7276772 | Semiconductor device A semiconductor device, including: a semiconductor substrate of a first conduction type; an active region used as a function-element-forming region on the semiconductor substrate; a low-resistance region of a second conduction type formed on an outermost periphery o... | 10/02/2007 |
| 7242058 | Lateral semiconductor device using trench structure and method of manufacturing the same A semiconductor device has a semiconductor substrate and a trench region having at least one trench disposed on a surface of the semiconductor substrate and having a trench length, a trench width and a trench depth. A well region is disposed in the substrate and sur... | 07/10/2007 |
| 7205628 | Semiconductor device A semiconductor device, including: a semiconductor substrate of a first conduction type; an active region used as a function-element-forming region on the semiconductor substrate; a low-resistance region of a second conduction type formed on an outermost periphery o... | 04/17/2007 |
| 7199409 | Device for subtracting or adding charge in a charge-coupled device The present invention provides an apparatus for adding or subtracting an amount charge to or from a charge packet in a CCD as the packet traverses the CCD. The apparatus uses a “wire transfer” device structure to perform the addition or subtraction of charge dur... | 04/03/2007 |
| 7192785 | Water-soluble luminescent quantum dots and biomolecular conjugates thereof and related compositions and methods of use The present invention provides a water-soluble luminescent quantum dot, a biomolecular conjugate thereof and a composition comprising such a quantum dot or conjugate. Additionally, the present invention provides a method of obtaining a luminescent quantum dot, a met... | 03/20/2007 |
| 7169620 | Method of reducing the surface roughness of spin coated polymer films According to one aspect of the invention, a method of constructing a memory array is provided. An insulating layer is formed on a semiconductor wafer. A first metal stack is then formed on the insulating layer and etched to form first metal lines. A polymeric layer ... | 01/30/2007 |
| 7129544 | Vertical compound semiconductor field effect transistor structure In one embodiment, a compound semiconductor vertical FET device (11) includes a first trench (29) formed in a body of semiconductor material (13), and a second trench (34) formed within the first trench (29) to define a channel reg... | 10/31/2006 |
| 7122850 | Semiconductor device having local interconnection layer and etch stopper pattern for preventing leakage of current A semiconductor device having a local interconnection layer and a method for manufacturing the same are provided. A local interconnection layer is formed in an interlayer dielectric (ILD) layer on an isolation layer and a junction layer, for covering a semiconductor... | 10/17/2006 |
| 7118953 | Process of fabricating termination region for trench MIS device A trench MIS device is formed in a semiconductor die that contains a P-epitaxial layer that overlies an N+ substrate and an N-epitaxial layer. In one embodiment, the device includes a drain-drift region that extends from the bottom of the trench to the N-epitaxial l... | 10/10/2006 |
| 7102680 | Image pickup device capable of adjusting the overflow level of the sensor based on the read out mode The driving device of a solid-state imaging device comprises a driving unit for driving the solid-state imaging device in either an addition driving mode in which a plurality of pixels are added and read as a single pixel or a non-addition driving mode, and a substr... | 09/05/2006 |
| 7102185 | Lightshield architecture for interline transfer image sensors An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring ... | 09/05/2006 |
| 7098500 | Ultra dense trench-gated power device with the reduced drain-source feedback capacitance and miller charge The cellular structure of the power device includes a substrate that has a highly doped drain region. Over the substrate there is a more lightly doped epitaxial layer of the same doping. Above the epitaxial layer is a well region formed of an opposite type doping. C... | 08/29/2006 |
| 7009228 | Guard ring structure and method for fabricating same A method for fabricating a guard ring structure for JFETs and MESFETs. Trenches are etched in a semiconductor substrate for fabrication of a gate structure for a JFET or MESFET. At time the gate trenches are etched, concentric guard ring trenches are also etched. Th... | 03/07/2006 |
| 6995433 | Microdevice having non-linear structural component and method of fabrication A microdevice for forming a part of an integrated circuit and method for fabricating are disclosed. The microdevice can include a first conductive region and a second conductive region having a channel region interposed therebetween. The mircodevice has a channel re... | 02/07/2006 |
| 6985182 | Imaging device with vertical charge transfer paths having appropriate lengths and/or vent portions In a solid-state imaging device, a plurality of vertical charge transfer paths is arranged at a horizontal pitch A within a photoelectric conversion region, and at a pitch B that is smaller than the pitch A in a portion where the signals are input into the horizonta... | 01/10/2006 |
| 6956256 | Vertical gain cell A high density vertical gain cell is realized for memory operation. The gain cell includes a vertical MOS transistor used as a sense transistor having a floating body between a drain region and a source region, and a second vertical MOS transistor merged with the se... | 10/18/2005 |
| 6940145 | Termination structure for a semiconductor device A semiconductor device (e.g. MOSFET or IGBT) comprises active and termination regions (1,2) formed in a semiconductor substrate (4). The substrate (4) has an upper surface and a termination including a trench (12) extending into the subst... | 09/06/2005 |
| 6927451 | Termination for trench MIS device having implanted drain-drift region A trench MIS device is formed in a semiconductor die that contains a P-epitaxial layer that overlies an N+ substrate and an N-epitaxial layer. In one embodiment, the device includes a drain-drift region that extends from the bottom of the trench to the N-epitaxial l... | 08/09/2005 |
| 6844578 | Semiconductor integrated circuit device and manufacturing method therefor In a semiconductor integrated circuit device in which the number of the PMOS transistors to be used is relatively larger than that of the NMOS transistors and the PMOS transistor is used as an output driver, there is provided a semiconductor integrated circuit devic... | 01/18/2005 |
| 6825879 | Solid-state image sensing device and method of driving the same In a solid-state image sensing device, photoelectric conversion elements are two-dimensionally arrayed in a matrix on a semiconductor substrate. A transfer gate portion is arranged adjacent to each photoelectric conversion element to read signal charges stored in th... | 11/30/2004 |
| 6809770 | Imaging device and a digital camera having same A digital camera including a CCD imager and a complementary color filter mounted on a light receiving surface thereof. The complementary color filter has color blocks each having 8 rows×4 columns while the CCD imager has, at its light receiving surface, pixel block... | 10/26/2004 |
| 6803629 | Vertical field-effect transistor with compensation zones and terminals at one side of a semiconductor body A controllable field-effect semiconductor component has a semiconductor body including a first surface, a first layer of a first conduction type, and a second layer of the first conduction type lying above the first layer. The semiconductor component also has a firs... | 10/12/2004 |
| 6774434 | Field effect device having a drift region and field shaping region used as capacitor dielectric A field effect transistor semiconductor device (1) comprises a source region (33), a drain region (14) and a drain drift region (11), the device having a field shaping region (20) adjacent the drift region (11) and arranged ... | 08/10/2004 |
| 6774411 | Bipolar transistor with reduced emitter to base capacitance According to a disclosed embodiment, a base region is grown on a transistor region. A dielectric layer is next deposited over the base region. The dielectric layer can comprise, for example, silicon dioxide, silicon nitride, or a suitable low-k dielectric. Subsequen... | 08/10/2004 |
| 6762443 | Vertical transistor and transistor fabrication method In DRAM memory cells, individual memory cells are isolated from one another by an isolation trench (STI). In such a case, a vertical transistor is formed by the isolation trench as SOI transistor because its channel region is isolated from a substrate by the isolati... | 07/13/2004 |
| 6760072 | Multi-phase readout of signal charge to vertical CCD There is provided a method of driving a solid-state image sensor, including the steps of transferring signal charges from photoelectric transfer devices to vertical CCDs constituted of a plurality of pixels, when a pulse is applied to the pixel, the pulse being appl... | 07/06/2004 |
| 6686963 | Method for driving solid-state image device Signal charges are read out from light-receiving portions during a vertical blanking period by applying a read-out voltage pulse to read-out electrodes that are provided separately from vertical transfer electrodes, while signal charges are prevented from... | 02/03/2004 |
| 6653740 | Vertical conduction flip-chip device with bump contacts on single surface A flip-chip MOSFET structure has a vertical conduction semiconductor die in which the lower layer of the die is connected to a drain electrode on the top of the die by a diffusion sinker or conductive electrode. The source and gate electrodes are also for... | 11/25/2003 |
| 6583818 | Solid state image sensor with readout modes having different drive phases A solid state image pickup device having: a mode selector for selecting one of first and second modes; a plurality of photoelectric converters for converting received light into electric charges; transfer paths each having a plurality of packets for recei... | 06/24/2003 |
| 6580106 | CMOS image sensor with complete pixel reset without kTC noise generation In an image sensing array, the structure of the image sensor pixel is based on a vertical punch through transistor with a junction gate surrounding its source and connected to it, the junction gate being further surrounded by an MOS gate. The new pixel ha... | 06/17/2003 |
| 6445414 | Solid-state image pickup device having vertical overflow drain and resistive gate charge transfer device and method of controlling thereof A solid state image pickup device has a photo diodes for producing charge packets from image-carrying light, a vertical overflow drain formed under the photo diodes, charge transfer channel regions selectively connected to the photo diodes through transfe... | 09/03/2002 |
| 6396090 | Trench MOS device and termination structure A termination structure for power trench MOS devices is disclosed. The MOS devices can be Schottky diode, IGBT or DMOS depending on what kinds of the semiconductor substrate are prepared. The termination structure comprises: a semiconductor substrate havi... | 05/28/2002 |
| 6373080 | Thin film transistor with electrode on one side of a trench A thin film transistor and a fabrication method thereof in which a desired device characteristic is achieved by adjusting the lengths of a channel region and an offset region. The transistor includes a substrate in which a trench is formed, a gate electro... | 04/16/2002 |
| 6278487 | Solid-state image sensing device A solid-state image sensing device includes photoelectric conversion portions, vertical charge transfer portions, a horizontal charge transfer portion, an unwanted charge removing portion, and a potential barrier portion. The photoelectric conversion port... | 08/21/2001 |
