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"During my service in the United States Congress, I took the initiative in creating the Internet."
Al Gore ; The basis for the later misquote by US Republicans that Gore had "invented" the Internet. Gore was the leading political champion of the modern-day Internet.
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| Number | Title | Issue Date |
| 7960761 | Semiconductor device having a recess channel transistor The semiconductor device having a recess channel transistor includes a device isolation structure formed in a semiconductor substrate to define an active region having a recess region at a lower part of sidewalls thereof and a recess channel region formed in the sem... | 06/14/2011 |
| 7956387 | Transistor and memory cell array A transistor, which is formed in a semiconductor substrate having a top surface, includes first and second source/drain regions, a channel connecting the first and second source/drain regions, and a gate electrode for controlling an electrical current flowing in the... | 06/07/2011 |
| 7420230 | MOSFET-type semiconductor device, and method of manufacturing the same A MOSFET-type semiconductor device includes a monocrystalline semiconductor layer formed in a shape of a thin wall on a insulating film, a gate electrode straddling over the semiconductor layer around the middle portion of the wall-shaped semiconductor layer via a g... | 09/02/2008 |
| 7420246 | Vertical type semiconductor device and method for manufacturing the same A vertical type semiconductor device includes: a silicon substrate having a first surface and a second surface; a first electrode disposed on the first surface of the silicon substrate; and a second electrode disposed on the second surface of the silicon substrate. ... | 09/02/2008 |
| 7291551 | Sub-milliohm on-chip interconnection A method to form a very low resistivity interconnection in the manufacture of an integrated circuit device is achieved. A bottom conductive layer is formed overlying a substrate. The bottom conductive layer creates a first electrical coupling of a first location and... | 11/06/2007 |
| 7244977 | Longitudinal MISFET manufacturing method, longitudinal MISFET, semiconductor storage device manufacturing method, and semiconductor storage device A semiconductor memory device includes a vertical MISFET having a source region, a channel forming region, a drain region, and a gate electrode formed on a sidewall of the channel forming region via a gate insulating film. In manufacturing the semiconductor memory d... | 07/17/2007 |
| 7230264 | Semiconductor transistor having structural elements of differing materials A transistor is formed using a semiconductor substrate and forming a control electrode overlying the semiconductor substrate. A first current electrode is formed within the semiconductor substrate and adjacent the control electrode. The first current electrode has a... | 06/12/2007 |
| 7211844 | Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passage Vertical field effect transistors having a channel region defined by at least one semiconducting nanotube and methods for fabricating such vertical field effect transistors by chemical vapor deposition using a spacer-defined channel. Each nanotube is grown by chemic... | 05/01/2007 |
| 7187021 | Static induction transistor A transistor switch for a system operating at high frequencies is provided. The transistor switch comprises a graded channel region between a source region and a drain region, the graded channel region configured for providing a low resistance to mobile negative cha... | 03/06/2007 |
| 7129533 | High concentration indium fluorine retrograde wells A method and apparatus to form a high-concentration, indium-fluorine retrograde well within a substrate. The indium-fluorine retrograde well includes an indium concentration greater than about 3E18/cm3. ... | 10/31/2006 |
| 7105875 | Lateral power diodes A lateral power diodes with an optimal drift doping formed in widebandgap semiconductors like Silicon Carbide, Aluminum Nitride and Gallium Nitride and Diamond are provided with a voltage rating greater 200V. Contrary to conventional vertical design of power diodes,... | 09/12/2006 |
| 7102914 | Gate controlled floating well vertical MOSFET A novel transistor structure for a DRAM cell includes two deep trenches, one trench including a vertical storage cell for storing the data and the second trench including a vertical control cell for controlling the p-well voltage, which, in effect, places part of th... | 09/05/2006 |
| 7075128 | Charge transfer element having high output sensitivity A charge transfer element comprising a reverse conductive type well formed on the surface of one conductive type semiconductor substrate, the one conductive type channel region extending in one direction relative to the well, a transfer electrode formed intersecting... | 07/11/2006 |
| 7057302 | Static random access memory A static random access memory has first and second complementary field-effect transistors. The first complementary field-effect transistor includes a semiconductor substrate, a first field-effect transistor of electron conduction type which has a first drain region ... | 06/06/2006 |
| 6940144 | Semiconductor equipment Semiconductor equipment includes a semiconductor substrate with a semiconductor layer embedded therein and a vertical type transistor. The substrate has a principal side, a rear side opposite to the principal side, and a trench disposed in the rear side of the subst... | 09/06/2005 |
| 6781202 | Semiconductor devices and their fabrication methods A higher-performance short channel MOS transistor with enhanced resistance to soft errors caused by exposure to high-energy rays is realized. At the time of forming a deep source/drain diffusion layer region at high density, an intermediate region of a density highe... | 08/24/2004 |
| 6744083 | Submicron MOSFET having asymmetric channel profile A MOSFET semiconductor device having an asymmetric channel region between the source region and the drain region. In one embodiment, the device comprises a mesa structure on a silicon substrate with the source region being in the substrate and the mesa structure ext... | 06/01/2004 |
| 6686604 | Multiple operating voltage vertical replacement-gate (VRG) transistor An architecture for creating multiple operating voltage MOSFETs. Generally, an integrated circuit structure includes a semiconductor area with a major surface formed along a plane and first and second spaced-apart doped regions formed in the surface. A th... | 02/03/2004 |
| 6664576 | Polymer thin-film transistor with contact etch stops A method and structure of forming a vertical polymer transistor structure is disclosed having a first conductive layer, filler structures co-planar with the first conductive layer, a semiconductor body layer above the first conductive layer, a second cond... | 12/16/2003 |
| 6653740 | Vertical conduction flip-chip device with bump contacts on single surface A flip-chip MOSFET structure has a vertical conduction semiconductor die in which the lower layer of the die is connected to a drain electrode on the top of the die by a diffusion sinker or conductive electrode. The source and gate electrodes are also for... | 11/25/2003 |
| 6586784 | Accumulation mode clocking of a charge-coupled device A method for reducing dark current within a charge coupled device includes the steps of providing three or more phases of gates separated by an insulating layer from a buried channel of the first conductivity type in a well or substrate of the second cond... | 07/01/2003 |
| 6515317 | Sidewall charge-coupled device with multiple trenches in multiple wells Increased pixel density and increased sensitivity to blue light are provided in a charge couple device employing sidewall and surface gates.... | 02/04/2003 |
| 6376312 | Formation of non-volatile memory device comprised of an array of vertical field effect transistor structures For fabrication of a vertical field effect transistor structure for each of an array of flash memory cells for a non-volatile memory device, an opening is etched though top and bottom layers of doped insulating material and a layer of dummy material forme... | 04/23/2002 |
| 6373082 | Compound semiconductor field effect transistor A compound semiconductor field effect transistor having, between a gate electrode and a drain electrode, a non-gate region which is the channel region not covered by the gate electrode, wherein a plurality of isolation regions are formed in the non-gate r... | 04/16/2002 |
| 6373080 | Thin film transistor with electrode on one side of a trench A thin film transistor and a fabrication method thereof in which a desired device characteristic is achieved by adjusting the lengths of a channel region and an offset region. The transistor includes a substrate in which a trench is formed, a gate electro... | 04/16/2002 |
| 6146953 | Fabrication method for mosfet device A fabrication method for a MOSFET device including the steps of forming a first insulating film on a semiconductor substrate wherein an active region and an isolated region are defined, forming a channel ion region by implanting impurity ions into the act... | 11/14/2000 |
| 6081007 | Semiconductor device comprising MIS transistor with high concentration channel injection region A gate insulating film and gate electrodes are formed on a substrate containing N-type impurities such as P or As. Under the gate insulating film is a gate region on both sides of which are a first and a second source drain region. The gate region is furn... | 06/27/2000 |
| 6060731 | Insulated-gate semiconductor device having a contact region in electrical contact with a body region and a source region A MOSFET wherein the formation of a channel in a channel formation region is controlled by a voltage applied to an insulated gate, comprising: a semiconductor substrate; a first semiconductor layer (drain region) of a first conductivity type formed on a s... | 05/09/2000 |
| 6031259 | Solid state image pickup device and manufacturing method therefor A method for manufacturing a light receiving portion for a solid state image pickup device includes the steps of forming a well of a second impurity type on a substrate of a first impurity type, forming a channel stop within an upper surface of the well, ... | 02/29/2000 |
| 5910672 | Semiconductor device and method of manufacturing the same This invention provides a semiconductor device with a SOI structure and a method of manufacturing the same, preventing deterioration in and making improvement in device characteristics. Nitrogen ion implantation into NMOS and PMOS regions (NR, PR) with re... | 06/08/1999 |
| 5877520 | Trench lateral overflow drain antiblooming structure for virtual phase charge coupled devices with virtual gate element The lateral overflow drain for charge coupled devices includes: a semiconductor region 70 of a first conductivity type having a trench 92; a drain region 24 of a second conductivity type below the trench 92; a gate 20 in the trench 92 overlying and separa... | 03/02/1999 |
| 5867215 | Image sensor having multiple storage wells per pixel An image sensing device having an array of photodetectors capable of generating electron/hole pairs from incident photons, with multiple charge coupled devices organized in a tandem well design that employs multiple storage wells per pixel. The wells use ... | 02/02/1999 |
| 5801408 | Insulated gate semiconductor device and method of manufacturing the same A parasitic transistor of an insulated gate semiconductor device does not easily turn on, so that an SOA of the insulated gate semiconductor device is improved. P+ semiconductor layers (45) having a higher impurity concentration than that N | 09/01/1998 |
| 5635738 | Infrared solid-state image sensing apparatus An infrared solid-state image sensing apparatus is provided with a plurality of photoelectric converting sections arranged vertically and horizontally in a matrix pattern on a semiconductor substrate of a first conducting type; a plurality of vertical CCD... | 06/03/1997 |
| 5614740 | High-speed peristaltic CCD imager with GaAs fet output An improved CCD imaging array is disclosed which is capable of operating at 10,000 frames-per-second. The imager consists of an array of 512×512 pixels having 16 serial output channels which provides a composite output data rate up to 250 Megasamples/sec... | 03/25/1997 |
| 5578841 | Vertical MOSFET device having frontside and backside contacts A multiple output, vertical MOSFET device (11) with improved electrical performance and thermal dissipation is integrated with an additional semiconductor device or semiconductor circuit (18) on a single semiconductor substrate (34). The method of making ... | 11/26/1996 |
| 5576561 | Radiation-tolerant imaging device A barrier at a uniform depth for an entire wafer is used to produce imaging devices less susceptible to noise pulses produced by the passage of ionizing radiation. The barrier prevents charge created in the bulk silicon of a CCD detector or a semiconducto... | 11/19/1996 |
| 5449931 | Charge coupled imaging device having multilayer gate electrode wiring In charge coupled imaging devices, a major portion of the photosensitive surface area is covered by electrodes with which the charge storage and the charge transport in the semiconductor body are controlled. These electrodes are preferably made of polycry... | 09/12/1995 |
| 5442208 | Charge-coupled device having charge reset It is known to reduce the leakage current or dark current in charge-coupled devices with buried channels such as, for example, charge-coupled imaging devices by bringing the surface to the inverted state. In such a device, however, it is not possible to e... | 08/15/1995 |
| 5442207 | Charge coupled device A charge coupled device including a first electrode consisting of a first region and a second region having lower resistance than the first region, and a second electrode consisting of a first region and a second region having lower resistance than this f... | 08/15/1995 |
