...that the video game, Pong, was invented by a guy who graduated at the bottom of his engineering class? Nolan Bushnell spent more time running the games at a local amusement park than he did on his studies at the University of Utah. His dreams of working for Disney's amusement empire were dashed when the company wouldn't hire him. Taking a boring job, Nolan daydreamed about electronic versions of popular games. He invented Pong, the first video game, and went on to found Atari Co.
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| Number | Title | Issue Date |
| 7868361 | Semiconductor device with both I/O and core components and method of fabricating same A semiconductor device having a core device with a high-k gate dielectric and an I/O device with a silicon dioxide or other non-high-k gate dielectric, and a method of fabricating such a device. A core well and an I/O well are created in a semiconductor substrate an... | 01/11/2011 |
| 7821042 | Imaging device including a multiplier electrode An imaging device includes a first electrode for generating an electric field storing signal charges, a charge multiplication section for multiplying the stored signal charges, a second electrode for generating the electric field in the charge multiplication section... | 10/26/2010 |
| 7367114 | Method for plasma etching to manufacture electrical devices having circuit protection Methods of manufacturing a variety of circuit protection devices are provided as well as devices so manufactured. In an embodiment, a surface mount electrical device having a substrate and a pair of conductive electrodes connected to an electrical protection compone... | 05/06/2008 |
| 7355248 | Metal oxide semiconductor (MOS) device, metal oxide semiconductor (MOS) memory device, and method of manufacturing the same A semiconductor device includes a first semiconductor layer that is formed on a first insulating layer; a second insulating layer that is formed on the first semiconductor layer; a second semiconductor layer that is formed on the second insulating layer; a first gat... | 04/08/2008 |
| 7342276 | Method and apparatus utilizing monocrystalline insulator A semiconductor device, including: a semiconductor material; a conductive element; and a substantially monocrystalline insulator disposed between the semiconductor material and the conductive eleme... | 03/11/2008 |
| 7265397 | CCD imager constructed with CMOS fabrication techniques and back illuminated imager with improved light capture An optical sensor circuit for generating signals corresponding to received photoelectrons is formed on a single monolithic substrate and includes a charge coupled device (CCD) array. The array is formed of a plurality of pixels constructed by a standard CMOS process... | 09/04/2007 |
| 7250330 | Method of making an electronic package A method of making an electronic package is described, wherein a substrate is provided with a pattern of conductive pads and a portion of solder positioned on selected ones of the pattern of copper pads. The solder is then reflowed to form partial hemispherically sh... | 07/31/2007 |
| 7247892 | Imaging array utilizing thyristor-based pixel elements An improved imaging array (and corresponding method of operation) includes a plurality of heterojunction thyristor-based pixel elements disposed within resonant cavities formed on a substrate. Each thyristor-based pixel element includes complementary n-type and p-ty... | 07/24/2007 |
| 7235824 | Active gate CCD image sensor An active gate includes a substrate of a first conductivity type, a channel of a second conductivity type formed in the substrate, a first gate region of the first conductivity type formed in a corresponding first portion of the channel, and a first contact connecte... | 06/26/2007 |
| 7087959 | Metal-oxide-semiconductor device having an enhanced shielding structure An MOS device includes a semiconductor layer formed on a substrate, the substrate defining a horizontal plane and a vertical direction normal to the horizontal plane. First and second source/drain regions are formed in the semiconductor layer proximate an upper surf... | 08/08/2006 |
| 7015120 | Method of fabricating semiconductor devices employing at least one modulation doped quantum well structure and one or more etch stop layers for accurate contact formation A method of fabricating a semiconductor device includes the steps of forming (or providing) a series of layers formed on a substrate, the layers including a first plurality of layers including an n-type ohmic contact layer, a p-type modulation doped quantum well str... | 03/21/2006 |
| 7012285 | Semiconductor device A semiconductor device whose insertion loss is reduced and isolation characteristics are improved in a high frequency band by reducing the capacitance component when an FET is off is provided. FETs (30a, 30b) having a gate electrode with ... | 03/14/2006 |
| 6870207 | III-V charge coupled device suitable for visible, near and far infra-red detection A photon detector is obtained by using the intersubband absorption mechanism in a modulation doped quantum well(s). The modulation doping creates a very high electric field in the well which enables absorption of input TE polarized light and also conducts the carrie... | 03/22/2005 |
| 6841811 | Large area, fast frame rate charge coupled device Large area, fast frame rate, charge coupled devices (CCDs) are provided. Interline transfer CCDs can have interleaved pinned photodiodes and vertical shift registers. The interline transfer CCDs are ideal for producing high frame rate video images from a continuous ... | 01/11/2005 |
| 6809379 | Field effect transistor and method for producing a field effect transistor The invention relates to a field effect transistor with a drain region, a source region, a channel region and a gate region. The gate region is provided with a metal layer. ... | 10/26/2004 |
| 6777722 | Method and structure for double dose gate in a JFET A method for fabricating a junction field effect transistor (JFET) with a double dose gate structure. A trench is etched in the surface of a semiconductor substrate, followed by a low dose implant to form a first gate region. An anneal may or may not be performed af... | 08/17/2004 |
| 6750485 | Lock in pinned photodiode photodetector A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to... | 06/15/2004 |
| 6710381 | Memory device structure with composite buried and raised bit line The present invention provides a memory structure, comprising: a substrate; a gate oxide layer disposed on a portion of the substrate; a gate structure disposed on the gate oxide layer; a buried bit line disposed in the substrate along both sides of the gate structu... | 03/23/2004 |
| 6674133 | Twin bit cell flash memory device The present invention provides a twin bit cell flash memory device and its fabricating method. The method is to first form a gate oxide layer on the surface of the silicon substrate followed by forming a polysilicon germanium (Si1-x Gex | 01/06/2004 |
| 6670655 | SOI CMOS device with body to gate connection A method and apparatus are provided for implementing a body contact in a silicon-on-insulator field effect transistor device. A SOI field effect transistor is provided having a body contact having a predefined resistance that provides a higher device thre... | 12/30/2003 |
| 6664577 | Semiconductor device includes gate insulating film having a high dielectric constant A semiconductor device comprising a semiconductor substrate and a MOSFET provided on the semiconductor substrate, the MOSFET including a gate insulating film and a gate electrode provided on the gate insulating film, wherein the gate insulating film has a... | 12/16/2003 |
| 6559486 | Etching mask, process for forming contact holes using same, and semiconductor device made by the process An etching mask having high etching selectivity for an inorganic interlayer film of SiO2 or Si3 N4, an organic interlayer film such as ARC and an electrically conductive film and a contact hole using such an etching mask, ... | 05/06/2003 |
| 6518606 | Semiconductor device permitting electrical measurement of contact alignment error A semiconductor device in which an integrated circuit is formed includes a resistance-measurement area with conductive members disposed in at least two different layers, and an electrode pattern. The electrode pattern includes contact plugs that, dependin... | 02/11/2003 |
| 6515319 | Field-effect-controlled transistor and method for fabricating the transistor An active surface with a source area, a channel area and a drain area is provided in a semiconductor substrate. Each of the areas lie adjacent to a main surface of the semiconductor substrate. At least one trench is provided in the main surface of the sem... | 02/04/2003 |
| 6459106 | Dynamic threshold voltage devices with low gate to substrate resistance Described is a dynamic threshold field effect transistor (DTFET) that includes a gate-to-body contact structure within the gate. By forming the gate-to-body contact structure that can reduce the gate-to-body contact resistance and increase the device pack... | 10/01/2002 |
| 6445019 | Lateral semiconductor device for withstanding high reverse biasing voltages A semiconductor body (11) has first and second opposed major surfaces (11a and 11b). First and second main regions (13 and 14) meet the second major surface (11b) and a voltage-sustaining zone is provided between the first and second regions (13 and 14). ... | 09/03/2002 |
| 6392260 | Architecture for a tapped CCD array A charge coupled device includes first and second pluralities of column registers and first and second register segments. The first plurality of column registers are splayed with respect to and on one side of a column direction line, and the second plural... | 05/21/2002 |
| 6243434 | BCD low noise high sensitivity charge detection amplifier for high performance image sensors The image sensor charge detection amplifier has a charge storage well 60, a charge sensor 32 for sensing charge levels in the charge storage well 60, a charge drain 28 adjacent to the charge storage well 60, and charge transfer structures for transferring... | 06/05/2001 |
| 6175146 | Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry In one aspect, the invention provides a method of forming an integrated circuitry memory device. In one preferred implementation, a conductive layer is formed over both memory array areas and peripheral circuitry areas. A refractory metal layer is formed ... | 01/16/2001 |
| 6150680 | Field effect semiconductor device having dipole barrier A field effect semiconductor device including a substrate, a dipole barrier formed on the substrate, a channel layer formed on the dipole barrier, and source, gate and drain electrodes formed on the channel layer. The dipole barrier provides a potential b... | 11/21/2000 |
| 5998847 | Low voltage active body semiconductor device An active FET body device which comprises an active FET region including a gate, a body region and electrical connection between said gate and said body region that is located within the active FET region is provided along with various methods for fabrica... | 12/07/1999 |
| 5994728 | Field effect transistor and method for producing the same A method for producing a field effect transistor includes: a first step of forming an insulating film over a substrate; a second step of dry etching the insulating film to form a rectangular insulating pattern having side surfaces; a third step of forming... | 11/30/1999 |
| 5814832 | Electron emitting semiconductor device An electron emitting semiconductor device is provided with a P-type semiconductor layer arranged on a semiconductor substrate having an impurity concentration. A Schottky barrier electrode is arranged on a surface of the P-type semiconductor layer. Plural... | 09/29/1998 |
| 5814810 | Interline sensor employing photocapacitor gate An interline sensor is constructed using photocapacitors. The vertical shift register of the interline sensor is operated in a uniphase mode, i.e., holding one of the two phase ($c;2) at a D.C. potential while fluctuating the other phase ($c;1) betw... | 09/29/1998 |
| 5640023 | Spacer-type thin-film polysilicon transistor for low-power memory devices The cross-sectional area of a thin-film transistor (TFT) is decreased in order to minimize bitline to supply leakage of the TFT. This is accomplished by utilizing a spacer etch process to manufacture a TFT having a very narrow and thin channel in a contro... | 06/17/1997 |
| 5576561 | Radiation-tolerant imaging device A barrier at a uniform depth for an entire wafer is used to produce imaging devices less susceptible to noise pulses produced by the passage of ionizing radiation. The barrier prevents charge created in the bulk silicon of a CCD detector or a semiconducto... | 11/19/1996 |
| 5567641 | Method of making a bipolar gate charge coupled device with clocked virtual phase The charge coupled device cell has a semiconductor layer 20 of a first conductivity type, a buried channel 22 of a second conductivity type on the semiconductor layer 20, a first virtual gate 24 in the buried channel 22, the first virtual gate is switched... | 10/22/1996 |
| 5546438 | BCD low noise high sensitivity charge detection amplifier for high performance image sensors The image sensor charge detection amplifier has a charge storage well 60, a charge sensor 32 for sensing charge levels in the charge storage well 60, a charge drain 28 adjacent to the charge storage well 60, and charge transfer structures for transferring... | 08/13/1996 |
| 5502318 | Bipolar gate charge coupled device with clocked virtual phase The charge coupled device cell has a semiconductor layer 20 of a first conductivity type, a buried channel 22 of a second conductivity type on the semiconductor layer 20, a first virtual gate 24 in the buried channel 22, the first virtual gate is switched... | 03/26/1996 |
| 5497020 | Charge drain for a MIS device A semiconductor device which has a diffusion layer region in a semiconductor body, and a MIS transistor with a gate electrode formed on the semiconductor body that is connected to the diffusion layer region. The semiconductor device is made by the steps o... | 03/05/1996 |