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| Number | Title | Issue Date |
| 7880201 | Optical modulator using a serpentine dielectric layer between silicon layers The present invention is a method and an apparatus for optical modulation, for example for use in optical communications links. In one embodiment, an apparatus for optical modulation includes a first silicon layer having one or more trenches formed therein, a dielec... | 02/01/2011 |
| 7859025 | Metal ion transistor A metal ion transistor and related methods are disclosed. In one embodiment, the metal ion transistor includes a cell positioned in at least one isolation layer, the cell including a metal ion doped low dielectric constant (low-k) dielectric material sealed from eac... | 12/28/2010 |
| 7439563 | High-breakdown-voltage semiconductor device A high-breakdown-voltage semiconductor device comprises a high-resistance semiconductor layer, trenches formed on the surface thereof in a longitudinal plane shape and in parallel, first regions formed on the semiconductor layer to be sandwiched between adjacent one... | 10/21/2008 |
| 7385231 | Porous thin-film-deposition substrate, electron emitting element, methods of producing them, and switching element and display element A method of producing a porous thin-film-deposition substrate, which has the steps of: placing onto a substrate that has an electrostatic charge on its surface, fine particles with a surface electrostatic charge opposite to the electrostatic charge of the substrate ... | 06/10/2008 |
| 7317242 | Semiconductor device including p-type silicon layer including implanted germanium The invention provides a semiconductor device having a pn diode that includes a p-type SiGe layer and a n-type Si layer junctioned to the p-type SiGe layer. A built-in potential of the pn diode can be reduced, and thus obtaining a diode characteristics with lower im... | 01/08/2008 |
| 7274108 | Semiconductor chip capable of implementing wire bonding over active circuits A semiconductor chip capable of implementing wire bonding over active circuits (BOAC) is provided. The semiconductor chip includes a bonding pad structure, a metal-metal capacitor formed by at least a pair of metal electrodes on the same plane underneath the bonding... | 09/25/2007 |
| 7274050 | Packaging and manufacturing of an integrated circuit Apparatus, packaging, and methods of manufacture of an integrated circuit are provided. The integrated circuit includes a component of a first type fabricated on a first substrate containing a first material, and a component of a second type fabricated on a second s... | 09/25/2007 |
| 7233031 | Vertical power semiconductor component A vertical power semiconductor component, e.g. a diode or an IGBT, in which there are formed, on the rear side of a substrate, a rear side emitter or a cathode emitter and, over that, a rear side metal layer that at least partly covers the latter, is defined by the ... | 06/19/2007 |
| 7227204 | Structure for improved diode ideality A device is provided which includes a single-crystal semiconductor region disposed in a substrate. The single-crystal region includes a first semiconductor material and a diode disposed in the single-crystal region. The diode includes an anode region including a fir... | 06/05/2007 |
| 7196364 | Molecular device, molecule array, rectifier device, rectifying method, sensor device, switching device, circuit device, logical circuit device, operational device and information processing device A rectifier device, based on a novel operation principle completely different from that of conventional molecular electronic devices, is made by coupling two or more molecules or molecule arrays (11) at certain joints. By making use of the phenomenon that tra... | 03/27/2007 |
| 7157785 | Semiconductor device, the method of manufacturing the same, and two-way switching device using the semiconductor devices A semiconductor device is disclosed that reduces the reverse leakage current caused by reverse bias voltage application and reduces the on-voltage of the IGBT. A two-way switching device using the semiconductor devices is provided, and a method of manufacturing the ... | 01/02/2007 |
| 7148523 | Molecular rectifier device A rectifier device, based on a novel operation principle completely different from that of conventional molecular electronic devices, is made by coupling two or more molecules or molecule arrays (11) at certain joints. By making use of the phenomenon that tra... | 12/12/2006 |
| 7138836 | Hot carrier injection suppression circuit A method of preventing Hot Carrier Injection in input/output connections on low voltage integrated circuits. As integrated circuit voltages drop generally so does the external voltages that those circuits can tolerate. By placing input/output devices, in series, ext... | 11/21/2006 |
| 7105386 | High density SRAM cell with latched vertical transistors High density static memory cells and arrays containing gated lateral bipolar transistors which can be latched in a bistable on state. Each transistor memory cell includes two gates which are pulse biased during the write operation to latch the cell. Also provided is... | 09/12/2006 |
| 7098108 | Semiconductor device having reduced effective substrate resistivity and associated methods A semiconductor device includes at least one device active region formed in a first surface of a semiconductor substrate, an electrical contact layer on a second surface of the semiconductor substrate, and at least one resistivity-lowering body positioned in a corre... | 08/29/2006 |
| 7091533 | Semiconductor component The invention relates to a semiconductor component, in which regions of the conduction type opposite to the conduction type of the drift zone are incorporated in the drift zone and also in the region of the active zones. ... | 08/15/2006 |
| 7084437 | Semiconductor device Provided is an MRAM memory cell structure capable of preventing generation of parasitic transistors. Diodes are adopted as switching elements of an MRAM memory cell. An n-type semiconductor layer and a p-type semiconductor layer, which collectively constitute a diod... | 08/01/2006 |
| 7078296 | Self-aligned trench MOSFETs and methods for making the same Self-aligned trench MOSFETs and methods for manufacturing the same are disclosed. By having a self-aligned structure, the number of MOSFETS per unit area—the cell density—is increased, making the MOSFETs cheaper to produce. The self-aligned structure for the MOS... | 07/18/2006 |
| 7071516 | Semiconductor device and driving circuit for semiconductor device A PMOS transistor (Q2) provided for developing a short circuit between the base and emitter of an N-type IGBT during turn-OFF includes a P diffusion region (5), a P diffusion region (6), and a conductive film (10) and a second gate electr... | 07/04/2006 |
| 7071811 | High performance voltage control diffusion resistor The present invention provides a diffusion resistor that is formed in the substrate. A diffusion region is formed within the substrate that contains a first and second contact region. These contact regions extend downward from the surface of the substrate. A third c... | 07/04/2006 |
| 7060568 | Using different gate dielectrics with NMOS and PMOS transistors of a complementary metal oxide semiconductor integrated circuit Complementary metal oxide semiconductor integrated circuits may be formed with NMOS and PMOS transistors having different gate dielectrics. The different gate dielectrics may be formed, for example, by a replacement process. The gate dielectrics may differ in materi... | 06/13/2006 |
| 7019360 | High voltage power mosfet having a voltage sustaining region that includes doped columns formed by trench etching using an etchant gas that is also a doping source A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial l... | 03/28/2006 |
| 7002379 | I/O circuit using low voltage transistors which can tolerate high voltages even when power supplies are powered off An apparatus for providing bias voltages for input/output (I/O) connections on low voltage integrated circuits. In one embodiment, the invention comprises an I/O pad, a pull-down transistor device that has a protective transistor coupled to said I/O pad, and a pull-... | 02/21/2006 |
| 6917060 | Lateral semiconductor device and vertical semiconductor device A vertical semiconductor device including a first conductivity type base layer having resistance higher then of a first conductivity type buffer layer, the first conductivity type buffer layer formed in one surface portion of the first conductivity type base layer, ... | 07/12/2005 |
| 6914270 | IGBT with PN insulation and production method The IGBT (insulated gate bipolar transistor) has a weakly doped drift zone of a first conductivity formed in a weakly doped semiconductor substrate of the same conductivity. A highly doped first well zone of the first conductivity and a highly doped second well zone... | 07/05/2005 |
| 6914276 | Molecular device, molecule array, rectifier device, rectifying method, sensor device, switching device, circuit device, logical circuit device, operational device and information processing device A rectifier device, based on a novel operation principle completely different from that of conventional molecular electronic devices, is made by coupling two or more molecules or molecule arrays (11) at certain joints. By making use of the phenomenon that tra... | 07/05/2005 |
| 6894324 | Silicon-on-insulator diodes and ESD protection circuits A silicon-on-insulator (SOI) gated diode and non-gated junction diode are provided. The SOI gated diode has a PN junction at the middle region under the gate, and which has more junction area than a normal diode. The SOI non-gated junction diode has a PN junction at... | 05/17/2005 |
| 6867442 | Surface-functionalized inorganic semiconductor particles as electrical semiconductors for microelectronics applications A semiconductor device has a first contact, by which charge carriers are injected into a semiconductor path, and a second contact, by which the charge carriers are extracted from the semiconductor path. The semiconductor path is formed by surface-modified semiconduc... | 03/15/2005 |
| 6861680 | Silicon-on-insulator diodes and ESD protection circuits A silicon-on-insulator (SOI) gated diode and non-gated junction diode are provided. The SOI gated diode has a PN junction at the middle region under the gate, which has more junction area than a normal diode. The SOI non-gated junction diode has a PN junction at the... | 03/01/2005 |
| 6806805 | Low loss high Q inductor A high Q inductive clement with low losses, high inductance and high efficiency is disclosed. The high Q inductive element with one or more inductive loops is formed over a silicon micro structure with thin support elements formed by deep plasma etching in bulk sili... | 10/19/2004 |
| 6770906 | Semiconductor reliability test chip A semiconductor test chip including a plurality of test functions. The test functions of the semiconductor test chip include bond pad pitch and size effects on chip design, wire bond placement accuracy regarding placement of the wire bond on the bond pad, evaluation... | 08/03/2004 |
| 6653670 | Silicon-on-insulator diodes and ESD protection circuits A silicon-on-insulator (SOI) gated diode and non-gated junction diode are provided. The SOI gated diode has a PN junction at the middle region under the gate, and which has more junction area than a normal diode. The SOI non-gated junction diode has a PN ... | 11/25/2003 |
| 6649944 | Silicon-on-insulator diodes and ESD protection circuits A silicon-on-insulator (SOI) gated diode and non-gated junction diode are provided. The SOI gated diode has a PN junction at the middle region under the gate, thus providing more junction area than a normal diode. The SOI non-gated junction diode has a PN... | 11/18/2003 |
| 6559485 | Semiconductor device having a gate insulation film resistant to dielectric breakdown A transistor 28a including a first gate electrode 26 is formed on a substrate 10 through a gate insulation film 24. An insulation film 30 is formed on the transistor 28a and the substrate 10. A plurality of first wirings 40a, 40b are formed on the insulat... | 05/06/2003 |
| 6538271 | Semiconductor device and method of manufacturing the same A semiconductor device comprises a semiconductor substrate and a silicon nitride film formed on the semiconductor substrate. The silicon nitride film is substantially free from an Si--H bond and has an Si--H density per unit area of 1×1015 cm | 03/25/2003 |
| 6534794 | Semiconductor light-emitting unit, optical apparatus and optical disk system having heat sinking means and a heating element incorporated with the mounting system A semiconductor light-emitting unit includes: a semiconductor laser diode; a photodetector functioning as a sub-mount for mounting the diode thereon; and a heating member, incorporated with the photodetector, for heating the diode. If the ambient temperat... | 03/18/2003 |
| 6445049 | Cell based array comprising logic, transfer and drive cells A highly flexible, heterogeneous architecture for portable, high density, high performance standard cell and gate array applications is disclosed. The architecture is based on the three basic cells and their derivatives, particularly a transmission gate c... | 09/03/2002 |
| 6392252 | Semiconductor device To provide a semiconductor device in which a direction of a conformation difference in respective wiring layers of semiconductor integrated circuits can be detected and at the same time a conformation difference detection sensitivity is increased. A semic... | 05/21/2002 |
| 6211046 | Method of manufacturing a semiconductor device When an element isolation film is formed by the LOCOS technique, as an underlying buffer layer of an oxidation resisting film, a pad oxidation film and pad poly-Si film are used. When an element is formed, they are used as a gate oxide film and a part of ... | 04/03/2001 |
| 6121633 | Latch-up free power MOS-bipolar transistor A MOS bipolar transistor is provide which includes a silicon carbide npn bipolar transistor formed on a bulk single crystal n-type silicon carbide substrate and having an n-type drift layer a p-type base layer. Preferably the base layer is formed by epita... | 09/19/2000 |
