Did You Know...
...During the Civil War, the Confederacy established its own Patent Office which issued 266 patents, a third of which concerned implements of war.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8178906 | Laser chalcogenide phase change device A laser activated phase change device for use in an integrated circuit comprises a chalcogenide fuse configured to connect a first patterned metal line and a second patterned metal line and positioned between an inter layer dielectric and an over fuse dielectric. Th... | 05/15/2012 |
| 8164120 | Semiconductor device with capacitor and fuse and its manufacture An upper electrode of a capacitor has a two-layer structure of first and second upper electrodes. A gate electrode of a MOS field effect transistor and a fuse are formed by patterning conductive layers used to form the lower electrode, first upper electrode and seco... | 04/24/2012 |
| 8101977 | Ballasted polycrystalline fuse A polycrystalline fuse includes a first layer of polycrystalline material on a substrate and a second layer of a silicide material on the first layer. The first and second layers are shaped to form first and second terminal portions of a first width joined along a l... | 01/24/2012 |
| 8101976 | Device selection circuitry constructed with nanotube ribbon technology A memory system having electromechanical memory cells and decoders is disclosed. A decoder circuit selects at least one of the memory cells of an array of such cells. Each cell in the array is a crossbar junction at least one element of which is a nanotube or a nano... | 01/24/2012 |
| 8089105 | Fuse link structures using film stress for programming and methods of manufacture A method of forming a programmable fuse structure includes forming at least one shallow trench isolation (STI) in a substrate, fanning an e-fuse over the at least one STI and depositing an interlevel dielectric (ILD) layer over the e-fuse. Additionally, the method i... | 01/03/2012 |
| 7994544 | Semiconductor device having a fuse element A portion-to-be-melted of a fuse is surrounded by plates, so that heat to be generated in a meltdown portion of the fuse under current supply can be confined or accumulated in the vicinity of the meltdown portion of the fuse. This makes it possible to facilitate mel... | 08/09/2011 |
| 7985989 | Stacked bit line dual word line nonvolatile memory An arrangement of nonvolatile memory devices, having at least one memory device level stacked level by level above a semiconductor substrate, each memory level comprising an oxide layer substantially disposed above a semiconductor substrate, a plurality of word line... | 07/26/2011 |
| 7982245 | Circuit with fuse/anti-fuse transistor with selectively damaged gate insulating layer A semiconductor integrated circuit is disclosed which includes a main transistor and at least one of a fuse transistor or an anti-fuse transistor (“fuse/anti-fuse transistor”). Each transistor type includes an active region formed in a semiconductor substrate, a... | 07/19/2011 |
| 7973341 | Fuse of semiconductor device A method for manufacturing a fuse of a semiconductor device comprises forming an island-type metal fuse in a region where a laser is irradiated, so that laser energy may not be dispersed in a fuse blowing process, thereby improving repair efficiency. ... | 07/05/2011 |
| 7960760 | Electrically programmable fuse A semiconductor device includes a fin-fuse and an SOI transistor. The SOI transistor is located on an SOI substrate and has a source region and a drain region. The fin-fuse is connected to one of the source/drain regions and has a fusible link located on the SOI sub... | 06/14/2011 |
| 7956385 | Circuit for protecting a transistor during the manufacture of an integrated circuit device A circuit for protecting a transistor during the manufacture of an integrated circuit device is disclosed. The circuit comprises a transistor having a gate formed over an active region formed in a die of the integrated circuit device; a protection element formed in ... | 06/07/2011 |
| 7910960 | Semiconductor integrated circuit device with a fuse circuit In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for p... | 03/22/2011 |
| 7893465 | Semiconductor device and method of manufacturing same A semiconductor device includes an etching protection layer to protect a metal layer in a bonding pad area when a metal fuse is etched. ... | 02/22/2011 |
| 7821041 | Electrical fuse circuit for security applications A fuse circuit is disclosed, which comprises at least one electrical fuse element having a resistance that changes after being stressed in an electromigration mode, a switching device serially coupled with the electrical fuse element in a predetermined path between ... | 10/26/2010 |
| 7791111 | Semiconductor device with an opening for cutting a fuse A semiconductor device has a plurality of fuse element portions each of which including a first fuse interconnect having a fuse to be portion, a second fuse interconnect connected to an internal circuit, a first impurity diffusion layer for electrically connecting t... | 09/07/2010 |
| 7781805 | Memory with high dielectric constant antifuses adapted for use at low voltage A memory array having memory cells comprising a diode and an antifuse can be made smaller and programmed at lower voltage by using an antifuse material having a higher dielectric constant and a higher acceleration factor than those of silicon dioxide, and by using a... | 08/24/2010 |
| 7759705 | Semiconductor devices fabricated with different processing options A semiconductor device, wherein: a first fabricating option provides a plurality of user configurations to configure the device functionality; and a second fabricating option hard-wires a said functional configuration, the second option comprising a plurality of com... | 07/20/2010 |
| 7745855 | Single crystal fuse on air in bulk silicon An integrated eFUSE device is formed by forming a silicon “floating beam” on air, whereupon the fusible portion of the eFUSE device resides. This beam extends between two larger, supporting terminal structures. “Undercutting” techniques are employed whereby ... | 06/29/2010 |
| 7705372 | Electromechanical memory devices and methods of manufacturing the same In a memory device and a method of forming the same, in one embodiment, the memory device comprises a first word line structure on a substrate, the first word line structure extending in a first direction. A bit line is provided over the first word line structure an... | 04/27/2010 |
| 7679107 | Memory device that utilizes organic layer with a compound that can photoisomerize between conductive layers; at least one of which is light transmitting The present invention provides an involatile memory device that is capable of data writing and erasing at a time other than during manufacturing, and a semiconductor device having the memory device. Also, the present invention provides a compact-sized and inexpensiv... | 03/16/2010 |
| 7667246 | Field programmable gate array (FPGA) multi-parallel structure A method of forming a field programmable gate array (FPGA) structure of a semiconductor device capable of reducing manufacturing cost through simpler processes includes forming a contact parallel connection structure in which contacts connected to a gate electrode a... | 02/23/2010 |
| 7642570 | Rescue structure and method for laser welding A rescue structure to repair an open wire includes a first metal layer having at least a rescue line, an isolation layer formed on the first metal layer, and a second metal layer formed on the isolation layer. The second metal layer has at least a signal line crossi... | 01/05/2010 |
| 7619264 | Semiconductor device An electric fuse includes a wide interconnect and a narrow interconnect. The electric fuse has a juxtaposed region in which a plurality of straight line portions are juxtaposed with each other by folding the wide interconnect, and the narrow interconnect has a narro... | 11/17/2009 |
| 7605408 | Apparatus, method and system for reconfigurable circuitry The present invention relates to reconfigurable circuitry, and more particularly to the reconfiguration of the characteristics of materials used in the formation of electronic circuitry as the result of applied external influences. Exemplary embodiments of the prese... | 10/20/2009 |
| 7589363 | Fuse structures, methods of making and using the same, and integrated circuits including the same A structure configured to disconnect circuit elements. The structure generally includes a dielectric layer over a light-absorbing structure, and a lens over the dielectric layer and the light-absorbing structure, configured to at least partially focus light onto the... | 09/15/2009 |
| 7576374 | Semiconductor device with robust polysilicon fuse A new method is provided to create a polysilicon fuse. The invention provides for applying a first oxide plasma treatment to the surface of the created polysilicon fuse, creating a thin layer of native oxide over the surface of the created polysilicon fuse, followed... | 08/18/2009 |
| 7550788 | Semiconductor device having fuse element arranged between electrodes formed in different wiring layers A semiconductor device includes a lower electrode, an upper electrode, and a fuse element that connects the lower electrode and the upper electrode. The height of the fuse element is greater than the depth of focus of a laser beam to be irradiated. The diameter of t... | 06/23/2009 |
| 7550789 | Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable Techniques and systems whereby operation of and/or access to particular features of an electronic device may be controlled after the device has left the control of the manufacturer are provided. The operation and/or access may be provided based on values stored in n... | 06/23/2009 |
| 7538369 | Resistance-change-type fuse circuit A resistance-change-type fuse circuit has a plurality of polysilicon fuses which are made of polysilicon and causes irreversible change in resistance by flowing a current; a plurality of programming transistors which are provided corresponding to the plurality of fu... | 05/26/2009 |
| 7508016 | CMOS imager having on-chip ROM A CMOS image sensor formed on a chip has a ROM disposed on the chip for recording pixel defect locations, chip-by-chip variations such as bias, and other manufacturing production data. Testing results and repair solutions are written to the ROM after production test... | 03/24/2009 |
| 7462894 | Electrical fuse device with dummy cells for ESD protection An electrical fuse device includes at least one electrical fuse cell having a first switch device serially coupled with an electrical fuse representing a logic value; and at least one dummy cell having a second switch device coupled to the first switch device via a ... | 12/09/2008 |
| 7442583 | Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable Techniques and systems whereby operation of and/or access to particular features of an electronic device may be controlled after the device has left the control of the manufacturer are provided. The operation and/or access may be provided based on values stored in n... | 10/28/2008 |
| 7442626 | Rectangular contact used as a low voltage fuse element A repair fuse element and method of construction are disclosed that eliminate or substantially reduce the disadvantages and problems associated with prior fuse elements. In one embodiment, the fuse element is constructed with a rectangular-shaped contact. The contac... | 10/28/2008 |
| 7423301 | Semiconductor device including fuse elements and bonding pad A semiconductor device includes a lower-layer substrate, a fuse above the lower-layer substrate and blown by radiation with light, a silicon oxide film on the fuse and on an exposed portion of the surface of the lower-layer substrate, and a silicon nitride film on t... | 09/09/2008 |
| 7414274 | Selective oxidation of silicon in diode, TFT and monolithic three dimensional memory arrays The present invention relates to use of selective oxidation to oxidize silicon in the presence of tungsten and/or tungsten nitride in memory cells and memory arrays. This technique is especially useful in monolithic three dimensional memory arrays. In one aspect of ... | 08/19/2008 |
| 7407819 | Polymer memory having a ferroelectric polymer memory material with cell sizes that are asymmetric A polymer memory and its method of manufacture are provided. One multi-layer construction of the polymer memory has two sets of word lines and a set of bit lines between the word lines. The word lines of each set of word lines have center lines that are spaced by a ... | 08/05/2008 |
| 7405470 | Adaptable electronic storage apparatus A storage apparatus 10 is disclosed, that comprises a wiring substrate 11 having a first surface and a second surface, a flat type external connection terminal 12a disposed on the first surface of the wiring substrate 11, a semicon... | 07/29/2008 |
| 7402887 | Semiconductor device having fuse area surrounded by protection means A semiconductor device has a semiconductor substrate, first and second insulating layers, a fuse, a diffusion layer and a conductive pattern. The first insulating layer is selectively formed on a surface of the semiconductor substrate. The fuse is formed on the firs... | 07/22/2008 |
| 7402846 | Electrostatic discharge (ESD) protection structure and a circuit using the same An electrostatic discharge (ESD) protection structure is disclosed. The ESD protection structure includes an active device. The active device includes a plurality of drains. Each of the drains has a contact row and at least one body contact row. The at least one bod... | 07/22/2008 |
| 7402770 | Nano structure electrode design A microelectronic switch having a substrate layer, an electrically conductive switching layer formed on the substrate layer, an electrically conductive cavity layer formed on the switching layer, an electrically conductive cap layer formed on the cavity layer, the c... | 07/22/2008 |
