Celebrity Inventors
Mark Twain (Samuel L. Clemens) received Patent No. 121,992 for "An Improvement in Adjustable and Detachable Straps for Garments." He later received two more patents: one for a self-pasting scrapbook and one for a game to help players remember important historical dates.
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| Number | Title | Issue Date |
| 8169001 | Method for preparing a non-self-aligned heterojunction bipolar transistor with a small emitter-to-base spacing The present invention refers to a method for preparing a non-self-aligned heterojunction bipolar transistor comprising: preparing a patterned emitter metal on an emitter epi layer of a HBT epi structure on a substrate; preparing an emitter epitaxy below the emitter ... | 05/01/2012 |
| 8017975 | Semiconductor device A semiconductor device and manufacturing method satisfies both of the trade-off characteristic advantages of the HBT and the HFET. The semiconductor device is an HBT and HFET integrated circuit. The HBT includes a sub-collector layer, a GaAs collector layer, a GaAs ... | 09/13/2011 |
| 7956382 | Method and system for magnetically assisted statistical assembly of wafers A wafer having heterostructure therein is formed using a substrate with recesses formed within a dielectric layer. A magnetized magnetic layer or a polarized electret material is formed at the bottom of each recess. The magnetized magnetic layer or a polarized elect... | 06/07/2011 |
| 7935983 | Nitride semiconductor device A nitride semiconductor device includes: a substrate containing Si; a channel layer provided on the substrate and made of nitride semiconductor material; a barrier layer provided on the channel layer and made of nitride semiconductor material; a first and second mai... | 05/03/2011 |
| 7847319 | Semiconductor device and method for fabricating the same A semiconductor device has a Group III nitride semiconductor layer and a gate electrode formed on the Group III nitride semiconductor layer. The gate electrode contains an adhesion enhancing element. A thermally oxidized insulating film is interposed between the Gro... | 12/07/2010 |
| 7791103 | Group III nitride semiconductor substrate A Group III nitride semiconductor substrate is formed of a Group III nitride single crystal, and has a diameter of not less than 25.4 mm and a thickness of not less than 150 μm. The substrate satisfies that a ratio of Δα/α is not more than 0.1, where α is a the... | 09/07/2010 |
| 7732835 | Vertical P-N junction device and method of forming same A P-N junction device and method of forming the same are disclosed. The P-N junction device may include a P-N diode, a PiN diode or a thyristor. The P-N junction device may have a monocrystalline or polycrystalline raised anode. In one embodiment, the P-N junction d... | 06/08/2010 |
| 7696533 | Indium nitride layer production The invention relates to a structure usable in electronic, optical or optoelectronic engineering which comprises a substantially crystalline layer made of an alloy consisting of at least one element of the column II of the periodic elements system and/or at least on... | 04/13/2010 |
| 7646038 | Method of fabricating heteroepitaxial microstructures An efficient method of fabricating a high-quality heteroepitaxial microstructure having a smooth surface. The method includes detaching a layer from a base structure to provide a carrier substrate having a detached surface, and then forming a heteroepitaxial microst... | 01/12/2010 |
| 7550781 | Integrated III-nitride power devices A III-nitride based integrated semiconductor device which includes at least two III-nitride based semiconductor devices formed in a common die. ... | 06/23/2009 |
| 7547926 | Heterojunction with linkages between an electron donor and an electron acceptor in a blend An electronic device comprising a heterojunction, wherein the heterojunction comprises a blend comprising an electron donor and an electron acceptor; and wherein the blend is treated so as to form one or more linkages between the electron donor and/or electron accep... | 06/16/2009 |
| 7525130 | Polarization-doped field effect transistors (POLFETS) and materials and methods for making the same Novel GaN/AlGaN metal-semiconductor field-effect transistor (MESFET) structures grown without any impurity doping in the channel. A high-mobility polarization-induced bulk channel charge is created by grading the channel region linearly from GaN to Al0.3G... | 04/28/2009 |
| 7521731 | Semiconductor device and method of manufacturing the same A semiconductor device of the invention includes a first conductive type semiconductor base substrate; and a switching mechanism which is formed on a first main surface of the semiconductor base substrate and switches ON/OFF of a current. In the semiconductor base s... | 04/21/2009 |
| 7491983 | Nitride-based semiconductor device of reduced current leakage A high electron mobility transistor is disclosed which has a double-layered main semiconductor region formed on a silicon substrate via a multilayered buffer region. The multilayered buffer region is in the form of alternations of an aluminum nitride layer and a gal... | 02/17/2009 |
| 7442997 | Three-dimensional memory cells The present invention discloses a three-dimensional memory (3D-M) with polarized 3D-ROM (three-dimensional read-only memory) cells. Polarized 3D-ROM can ensure a larger unit array and therefore, a better integratibility. The present invention further discloses a 3D-... | 10/28/2008 |
| 7442993 | Ultra-thin, high quality strained silicon-on-insulator formed by elastic strain transfer A method of forming a semiconductor structure comprising a first strained semiconductor layer over an insulating layer is provided in which the first strained semiconductor layer is relatively thin (less than about 500 Å) and has a low defect density (stacking fau... | 10/28/2008 |
| 7436004 | Semiconductor device An aspect of the present invention provides a semiconductor device that includes, a first semiconductor body of a first conductivity type, a first switching mechanism provided on the first semiconductor body, configured and arranged to switch on/off current flowing ... | 10/14/2008 |
| 7436005 | Process for fabricating a heterostructure-channel insulated-gate field-effect transistor, and the corresponding transistor The insulated-gate field-effect transistor includes a substrate surmounted by a layer of silicon-germanium alloy, the ratio of the germanium concentration to the silicon concentration of which increases towards the surface of the substrate. The transistor is formed ... | 10/14/2008 |
| 7425733 | Semiconductor apparatus with electrostatic protective device A semiconductor apparatus includes an electrostatic protective device having PN junction with N-type Si and P-type SiGe. The electrostatic protective device is directly connected with a terminal to receive static electricity and with a terminal to discharge static e... | 09/16/2008 |
| 7419892 | Semiconductor devices including implanted regions and protective layers and methods of forming the same Methods of forming a semiconductor device include forming a protective layer on a semiconductor layer, implanting ions having a first conductivity type through the protective layer into the semiconductor layer to form an implanted region of the semiconductor layer, ... | 09/02/2008 |
| 7405430 | Highly uniform group III nitride epitaxial layers on 100 millimeter diameter silicon carbide substrates A semiconductor structure is disclosed that includes a silicon carbide wafer having a diameter of at least 100 mm with a Group III nitride heterostructure on the wafer that exhibits high uniformity in a number of characteristics. These include: a standard deviation ... | 07/29/2008 |
| 7394114 | Semiconductor device and manufacturing method therefor A laser diode includes a first n-cladding layer disposed on and lattice-matched to an n-semiconductor substrate, wherein the first n-cladding layer is n-AlGaInP or n-GaInP; a second n-cladding layer of n-AlGaAs supported by the first n-cladding layer; and an inserte... | 07/01/2008 |
| 7391058 | Semiconductor devices and methods of making same A composite structure having a silicon carbide epitaxial layer is provided. The epitaxial layer includes at least four regions arranged vertically and defining respective interfaces, where each of the regions is characterized by a respective impurity concentration, ... | 06/24/2008 |
| 7375385 | Semiconductor heterostructures having reduced dislocation pile-ups Dislocation pile-ups in compositionally graded semiconductor layers are reduced or eliminated, thereby leading to increased semiconductor device yield and manufacturability. This is accomplished by introducing a semiconductor layer having a plurality of threading di... | 05/20/2008 |
| 7372149 | High frequency semiconductor apparatus, transmitting apparatus and receiving apparatus A high frequency semiconductor apparatus is provided which prevents characteristics of a high frequency semiconductor element from being deteriorated so that the high frequency semiconductor element can be made to operate stably. The high frequency semiconductor app... | 05/13/2008 |
| 7369718 | Package substrate pattern to accommodate optical waveguide An apparatus comprising a substrate comprising a base substrate, a conductive layer on the base substrate, and a solder resist layer on the conductive layer, a die including an optical area, the die being flip-chip bonded to the substrate, and an optical inter-conne... | 05/06/2008 |
| 7365369 | Nitride semiconductor device A nitride semiconductor device used chiefly as an LD and an LED element. In order to improve the output and to decrease Vf, the device is given either a three-layer structure in which a nitride semiconductor layer doped with n-type impurities serving as an n-type co... | 04/29/2008 |
| 7365374 | Gallium nitride material structures including substrates and methods associated with the same Gallium nitride material-based semiconductor structures are provided. In some embodiments, the structures include a composite substrate over which a gallium nitride material region is formed. The gallium nitride material structures may include additional features, s... | 04/29/2008 |
| 7359579 | Image sensor package and its manufacturing method Disclosed are an image sensor package and a method for manufacturing the same. A sealing portion is formed between an image sensor die and a glass substrate to completely isolate the sensing portion of the image sensor die from external environment. Electrically con... | 04/15/2008 |
| 7348606 | Nitride-based heterostructure devices A method of producing nitride based heterostructure devices by using a quaternary layer comprised of AlInGaN. The quaternary layer may be used in conjunction with a ternary layer in varying thicknesses and compositions that independently adjust polarization charges ... | 03/25/2008 |
| 7342307 | Semiconductor device A semiconductor device includes: a package; two semiconductor chip fixing parts located adjacently to each other in the package; and first and the second semiconductor chips, each of which is fixed on the semiconductor chip fixing part and has a field effect transis... | 03/11/2008 |
| 7338826 | Silicon nitride passivation with ammonia plasma pretreatment for improving reliability of AlGaN/GaN HEMTs This invention pertains to an electronic device and to a method for making it. The device is a heterojunction transistor, particularly a high electron mobility transistor, characterized by presence of a 2 DEG channel. Transistors of this invention contain an AlGaN b... | 03/04/2008 |
| 7338880 | Method of fabricating a semiconductor device A method of fabricating a semiconductor device includes steps of forming at least one shallow-trench isolation region in a semiconductor substrate; forming a photoresist pattern for blocking a photodiode region; sequentially implanting dopant ions and boron ions int... | 03/04/2008 |
| 7332712 | Camera module fabrication method including the step of removing a lens mount and window from the mold An image sensor package includes an image sensor, a window, and a molding, where the molding includes a lens holder extension portion extending upwards from the window. The lens holder extension portion includes a female threaded aperture extending from the window s... | 02/19/2008 |
| 7326955 | Stacked organic photosensitive devices A device is provided having a first electrode, a second electrode, a first photoactive region having a characteristic absorption wavelength λ1 and a second photoactive region having a characteristic absorption wavelength λ2. The photoactive r... | 02/05/2008 |
| 7323728 | Semiconductor device Disclosed is a semiconductor device including an n+-type semiconductor layer formed on a substrate, a first n-type semiconductor layer formed on the n+-type semiconductor layer, a p-type semiconductor layer formed on the first n-type semiconduc... | 01/29/2008 |
| 7321132 | Multi-layer structure for use in the fabrication of integrated circuit devices and methods for fabrication of same A multi-layer structure for use in the fabrication of integrated circuit devices is adapted for the formation of enhancement mode high electron mobility transistors, depletion mode high electron mobility transistors, and power high electron mobility transistors. The... | 01/22/2008 |
| 7320896 | Infrared radiation detector Electronic devices are disclosed that may be used for infrared radiation detection. An example electronic device includes a substrate, a transistor included in the substrate and a silicon-germanium (Si—Ge) structural layer coupled with the transistor. The structur... | 01/22/2008 |
| 7304333 | Semiconductor device A heterojunction bipolar transistor, having a structure in which a subcollector layer of a first conductive type having a higher doping concentration than a collector layer, a collector layer of the first conductive type, a base layer of the second conductive type, ... | 12/04/2007 |
| 7301181 | Heterojunction bipolar transistor having an emitter layer made of a semiconductor material including aluminum The present invention aims at providing a heterojunction bipolar transistor having improved breakdown voltage on operation for high power output, and includes: a GaAs semiconductor substrate 100; an n+-type GaAs sub-collector layer 110; an n... | 11/27/2007 |
