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| Number | Title | Issue Date |
| 7705368 | Insulated gate type thyristor An insulated gate type thyristor includes: a first current terminal semiconductor region of a first conductivity type having a high impurity concentration; a first base semiconductor region of a second conductivity type opposite to the first conductivity type having... | 04/27/2010 |
| 7465966 | Film formation method and manufacturing method of semiconductor device A new film formation method that makes it possible to form a film with a little concentration of contaminants from a material and to form a film on a low heat-resistant member is proposed. Further, a method for forming a film that can keep semiconductor properties i... | 12/16/2008 |
| 7397126 | Semiconductor device The present invention provides inhibiting an electrical leakage caused by anion migration. A trenched portion 15 is provided as ion migration-preventing zone between a source electrode 4 and a gate electrode 5. The trenched portion 15 is ... | 07/08/2008 |
| 7385249 | Transistor structure and integrated circuit A process for forming a conductive gate structure for a sub-0.25 MOSFET technology, has been developed. The process features a conductive gate structure defined from a composite polysilicon or amorphous layer, which in turn is obtained via a dual deposition procedur... | 06/10/2008 |
| 7262442 | Triac operating in quadrants Q1 and Q4 A triac including on its front surface side an autonomous starting well of the first conductivity type containing a region of the second conductivity type arranged to divide it, in top view, into a first and a second well portion, the first portion being connected t... | 08/28/2007 |
| 7217945 | Method to selectively increase the top resistance of the lower programming electrode in a phase-change memory cell and structures obtained thereby The present invention relates to a process of forming a phase-change memory. A lower electrode is disposed in a first dielectric film. The lower electrode comprises an upper section and a lower section. The upper section extends beyond the first dielectric film. Res... | 05/15/2007 |
| 7180102 | Method and apparatus for using cobalt silicided polycrystalline silicon for a one time programmable non-volatile semiconductor memory A fusible link formed on a semiconductor substrate. The fusible link comprises a silicide layer overlying a polysilicon layer. The fusible link is programmed to an open state by passing a current therethrough that opens the polysilicon and the silicide layers. ... | 02/20/2007 |
| 7155684 | Integrated circuit device and method for forming the same In an integrated circuit device, element power supply lines connected to a circuit containing a plurality of cells, element ground lines connected thereto, a trunk power supply line connected to each of the element power supply lines, and a trunk ground line connect... | 12/26/2006 |
| 7135717 | Semiconductor switches and switching circuits for microwave The purpose of the present invention is to provide a small-sized switch attaining high isolation of not less than 80 dB, maintaining low insertion loss also in high frequencies not less than 60 GHz. A semiconductor switch according to the present invention utilizes ... | 11/14/2006 |
| 7135367 | Manufacturing method of semiconductor device A silicon oxide film as an insulating film is accumulated so as to cover a whole surface of a silicon substrate including a surface of a resistance element by, for example, a thermal CVD method, just after a resist pattern is removed. This silicon oxide film is proc... | 11/14/2006 |
| 7064359 | Switching semiconductor device and switching circuit A switching semiconductor device includes a first compound layer formed on a single crystal substrate which includes silicon carbide or sapphire, and including a general formula InxGa1-xN, where 0≦x≦1; a second compound layer formed on the ... | 06/20/2006 |
| 7045880 | Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction Improved methods and structures are provided that are lateral to surfaces with a (110) crystal plane orientation such that an electrical current of such structures is conducted in the direction. Advantageously, improvements in hole carrier mobility of approxim... | 05/16/2006 |
| 6982432 | Touch type liquid-crystal display device and input detecting method A touch type liquid-crystal display device has a liquid-crystal display panel having flexibility, a touch panel provided to adhere closely to a back side, opposite to a visual side, of the liquid-crystal display panel, and electrodes disposed to be opposite to each ... | 01/03/2006 |
| 6955970 | Process for manufacturing a low voltage MOSFET power device having a minimum figure of merit A power MOSFET die with a minimized figure of merit has of a planar stripe MOSFET geometry in which parallel diffused bases (or channels) are formed by implantation and diffusion of impurities through parallel elongated and spaced polysilicon stripes wherein the pol... | 10/18/2005 |
| 6943382 | Pressed-contact type semiconductor device A P++-type first diffusion layer is formed by diffusing P-type impurities on a front side of an N−-type semiconductor substrate, and an N-type fourth diffusion layer which is shallower than the first diffusion layer is formed by diffusing N-t... | 09/13/2005 |
| 6921943 | System and method for reducing soft error rate utilizing customized epitaxial layers The present invention is directed to a built-in solution for soft error protection by forming an epitaxial layer with a graded dopant concentration. By grading a dopant concentration, starting from a first dopant concentration and ending with a second dopant concent... | 07/26/2005 |
| 6894319 | Semiconductor device A MOS semiconductor device includes n−-type surface regions, which are extended portions of an n−-type drift layer 12 extended to the surface of the semiconductor chip. Each n−-type surface region 14 is shaped wit... | 05/17/2005 |
| 6838321 | SEMICONDUCTOR SUBSTRATE WITH DEFECTS REDUCED OR REMOVED AND METHOD OF MANUFACTURING THE SAME, AND SEMICONDUCTOR DEVICE CAPABLE OF BIDIRECTIONALLY RETAINING BREAKDOWN VOLTAGE AND METHOD OF MANUFACTURING THE SAME An N−-type silicon substrate (1) has a bottom surface and an upper surface which are opposed to each other. In the bottom surface of the N−-type silicon substrate (1), a P-type impurity diffusion layer (3) of high conce... | 01/04/2005 |
| 6800897 | Integrated circuit power devices having junction barrier controlled schottky diodes therein A power MOSFET includes a semiconductor substrate having a drift region therein and first and second transition regions of first conductivity type that extend between the drift region and a first surface of the semiconductor substrate. Each of the first and second t... | 10/05/2004 |
| 6790713 | Method for making an inlayed thyristor-based device A semiconductor device having a thyristor is manufactured and arranged in a manner that reduces or eliminates difficulties commonly experienced in the formation and implementation of such devices. According to an example embodiment of the present invention, a thyris... | 09/14/2004 |
| 6780532 | Photodiode detector and fabrication method thereof Disclosed is a photodiode detector including: an InP substrate; a u-In0.53Ga0.47As layer grown and stacked on the InP substrate; an u-Inp layer stacked on an upper portion of the u-In0.53Ga0.47As layer; a SiNx insulation l... | 08/24/2004 |
| 6774434 | Field effect device having a drift region and field shaping region used as capacitor dielectric A field effect transistor semiconductor device (1) comprises a source region (33), a drain region (14) and a drain drift region (11), the device having a field shaping region (20) adjacent the drift region (11) and arranged ... | 08/10/2004 |
| 6727526 | Thyristor with recovery time voltage surge resistance A preferably asymetrical thyristor (1) with at least one driver stage (20) for amplifying a control current (I) fed into the cathodal base (16) of the thyristor, in which, in the driver stage, the transistor gain factors αnpn and α | 04/27/2004 |
| 6690039 | Thyristor-based device that inhibits undesirable conductive channel formation A semiconductor device is adapted to inhibit the formation of a parasitic MOS-inversion channel between an emitter region and a gated base in a capacitively-coupled thyristor device. According to an example embodiment of the present invention, a thyristor... | 02/10/2004 |
| 6677622 | Semiconductor device having insulated gate bipolar transistor with dielectric isolation structure A semiconductor substrate is of first-conductivity-type and has a principal surface. A first semiconductor region and a second semiconductor region are of second-conductivity-type and formed apart from each other in the principal surface of the semiconduc... | 01/13/2004 |
| 6677608 | Semiconductor device for detecting gate defects The present invention provides a semiconductor device for detecting gate defects and the method of using the same to detect gate defects. The semiconductor device is comprised of a semiconductor substrate having an oxide layer on the top, a gate having sp... | 01/13/2004 |
| 6657239 | Power-switching semiconductor device In order to reduce a turn-on time of a power switching semiconductor device at a low cost, a first main electrode divided into a plurality of segments forming segment rows of a multi-concentric circle and a control electrode surrounding the segments are f... | 12/02/2003 |
| 6656845 | Method for forming semiconductor substrate with convex shaped active region Within a method for fabricating a semiconductor substrate while employing formed thereover a mask layer there is first employed the mask layer as an etch mask layer for forming a pair of isolation trenches within the semiconductor substrate and then later... | 12/02/2003 |
| 6580100 | Voltage-controlled vertical bidirectional monolithic switch A vertical voltage-controlled bidirectional monolithic switch formed between the upper and lower surfaces of a semiconductor substrate surrounded with a peripheral wall, including: a first multiple-cell vertical IGBT transistor extending between a cathode... | 06/17/2003 |
| 6570193 | Reverse conducting thyristor device, pressure-connection type semiconductor device and semiconductor substrate The present invention relates to a reverse conducting thyristor device. It aims at preventing heat generated by power loss from filling end field protective rubber and at simplifying a sheath storing a semiconductor substrate. In a reverse conducting thyr... | 05/27/2003 |
| 6562652 | Edge formation process with anodizing for aluminum solid electrolytic capacitor Edges of a slit and cut to length foil having a dielectric oxide film on at least one surface are edge formed by comprising anodizing the foil in an aqueous oxalic acid electrolyte, further edge a forming the foil in an aqueous citrate electrolyte, prefer... | 05/13/2003 |
| 6423988 | Pressure-contact semiconductor device This invention relates to a pressure-contact type semiconductor device (1) having a ring-shaped gate terminal, and aims at overcoming such a technical problem that a gate current is not uniformly supplied to a semiconductor substrate (4) due to a connecti... | 07/23/2002 |
| 6355948 | Semiconductor integrated circuit device There is provided a semiconductor integrated circuit device having a macro cell structure including: a rectangular macro cell region formed on a semiconductor substrate; a first diffusion region having the minimum permissible width, formed apart at least ... | 03/12/2002 |
| 6316808 | T-Gate transistor with improved SOI body contact structure Disclosed is a type "BC" body contacted SOI transistor and process for making these transistors in a manufacturing environment by providing a structure and process which removes overlay tolerance from the effective transistor width. The width is determine... | 11/13/2001 |
| 6271545 | Asymmetrical thyristor with blocking/sweep voltage independent of temperature behavior Both the blocking voltage as well as the sweep voltage of conventional thyristors exhibit a pronounced temperature behavior, whereby the corresponding voltage values can change by up to 15% within the relevant temperature range (5° C.-120° C.). In the p... | 08/07/2001 |
| 6236069 | Insulated-gate thyristor Disclosed herein is an insulated-gate thyristor comprising a base layer of a first conductivity type, having first and second major surfaces, a first main-electrode region of the first conductivity type, formed in the first major surface of the base layer... | 05/22/2001 |
| 6207974 | Process for manufacture of a p-channel MOS gated device with base implant through the contact window An MOS-gated power semiconductor device is formed by a process that uses a reduced number of masking steps and minimizes the number of critical alignments. A first photolithographic masking step defines the body or channel region and the source region of ... | 03/27/2001 |
| 6188109 | Semiconductor device having a sense electrode A buried sense electrode (8) having the same structure as that of a buried gate electrode (7) is provided in an n- layer (3) of an IGBT with a sense oxide film (10) interposed therebetween. The buried sense electrode (8) senses an electric pote... | 02/13/2001 |
| 6166402 | Pressure-contact type semiconductor element and power converter thereof A double circular gate conductor 9 comprises a first circular gate conductor 7 connected to a gate electrode 2a, a second circular gate conductor 8, and a connecting conductor which connects the first circular gate conductor 7 and the second circular gate... | 12/26/2000 |
| 6150671 | Semiconductor device having high channel mobility and a high breakdown voltage for high power applications A transistor of SiC having a drain and a highly doped substrate layer is formed on the drain. A highly n type buffer layer may optionally be formed on the substrate layer. A low doped n-type drift layer, a p-type base layer, a high doped n-type source reg... | 11/21/2000 |
