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| Number | Title | Issue Date |
| 7859012 | Thyristor-based semiconductor memory device with back-gate bias In accordance with an embodiment of the present invention, a semiconductor memory device includes an array of thyristor-based memory formed in a silicon-on-insulator (SOI) supporting substrate. A portion of the supporting structure of the SOI substrate has a density... | 12/28/2010 |
| 7573077 | Thyristor-based semiconductor memory device with back-gate bias In accordance with an embodiment of the present invention, a thyristor-based semiconductor memory device may comprise an array of thyristor-based memory formed in an SOI wafer. A supporting substrate may be formed with a density of dopants sufficient to assist deliv... | 08/11/2009 |
| 7557386 | Reverse conducting IGBT with vertical carrier lifetime adjustment A reverse conducting insulated gate bipolar transistor (IGBT) includes a semiconductor substrate having a front side and a back side and a first conductivity region between the front and back sides. The first conductivity region includes a reduced lifetime zone, a f... | 07/07/2009 |
| 7498614 | Voltage sustaining layer with opposite-doped islands for semiconductor power devices A semiconductor high-voltage device comprising a voltage sustaining layer between a n+-region and a p+-region is provided, which is a uniformly doped n (or p)-layer containing a plurality of floating p (or n)-islands. The effect of the floating islands is to absorb ... | 03/03/2009 |
| 7352047 | Systems and methods for integration of heterogeneous circuit devices A heterogeneous device comprises a substrate and a plurality of heterogeneous circuit devices defined in the substrate. In embodiments, a plurality of heterogeneous circuit devices are integrated by successively masking and ion implanting the substrate. The heteroge... | 04/01/2008 |
| 7326969 | Semiconductor device incorporating thyristor-based memory and strained silicon A semiconductor memory device may comprise a thyristor-based memory having some portions formed in strained silicon, and other portions formed in relaxed silicon. In a further embodiment, a thyristor in the thyristor-based memory may be formed in a region of relaxed... | 02/05/2008 |
| 7312487 | Three dimensional integrated circuit A three dimensional (3D) integrated circuit (IC), 3D IC chip and method of fabricating a 3D IC chip. The chip includes multiple layers of circuits, e.g., silicon insulator (SOI) CMOS IC layers, each including circuit elements. The layers may be formed in parallel an... | 12/25/2007 |
| 7262442 | Triac operating in quadrants Q1 and Q4 A triac including on its front surface side an autonomous starting well of the first conductivity type containing a region of the second conductivity type arranged to divide it, in top view, into a first and a second well portion, the first portion being connected t... | 08/28/2007 |
| 7253486 | Field plate transistor with reduced field plate resistance In one example embodiment, a transistor (100) is provided. The transistor (100) comprises a source (10), a gate (30), a drain (20), and a field plate (40) located between the gate (30) and the drain (20). The f... | 08/07/2007 |
| 7230288 | Solid-state image pickup device and fabrication method thereof A solid-state image pickup device includes: a plurality of light receiving portions arranged in a matrix, and a vertical transfer register which is four-phase driven by first, second, third and fourth transfer electrodes of a three-layer structure. The vertical tran... | 06/12/2007 |
| 7227197 | Semiconductor high-voltage devices A semiconductor high-voltage device comprising a voltage sustaining layer between a n+-region and a p+-region is provided, which is a uniformly doped n(or p)-layer containing a plurality of floating p (or n)-islands. The effect of the floating islands is to absorb a... | 06/05/2007 |
| 7224002 | Silicon on insulator read-write non-volatile memory comprising lateral thyristor and trapping layer Disclosed herein is an improved thyristor-based memory cell. In one embodiment, the cell is formed in a floating substrate using Silicon-On-Insulator (SOI) technology. The cell preferably incorporates a lateral thyristor formed entirely in the floating substrate, an... | 05/29/2007 |
| 7211868 | Protection circuit device using MOSFETs and a method of manufacturing the same A protection circuit device using a MOSFET has a plural of conductive paths separated electrically, a MOSFET chip integrating two power MOSFETs in one chip where a gate electrode and a source electrode are fixed on the desired conductive path, conductive material pr... | 05/01/2007 |
| 7195960 | Thin film transistor, manufacturing method thereof, and circuit and liquid crystal display device using the thin film transistor A thin film transistor has a structure capable of decreasing deterioration in Vgs-Ids characteristics. The thin film transistor has a source region composed of an N-type impurity-diffused region, a drain region, and a gate electrode, and a channel region formed dire... | 03/27/2007 |
| 7173290 | Thyristor switch with turn-off current shunt, and operating method A semiconductor switch includes a thyristor and a current shunt, preferably a transistor in parallel with and controlled by the thyristor, which shunts thyristor current at turn-off. The thyristor includes a portion of a bottom drift layer, with a p-n junction forme... | 02/06/2007 |
| 7151029 | Memory device and method of making the same A multi-stable memory or data storage element is used in crosspoint data-storage arrays, as a switch, a memory device, or as a logical device. The general structure of the multi-stable element comprises a layered, composite medium that both transports and stores cha... | 12/19/2006 |
| 7145186 | Memory cell with trenched gated thyristor One aspect of this disclosure relates to a memory cell. Various memory cell embodiments include an isolated semiconductor region separated from a bulk semiconductor region, an access transistor and a vertically-oriented thyristor formed in a trench extending between... | 12/05/2006 |
| 7118942 | Method of making atomic integrated circuit device A method of mass-producing a solid state device comprises providing an atomically smooth, solid state material layer no more than 40 Angstroms thick. This layer is uniformly and defect-freely bonded onto a substrate to provide an acceptable device yield. ... | 10/10/2006 |
| 7112868 | IGBT with monolithic integrated antiparallel diode An IGBT with monolithic integrated antiparallel diode has one or more emitter short regions forming the diode cathode in the region of the high-voltage edge. The p-type emitter regions of the IGBT have no emitter shorts. The counterelectrode of the diode exclusively... | 09/26/2006 |
| 7042027 | Gated lateral thyristor-based random access memory cell (GLTRAM) One aspect of the present subject matter relates to a memory cell, or more specifically, to a scalable GLTRAM cell that provides DRAM-like density and SRAM-like performance. According to various embodiments, the memory cell includes an access transistor and a gated,... | 05/09/2006 |
| 7034345 | High-power, integrated AC switch module with distributed array of hybrid devices A novel architecture of high-power four-quadrant hybrid power modules based on high-current trench gate IGBTs and arrays of low-current wide-bandgap diodes is conceived. The distributed physical layout of high power density wide-bandgap devices improves the cooling ... | 04/25/2006 |
| 7029956 | Memory system capable of operating at high temperatures and method for fabricating the same A memory system having a plurality of T-RAM cells arranged in an array is presented where each T-RAM cell has dual vertical devices and is fabricated over a SiC substrate. Each T-RAM cell has a vertical thyristor and a vertical transfer gate. The top surface of each... | 04/18/2006 |
| 7023028 | Protection structure for protection from electrostatic discharge and integrated circuit An ESD protection structure for protecting an integrated circuit from electrostatic discharge, having a bipolar protection element, whose emitter is formed by an emitter zone of the first conduction type, whose collector is formed by a buried layer of the first cond... | 04/04/2006 |
| 7011991 | Method of making atomic integrated circuit device A method of mass-producing a solid state device comprises providing an atomically smooth, solid state material layer no more than 40 Angstroms thick. This layer is uniformly and defect-freely bonded onto a substrate to provide an acceptable device yield. ... | 03/14/2006 |
| RE38953 | Insulated gate semiconductor device and method of manufacturing the same The RBSOA of a device is improved. A gate electrode (10) is linked to a p base layer (4) which is formed in a cell region (CR), and a p semiconductor layer (13) is formed to surround the cell region (CR). An emitter electrode (11) is conn... | 01/31/2006 |
| 6958263 | Methods of forming devices, constructions and systems comprising thyristors The invention includes SOI constructions containing one or more memory cells which include a transistor and a thyristor. In one aspect, a scalable GLTRAM cell provides DRAM-like density and SRAM-like performance. The memory cell includes an access transistor and a g... | 10/25/2005 |
| 6953953 | Deep trench isolation for thyristor-based semiconductor device A thyristor-based semiconductor device includes a filled trench separating and electrically insulating adjacent thyristor control ports. According to an example embodiment of the present invention, the filled trench is formed in a substrate adjacent to at least one ... | 10/11/2005 |
| 6936867 | Semiconductor high-voltage devices A semiconductor high-voltage device comprising a voltage sustaining layer between a n+-region and a p+-region is provided, which is a uniformly doped n(or p)-layer containing a plurality of floating p (or n)-islands. The effect of the floating islands is to absorb a... | 08/30/2005 |
| 6891206 | Lateral thyristor structure for protection against electrostatic discharge To protect against electrostatic discharges in monolithic integrated circuits in CMOS technology, a lateral thyristor structure is presented which has a much lower firing voltage compared to conventional thyristor structures. ... | 05/10/2005 |
| 6812504 | TFT-based random access memory cells comprising thyristors The invention includes SOI constructions containing one or more memory cells which include a transistor and a thyristor. In one aspect, a scalable GLTRAM cell provides DRAM-like density and SRAM-like performance. The memory cell includes an access transistor and a g... | 11/02/2004 |
| 6790713 | Method for making an inlayed thyristor-based device A semiconductor device having a thyristor is manufactured and arranged in a manner that reduces or eliminates difficulties commonly experienced in the formation and implementation of such devices. According to an example embodiment of the present invention, a thyris... | 09/14/2004 |
| 6787881 | Integrated power device with improved efficiency and reduced overall dimensions An integrated power device having a power transistor made up of a first diode and a second diode that are connected together in series between a collector region and emitter-contact region of the power transistor to define a common intermediate node, a control circu... | 09/07/2004 |
| 6784515 | Semiconductor integrated circuit device A solid state device comprises a solid state material substrate; two adjacent semiconductor pockets on the substrate; and a gate layer less than 10 Angstroms thick. The gate layer has at least an atomically smooth bottom major surface, and is perfectly bonded onto t... | 08/31/2004 |
| 6781161 | Non-gated thyristor device A semiconductor device with two epitaxial layers formed on a substrate. The middle layer of epitaxial material can be formed thin and with an appropriate doping concentration to provide a low avalanche breakdown voltage with a negative resistance characteristic. The... | 08/24/2004 |
| 6724043 | Bipolar MOSFET device There is disclosed a semiconductor device comprising: at least one cell comprising a base region (32) of a first conductivity type having disposed therein at least one emitter region (36a, 36b) of a second conductivity type; a firs... | 04/20/2004 |
| 6686612 | Thyristor-based device adapted to inhibit parasitic current Parasitic current leakage from a thyristor-based semiconductor device is inhibited. According to an example embodiment of the present invention, a thyristor-based semiconductor device includes a thyristor body portion and a control port located in a subst... | 02/03/2004 |
| 6686613 | Punch through type power device A negative buffer layer and a positive collector layer are formed on a side of one surface of a semiconductor substrate. The positive collector layer is set to have a low dose amount and set shallow so that a low injection efficiency emitter structure is ... | 02/03/2004 |
| 6683330 | Recessed thyristor control port A semiconductor device is formed including a substrate having an upper surface, a thyristor region in the substrate and a control port adapted for capacitively coupling to at least a portion of the thyristor region via a dielectric material. According to ... | 01/27/2004 |
| 6666481 | Shunt connection to emitter A semiconductor device is formed having a thyristor, a pass device and a conductive shunt that electrically connects an emitter region of the thyristor with a node near an upper surface of the substrate. In one example embodiment of the present invention,... | 12/23/2003 |
| 6635906 | Voltage sustaining layer with opposite-doped islands for semi-conductor power devices A semiconductor high-voltage device comprising a voltage sustaining layer between a n+ -region and a p+ -region is provided, which is a uniformly doped n(or p)-layer containing a plurality of floating p(or n)-islands. The effect of t... | 10/21/2003 |
