Class 257/136 - Enhancement mode (e.g., so-called SITs)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: Subject matter in which no current flows except for leakage
No. of patents: 135
Last issue date: 11/15/2011

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Number	Title	Issue Date
8058670	Insulated gate bipolar transistor (IGBT) with monolithic deep body clamp diode to prevent latch-up A trench insulation gate bipolar transistor (IGBT) power device with a monolithic deep body clamp diode comprising a plurality of trench gates surrounded by emitter regions of a first conductivity type near a top surface of a semiconductor substrate of the first con...	11/15/2011
7700971	Insulated gate silicon carbide semiconductor device An insulated gate silicon carbide semiconductor device is provided having small on-resistance. The device combines a static induction transistor structure with an insulated gate field effect transistor structure. The advantages of both the SIT structure and the insu...	04/20/2010
7439563	High-breakdown-voltage semiconductor device A high-breakdown-voltage semiconductor device comprises a high-resistance semiconductor layer, trenches formed on the surface thereof in a longitudinal plane shape and in parallel, first regions formed on the semiconductor layer to be sandwiched between adjacent one...	10/21/2008
7361954	Power semiconductor device Disclosed is a power semiconductor device, including: a gate electrode having a cross section having a length in a vertical direction, and having a shape extending in a direction orthogonal to the cross section; a gate insulating film surrounding the gate electrode;...	04/22/2008
7335928	Semiconductor device having a metal conductor in ohmic contact with the gate region on the bottom of each the first groove A silicon carbide semiconductor device such as JFET, SIT and the like is provided for accomplishing a reduction in on-resistance and high-speed switching operations. In the JFET or SIT which turns on/off a current with a depletion layer extending in a channel betwee...	02/26/2008
7314765	Switching device using superlattice without any dielectric barriers A switching device has an S (Superconductor)-N (Normal Metal)-S superlattice to control the stream of electrons without any dielectric materials. Each layer of said Superconductor has own terminal. The superlattice spacing is selected based on “Dimensional Crossov...	01/01/2008
7288800	Versatile system for cross-lateral junction field effect transistor The present invention provides a system for providing a cross-lateral junction field effect transistor (114) having desired high-performance desired voltage, frequency or current characteristics. The cross-lateral transistor is formed on a commercial semicond...	10/30/2007
7271040	Electrode contact section of semiconductor device A p-type impurity layer is formed in an n-type semiconductor substrate. Since the p-type impurity layer has a low impurity concentration and a sufficiently shallow depth of 1.0 μm or less, the carrier injection coefficient can be reduced. In the p-type impurity lay...	09/18/2007
7265398	Method and structure for composite trench fill A method and structure for a composite trench fill for silicon electronic devices. On a planar silicon substrate having a first deposited layer of oxide and a second deposited layer of polysilicon, a trench is etched. Deposition and etch processes using a combinatio...	09/04/2007
7230299	Power switch structure with low RDSon and low current limit and method In one embodiment, a power switch device (33) includes a first MOSFET device 41 and a second MOSFET device (42). A split gate structure (84) including a first gate electrode (48,87) controls the first MOSFET device (41). A s...	06/12/2007
7230283	Semiconductor device having a metal conductor in ohmic contact with the gate region on the bottom of each groove A silicon carbide semiconductor device such as JFET, SIT and the like is provided for accomplishing a reduction in on-resistance and high-speed switching operations. In the JFET or SIT which turns on/off a current with a depletion layer extending in a channel betwee...	06/12/2007
7179746	Method of surface treatment for manufacturing semiconductor device In a semiconductor device formed on a silicon surface which has a substantial (110) crystal plane orientation, the silicon surface is flattened so that an arithmetical mean deviation of surface Ra is not greater than 0.15 nm, preferably, 0.09 nm, which enables to ma...	02/20/2007
7173290	Thyristor switch with turn-off current shunt, and operating method A semiconductor switch includes a thyristor and a current shunt, preferably a transistor in parallel with and controlled by the thyristor, which shunts thyristor current at turn-off. The thyristor includes a portion of a bottom drift layer, with a p-n junction forme...	02/06/2007
7141832	Semiconductor device and capacitance regulation circuit According to an embodiment of the invention, there is provided a semiconductor device comprising: a semiconductor element having a first main electrode, a second main electrode and a control electrode, a current flowing between the first and second main electrodes b...	11/28/2006
7126186	Compensation component and process for producing the component A compensation component and a process for production thereof includes a semiconductor body having first and second electrodes, a drift zone disposed therebetween, and areas of a first conductivity type and a second conductivity type opposite the first conductivity ...	10/24/2006
7119380	Lateral trench field-effect transistors in wide bandgap semiconductor materials, methods of making, and integrated circuits incorporating the transistors A junction field effect transistor is described. The transistor is made from a wide bandgap semiconductor material. The device comprises source, channel, drift and drain semiconductor layers, as well as p-type implanted or Schottky gate regions. The source, channel,...	10/10/2006
7087472	Method of making a vertical compound semiconductor field effect transistor device In one embodiment, a method for fabricating a compound semiconductor vertical FET device includes forming a first trench in a body of semiconductor material, and forming a self-aligned second trench within the first trench to define a channel region. A doped gate re...	08/08/2006
7082248	Semiconductor waveguide-based avalanche photodetector with separate absorption and multiplication regions A semiconductor waveguide based optical receiver is disclosed. An apparatus according to aspects of the present invention includes an absorption region defined along an optical waveguide. The absorption region includes a first type of semiconductor material having a...	07/25/2006
7045397	JFET and MESFET structures for low voltage high current and high frequency applications JFET and MESFET structures, and processes of making same, for low voltage, high current and high frequency applications. The structures may be used in normally-on (e.g., depletion mode) or normally-off modes. The structures include an oxide layer positioned under th...	05/16/2006
7042063	Semiconductor wafer, semiconductor device, and process for manufacturing the semiconductor device A semiconductor wafer is disclosed in which a high concentration impurity layer is formed in a semiconductor wafer to a predetermined depth, in order to electrically connect electrodes formed on the principal face of the wafer without forming trenches and through ho...	05/09/2006
7038260	Dual gate structure for a FET and method for fabricating same A method for fabricating a dual gate structure for JFETs and MESFETs and the associated devices. Trenches are etched in a semiconductor substrate for fabrication of a gate structure for a JFET or MESFET. A sidewall spacer may be formed on the walls of the trenches t...	05/02/2006
6998697	Non-volatile resistance variable devices A chalcogenide comprising material is formed to a first thickness over the first conductive electrode material. The chalcogenide material comprises AxBy. A metal comprising layer is formed to a second thickness over the chalcogenide material. T...	02/14/2006
6965131	Thyristor switch with turn-off current shunt, and operating method A semiconductor switch includes a thyristor and a current shunt, preferably a transistor in parallel with and controlled by the thyristor, which shunts thyristor current at turn-off. The thyristor includes a portion of a drift layer, with a p-n junction formed below...	11/15/2005
6943382	Pressed-contact type semiconductor device A P++-type first diffusion layer is formed by diffusing P-type impurities on a front side of an N−-type semiconductor substrate, and an N-type fourth diffusion layer which is shallower than the first diffusion layer is formed by diffusing N-t...	09/13/2005
6933436	Photovoltaic cell A photovoltaic cell is described, having a photoactive layer (4) made of two molecular components, namely an electron donor and an electron acceptor, particularly a conjugated polymer component and a fullerene component, and having two metallic electrodes (	08/23/2005
6933589	Method of making a semiconductor transistor Transistors are manufactured by growing germanium source and drain regions, implanting dopant impurities into the germanium, and subsequently annealing the source and drain regions so that the dopant impurities diffuse through the germanium. The process is simpler t...	08/23/2005
6921932	JFET and MESFET structures for low voltage, high current and high frequency applications JFET and MESFET structures, and processes of making same, for low voltage, high current and high frequency applications. The structures may be used in normally-on (e.g., depletion mode) or normally-off modes. The structures include an oxide layer positioned under th...	07/26/2005
6917054	Semiconductor device A semiconductor device includes a trench formed on a source side of a drift region, a p-type gate region and a gate formed at the bottom of the trench, and the source formed over the entire surface of the unit device through an insulating film. The narrowest portion...	07/12/2005
6897493	Semiconductor device A pin diode is formed by a p+ collector region, an n type buffer region, an n− region and an n+ cathode region. A trench is formed from the surface of n+ cathode region through n+ cathode region to reach n	05/24/2005
6894346	Semiconductor device A structure is provided that ensures a low on-resistance and a better blocking effect. In a lateral type SIT (Static Induction Transistor) in which a first region is used as a p+ gate and a gate electrode is formed on the bottom of the first region, the s...	05/17/2005
6867437	Semiconductor device A pin diode is formed by a p+ collector region, an n type buffer region, an n− region and an n+ cathode region. A trench is formed from the surface of n+ cathode region through n+ cathode region to reach n	03/15/2005
6849880	Power semiconductor device A power semiconductor device includes second layers of a second conductivity type disposed in a first layer of a first conductivity type. The second layers extend in a depth direction and are arrayed at intervals. Third layers of the second conductivity type are dis...	02/01/2005
6838729	Semiconductor component with enhanced avalanche ruggedness The invention relates to a semiconductor component with enhanced avalanche ruggedness. At the nominal current of this semiconductor component, in the event of an avalanche the voltage applied between two electrodes is 6 % or more above the static reverse voltage at ...	01/04/2005
6831328	Anode voltage sensor of a vertical power component and use for protecting against short circuits The invention concerns an anode voltage sensor of a vertical power component selected from the group consisting of components called thyristor, MOS, IGBT, PMCT, EST, BRT transistor, MOS thyristor, turn-off MOS thyristor, formed by a lightly doped N-type substrate (	12/14/2004
6777722	Method and structure for double dose gate in a JFET A method for fabricating a junction field effect transistor (JFET) with a double dose gate structure. A trench is etched in the surface of a semiconductor substrate, followed by a low dose implant to form a first gate region. An anneal may or may not be performed af...	08/17/2004
6774408	Trench gate power device having a concentration at channel layer higher than a base layer and uniformly distributed along the depth of the trench and its manufacturing method In a trench MOS gate structure of a semiconductor device where trenches (T) are located between an n-type base layer (1) and an n-type source layer (3), a p-type channel layer (12) is formed adjacent to side walls of the trenches, having an even...	08/10/2004
6750477	Static induction transistor In a static induction transistor, in addition to a first gate layer (4), a plurality of second gate layers (41) having a shallower depth and a narrower gap therebetween than those of the first gate layer (4) are provided in an area surrounded by...	06/15/2004
6693310	Semiconductor device and manufacturing method thereof A pin diode is formed by a p+ collector region, an n type buffer region, an n- region and an n+ cathode region. A trench is formed from the surface of n+ cathode region through n+ cathode region to re...	02/17/2004
6653666	J-FET semiconductor configuration J-FET having a first semiconductor region (2, 3), which comprises a first contact (7) with a highly doped contact layer (8) serving as a source disposed between two second contacts (9) serving as a gate on its first surface (4). The three contacts (7, 9) ...	11/25/2003
6555878	Umos-like gate-controlled thyristor structure for ESD protection Described is a MOS gate-controlled SCR (UGSCR) structure with a U-shaped gate (UMOS) for an ESD protection circuit in an IC device which is compatible with shallow trench isolation (STI) and self-aligned silicide (salicide) fabrication technology. The UMO...	04/29/2003

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Class 257/136 - Enhancement mode (e.g., so-called SITs)