Microwave Oven With Removable Storage Cassette in Dashboard of Motor Vehicle
A microwave oven adapted for use within a motor vehicle dashboard area. The microwave oven has a removable storage cassette, and slidable platforms for securing and serving containers of beverages and foods.
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| Number | Title | Issue Date |
| 7928470 | Semiconductor device having super junction MOS transistor and method for manufacturing the same A semiconductor device having a super junction MOS transistor includes: a semiconductor substrate; a first semiconductor layer on the substrate; a second semiconductor layer on the first semiconductor layer; a channel forming region on a first surface portion of the... | 04/19/2011 |
| 7884390 | Structure and method of forming a topside contact to a backside terminal of a semiconductor device A vertically conducting semiconductor device includes a semiconductor substrate having a topside surface and a backside surface. The semiconductor substrate serves as a terminal of the vertically conducting device for biasing the vertically conducting device during ... | 02/08/2011 |
| 7863643 | Memory cell device having vertical channel and double gate structure A memory cell device having a vertical channel and a double gate structure is provided. More specifically, a memory cell device having a vertical channel and a double gate structure is characterized by having a pillar active region with a predetermined height, which... | 01/04/2011 |
| 7772613 | Semiconductor device with large blocking voltage and method of manufacturing the same A normally-off type junction FET in which a channel resistance is reduced without lowering its blocking voltage is provided. In a junction FET formed with using a substrate made of silicon carbide, an impurity concentration of a channel region (second epitaxial laye... | 08/10/2010 |
| 7714352 | Hetero junction semiconductor device A semiconductor device, includes: a first conductivity-semiconductor substrate; a hetero semiconductor region for forming a hetero junction with the first conductivity-semiconductor substrate; a gate electrode adjacent to a part of the hetero junction by way of a ga... | 05/11/2010 |
| 7615802 | Semiconductor structure comprising a highly doped conductive channel region and method for producing a semiconductor structure The invention relates to a semiconductor structure for controlling a current (I), comprising a first n-conductive semiconductor region (2), a current path that runs within the first semiconductor region (2) and a channel region (22). The channel... | 11/10/2009 |
| 7592643 | Semiconductor device having a vertical transistor and method for manufacturing the same A semiconductor device having a vertical transistor comprises a silicon substrate; a drain region, a channel region and a source region vertically stacked on the silicon substrate; a buried type bit line formed under the drain region in the silicon substrate to cont... | 09/22/2009 |
| 7586130 | Vertical field effect transistor using linear structure as a channel region and method for fabricating the same A vertical field effect transistor includes: an active region with a bundle of linear structures functioning as a channel region; a lower electrode, functioning as one of source and drain regions; an upper electrode, functioning as the other of the source and drain ... | 09/08/2009 |
| 7453103 | Semiconductor constructions The invention includes semiconductor structures having buried silicide-containing bitlines. Vertical surround gate transistor structures can be formed over the bitlines. The surround gate transistor structures can be incorporated into memory devices, such as, for ex... | 11/18/2008 |
| 7417282 | Vertical double-diffused metal oxide semiconductor (VDMOS) device incorporating reverse diode The present invention disclosed herein is a Vertical Double-Diffused Metal Oxide Semiconductor (VDMOS) device incorporating a reverse diode. This device includes a plurality of source regions isolated from a drain region. A source region in close proximity to the dr... | 08/26/2008 |
| 7417266 | MOSFET having a JFET embedded as a body diode A field effect transistor, in accordance with one embodiment, includes a metal-oxide-semiconductor field effect transistor (MOSFET) having a junction field effect transistor (JFET) embedded as a body diode. ... | 08/26/2008 |
| 7405452 | Semiconductor device containing dielectrically isolated PN junction for enhanced breakdown characteristics A semiconductor device includes a field shield region that is doped opposite to the conductivity of the substrate and is bounded laterally by dielectric sidewall spacers and from below by a PN junction. For example, in a trench-gated MOSFET the field shield region m... | 07/29/2008 |
| 7397126 | Semiconductor device The present invention provides inhibiting an electrical leakage caused by anion migration. A trenched portion 15 is provided as ion migration-preventing zone between a source electrode 4 and a gate electrode 5. The trenched portion 15 is ... | 07/08/2008 |
| 7381595 | High-density plasma oxidation for enhanced gate oxide performance A method is provided for forming a low-temperature vertical gate insulator in a vertical thin-film transistor (V-TFT) fabrication process. The method comprises: forming a gate, having vertical sidewalls and a top surface, overlying a substrate insulation layer; depo... | 06/03/2008 |
| 7378317 | Superjunction power MOSFET Methods and apparatus are provided for TMOS devices, comprising multiple N-type source regions, electrically in parallel, located in multiple P-body regions separated by N-type JFET regions at a first surface. The gate overlies the body channel regions and the JFET ... | 05/27/2008 |
| 7372100 | Semiconductor device A semiconductor device includes: a semiconductor layer of a first conductivity type; a plurality of first cylindrical semiconductor pillar regions of the first conductivity type periodically provided on a major surface of the semiconductor layer; a plurality of seco... | 05/13/2008 |
| 7365372 | Semiconductor device and method for manufacturing semiconductor device The present invention is to provide a semiconductor device including: a semiconductor layer that has a first-conductivity-type region, a second-conductivity-type region, a first-conductivity-type region, and a second-conductivity-type region that are adjacent to eac... | 04/29/2008 |
| 7355223 | Vertical junction field effect transistor having an epitaxial gate A vertical junction field effect transistor includes a trench formed in an epitaxial layer. The trench surrounds a channel region of the epitaxial layer. The channel region may have a graded or uniform dopant concentration profile. An epitaxial gate structure is for... | 04/08/2008 |
| 7339206 | Field effect transistor including a group III-V compound semiconductor layer A field effect transistor (FET) includes a first semiconductor layer and a second semiconductor layer, the second semiconductor layer being formed on the first semiconductor layer and having a band gap energy greater than that of the first semiconductor layer. The f... | 03/04/2008 |
| 7317225 | Power semiconductor device The power semiconductor device according to one embodiment of the present invention at least comprises: first pillar layers of the first conductive type and second pillar layers of a second conductive type which constitute a super-junction structure in a device sect... | 01/08/2008 |
| 7314765 | Switching device using superlattice without any dielectric barriers A switching device has an S (Superconductor)-N (Normal Metal)-S superlattice to control the stream of electrons without any dielectric materials. Each layer of said Superconductor has own terminal. The superlattice spacing is selected based on “Dimensional Crossov... | 01/01/2008 |
| 7286060 | Indicators for vacuum tube replacement devices A vacuum tube replacement device includes an indicator. The indicator can be arranged to provide audible and/or visual indication of system performance, function, status, or any other desired indication. The vacuum tube replacement device is pin-for-pin compatible w... | 10/23/2007 |
| 7279743 | Closed cell trench metal-oxide-semiconductor field effect transistor Embodiments of the present invention provide an improved closed cell trench metal-oxide-semiconductor field effect transistor (TMOSFET). The closed cell TMOSFET comprises a drain, a body region disposed above the drain region, a gate region disposed in the body regi... | 10/09/2007 |
| 7265398 | Method and structure for composite trench fill A method and structure for a composite trench fill for silicon electronic devices. On a planar silicon substrate having a first deposited layer of oxide and a second deposited layer of polysilicon, a trench is etched. Deposition and etch processes using a combinatio... | 09/04/2007 |
| 7265393 | Thin-film transistor with vertical channel region A vertical thin-film transistor (V-TFT) is provided along with a method for forming the V-TFT. The method comprises: providing a substrate made from a material such as Si, quartz, glass, or plastic; conformally depositing an insulating layer overlying the substrate;... | 09/04/2007 |
| 7262946 | Integrated electronic disconnecting circuits, methods, and systems Merged devices for transient blocking. A pass transistor is placed so that its body potential drives the gate of a depletion-mode JFET-type blocking transistor. Thus a transient which appears on an external terminal is very rapidly propagated to shut off the blockin... | 08/28/2007 |
| 7244970 | Low capacitance two-terminal barrier controlled TVS diodes A two-terminal barrier controlled TVS diode has a depletion region barrier blocking majority carrier flow through the channel region at the vicinity of the cathode region at bias levels below the predetermined clamping voltage applied between the anode electrode and... | 07/17/2007 |
| 7241655 | Method of fabricating a vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array A vertical transistor having a wrap-around-gate and a method of fabricating such a transistor. The wrap-around-gate (WAG) vertical transistors are fabricated by a process in which source, drain and channel regions of the transistor are automatically defined and alig... | 07/10/2007 |
| 7242040 | Lateral trench field-effect transistors in wide bandgap semiconductor materials, methods of making, and integrated circuits incorporating the transistors A junction field effect transistor is described. The transistor is made from a wide bandgap semiconductor material. The device comprises source, channel, drift and drain semiconductor layers, as well as p-type implanted or Schottky gate regions. The source, channel,... | 07/10/2007 |
| 7227226 | Semiconductor device with buried-oxide film The present invention is a semiconductor device which includes: a semiconductor substrate; a BOX film disposed on top of the semiconductor substrate; an active layer disposed on top of the BOX film; a base region disposed proximate to a surface of the active layer; ... | 06/05/2007 |
| 7187587 | Programmable memory address and decode circuits with low tunnel barrier interpoly insulators Structures and methods for programmable memory address and decode circuits with low tunnel barrier interpoly insulators are provided. The decoder for a memory device includes a number of address lines and a number of output lines wherein the address lines and the ou... | 03/06/2007 |
| 7180768 | Semiconductor memory device including 4TSRAMs Disclosed is a method of improving stability of a memory cell in read mode in an SRAM including a memory cell comprising two access MOS transistors and two drive MOS transistors. The magnitude of voltage between gate and source of an access transistor of a memory ce... | 02/20/2007 |
| 7173290 | Thyristor switch with turn-off current shunt, and operating method A semiconductor switch includes a thyristor and a current shunt, preferably a transistor in parallel with and controlled by the thyristor, which shunts thyristor current at turn-off. The thyristor includes a portion of a bottom drift layer, with a p-n junction forme... | 02/06/2007 |
| 7164160 | Integrated circuit device with a vertical JFET We disclose the structure of a JFET device, the method of making the device and the operation of the device. The device is built near the top of a substrate. It has a buried layer that is electrically communicable to a drain terminal. It has a channel region over th... | 01/16/2007 |
| 7161209 | Power semiconductor device The power semiconductor device according to one embodiment of the present invention at least comprises: first pillar layers of the first conductive type and second pillar layers of a second conductive type which constitute a super-junction structure in a device sect... | 01/09/2007 |
| 7161192 | Silicon controlled rectifier A silicon controlled rectifier is provided, including: a first conducting-type substrate; two second conducting-type deep wells separately disposed inside the first conducting-type substrate; a gate above the first conducting-type substrate and between the two secon... | 01/09/2007 |
| 7154130 | Semiconductor device provided by silicon carbide substrate and method for manufacturing the same A semiconductor device includes a first field effect transistor including a source and a gate and disposed in a silicon carbide substrate; and a second field effect transistor including a drain and a gate and disposed in the substrate. The drain of the second field ... | 12/26/2006 |
| 7136302 | Integrated circuit memory device and method Structures and methods for DEAPROM memory with low tunnel barrier intergate insulators are provided. The DEAPROM memory includes a first source/drain region and a second source/drain region separated by a channel region in a substrate. A floating gate opposes the ch... | 11/14/2006 |
| 7129544 | Vertical compound semiconductor field effect transistor structure In one embodiment, a compound semiconductor vertical FET device (11) includes a first trench (29) formed in a body of semiconductor material (13), and a second trench (34) formed within the first trench (29) to define a channel reg... | 10/31/2006 |
| 7126167 | Monolithically integrated resistive structure with power IGBT (insulated gate bipolar transistor) devices A device integrated in a semiconductor substrate of a first type of conductivity being crowned by a semiconductor layer of a second type of conductivity comprising a voltage controlled resistive structure and an IGBT device, wherein the resistive structure comprises... | 10/24/2006 |