U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Icon_funbox Quotables

"The wireless music box has no imaginable commercial value. Who would pay for a message sent to nobody in particular?"

David Sarnoff, American radio pioneer ; 1921

Newsletter  PatentStorm News

Make the Most of Our Site

See this month's Top Inventors and Most Cited Patents.

Stay on top of the latest innovations by subscribing to an RSS feed.

Registered users: Manage your profile.

 

Class 216/46 - Masking of sidewall


Subclass of Class 216 - Etching a substrate: processes
Definition: Process of using masking on a side wall of a substrate to
No. of patents: 118
Last issue date: 05/15/2012


1      
NumberTitleIssue Date
8177990Etching method, plasma processing system and storage medium
Disclosed is a method of etching a substrate having a layered structure in which a photoresist mask with a pattern, a coating film made of silicon oxide, and an organic film are laminated in that order from the top. Before etching the coating film of silicon oxide, ...
05/15/2012
8057692Methods of forming fine patterns in the fabrication of semiconductor devices
In a method of forming a semiconductor device, a feature layer is provided on a substrate and a mask layer is provided on the feature layer. A portion of the mask layer is removed in a first region of the semiconductor device where fine features of the feature layer...
11/15/2011
8017027Semiconductor fabricating process
A semiconductor fabricating process is provided. First, a substrate is provided. The substrate has thereon a stacked structure and a mask layer disposed on the stacked structure. Thereafter, an oxide layer is formed on a surface of the mask layer and a surface of at...
09/13/2011
7959818Method for forming a fine pattern of a semiconductor device
A method for forming a fine pattern of a semiconductor device includes forming a photoresist pattern over a semiconductor substrate including an underlying layer. A cross-linking layer is formed on the sidewall of the photoresist pattern. The photoresist pattern is ...
06/14/2011
7425277Method for hard mask CD trim
Broadly speaking, methods and an apparatus are provided for removing an inorganic material from a substrate. More specifically, the methods provide for removing the inorganic material from the substrate through exposure to a high density plasma generated using an in...
09/16/2008
7354523Methods for sidewall etching and etching during filling of a trench
A method for sidewall etching includes providing a substrate having a trench defined therein, with the trench having fill material disposed over a bottom thereof, along a sidewall thereof, and at the trench opening. The fill material along the sidewall of the trench...
04/08/2008
7344652Plasma etching method
An etching method for forming a recess (220) having an opening dimension (R) of millimeter order in an object (212) to be etched such as a semiconductor wafer. A mask (214) having an opening corresponding to the recess (220) is formed on ...
03/18/2008
7332098Phase shift mask and fabricating method thereof
The present invention provides a phase shift mask and fabricating method thereof, by which a critical dimension of a semiconductor pattern can be accurately formed in a manner of compensating a boundary step difference between an active area and an insulating layer....
02/19/2008
7311850Method of forming patterned thin film and method of fabricating micro device
In a method of forming a patterned thin film, first, an etching stopper film and a film to be patterned are formed in this order on a base layer. Next, a patterned first film is formed on the film to be patterned. Next, a second film is formed over an entire surface...
12/25/2007
7271108Multiple mask process with etch mask stack
A method for forming etch features in an etch layer over a substrate is provided. An etch mask stack is formed over the etch layer. A first mask is formed over the etch mask stack. A sidewall layer is formed over the first mask, which reduces the widths of the space...
09/18/2007
7271102Method of etching uniform silicon layer
A method of etching a silicon layer to avoid non-uniformity. First, a patterned silicon layer is provided. Next, an etching buffer layer is conformally formed on the surface and the top layer of the patterned silicon layer. Finally, the etching buffer layer and the ...
09/18/2007
7271107Reduction of feature critical dimensions using multiple masks
A method for forming features in an etch layer is provided. A first mask is formed over the etch layer wherein the first mask defines a plurality of spaces with widths. A sidewall layer is formed over the first mask. Features are etched into the etch layer through t...
09/18/2007
7268054Methods for increasing photo-alignment margins
Methods and structures are provided for increasing alignment margins when contacting pitch multiplied interconnect lines with other conductive features in memory devices. The portions of the lines at the periphery of the memory device are formed at an angle and are ...
09/11/2007
7247247Selective etching method
A selective etching method with lateral protection function is provided. The steps includes: (a) providing a substrate; (b) forming a plurality of tunnels; (c) forming a lateral strengthening structure at a peripheral wall of the tunnels; (d) removing a bottom porti...
07/24/2007
7232762Method for forming an improved low power SRAM contact
A method of forming contact openings in a semiconductor device including providing a semiconducting substrate; forming an etch stop layer on said semiconducting substrate; forming a dielectric layer on said etch stop layer; forming a bottom anti-reflective coating (...
06/19/2007
7208361Replacement gate process for making a semiconductor device that includes a metal gate electrode
A method for making a semiconductor device is described. That method comprises forming a polysilicon layer on a dielectric layer, which is formed on a substrate. The polysilicon layer is etched to generate a patterned polysilicon layer with an upper surface that is ...
04/24/2007
7202171Method for forming a contact opening in a semiconductor device
A method of forming a self-aligned contact opening in an insulative layer formed over a substrate in a semiconductor device involves etching the insulative layer with at least one fluorocarbon and ammonia. ...
04/10/2007
7166232Method for producing a solid body including a microstructure
According to a method for producing a solid body (1) including a microstructure (2), the surface of a substrate (3) is provided with a masking layer (6) that is impermeable to a substance to be applied. The substance is then incorporated ...
01/23/2007
7141178Plasma etching method
An etching method for forming a recess (220) having an opening dimension (R) of millimeter order in an object (212) to be etched such as a semiconductor wafer. A mask (214) having an opening corresponding to the recess (220) is formed on ...
11/28/2006
7122481Sealing porous dielectrics with silane coupling reagents
A method and structure for sealing porous dielectrics using silane coupling reagents is herein described. A sealant chain (silane coupling reagent) is formed from at least silicon, carbon, oxygen, and hydrogen and exposed to a porous dielectric material, wherein the...
10/17/2006
7122296Lithography pattern shrink process and articles
Novel processes of applying a thin, uniform, conformal organic polymeric film by a wide variety of deposition processes into lithography pattern substrates are provided. The inventive processes result in shrinking of the gaps in the lithography pattern equally, thus...
10/17/2006
7118682Low loss SOI/CMOS compatible silicon waveguide and method of making the same
A method and structure for reducing optical signal loss in a silicon waveguide formed within a silicon-on-insulator (SOI) structure uses CMOS processing techniques to round the edges/corners of the silicon material along the extent of the waveguiding region. One exe...
10/10/2006
7105098Method to control artifacts of microstructural fabrication
New methods for fabrication of silicon microstructures have been developed. In these methods, an etching delay layer is deposited and patterned so as to provide differential control on the depth of features being etched into a substrate material. Compensation for et...
09/12/2006
7084066Method of uniformly etching refractory metals, refractory metal alloys and refractory metal silicides
This invention is directed to a process for etching a semiconductor device using an etchant composition to form a predetermined etched pattern therein. The semiconductor device typically has a plurality of layers. At least one of the layers comprises a refractory me...
08/01/2006
7071114Method and apparatus for dry etching
A method and apparatus for dry etching changes at least one of the effective pumping speed of a vacuum chamber and the gas flow rate to alter the processing of an etching pattern side wall of a sample between first and second conditions. The first and second conditi...
07/04/2006
7052617Simplified etching technique for producing multiple undercut profiles
A process for producing multiple undercut profiles in a single material. A resist pattern is applied over a work piece and a wet etch is performed to produce an undercut in the material. This first wet etch is followed by a polymerizing dry etch that produces a poly...
05/30/2006
7045449Methods of forming semiconductor constructions
The invention includes a semiconductor construction having a pair of channel regions that have sub-regions doped with indium and surrounded by boron. A pair of transistor constructions are located over the channel regions and are separated by an isolation region. Th...
05/16/2006
7033952Apparatus and method using a remote RF energized plasma for processing semiconductor wafers
Chemical generator and method for generating a chemical species at a point of use such as the chamber of a reactor in which a workpiece such as a semiconductor wafer is to be processed. The species is generated by creating free radicals, and combining the free radic...
04/25/2006
6972228Method of forming an element of a microelectronic circuit
A method is described for forming an element of a microelectronic circuit. A sacrificial layer is formed on an upper surface of a support layer. The sacrificial layer is extremely thin and uniform. A height-defining layer is then formed on the sacrificial layer, whe...
12/06/2005
6961981Method of producing a piezoelectric resonator
The invention concerns a piezoelectric resonator piece of a piezoelectric resonator having electrode patterns for forming exciting electrodes each of which is composed of an under a metal layer. Each of the electrode patterns for forming conduction electrodes is com...
11/08/2005
6958125Method for manufacturing liquid jet recording head
A method for manufacturing a liquid jet recording head having an element substrate provided with a plurality of discharge energy generating elements for applying discharging energy to a recording liquid in accordance with image data, a liquid chamber for storing the...
10/25/2005
6955961Method for defining a minimum pitch in an integrated circuit beyond photolithographic resolution
A method for defining a minimum pitch in an integrated circuit beyond photolithographic resolution controls the defined pitches of the target layer by use of polymer spacer, photo-insensitive polymer plug and polymer mask during the process, so as to achieve the min...
10/18/2005
6952028Ferroelectric memory devices with expanded plate line and methods in fabricating the same
A ferroelectric memory device includes a lower interlayer dielectric on a semiconductor substrate, a plurality of ferroelectric capacitors, and a plate line. The ferroelectric capacitors are on the lower interlayer dielectric. The plate line extends across and elect...
10/04/2005
6887395Method of forming sub-micron-size structures over a substrate
A method is provided for forming sub-micron-size structures over a substrate. A width-defining step is formed over the substrate. A width-defining layer is formed over an edge of the width-defining step. The width-defining layer is etched back to leave a spacer adja...
05/03/2005
6864184Method for reducing critical dimension attainable via the use of an organic conforming layer
In one embodiment, a semiconductor device processing method, comprising the steps of: (a) using a patterned photoresist to form a structure having at least one edge; (b) prior to removal of the photoresist, forming a conforming layer from an organic compound and pat...
03/08/2005
6835665Etching method of hardly-etched material and semiconductor fabricating method and apparatus using the method
A film of hardly-etched material formed on a substrate is etched using a mask formed on the film of hardly-etched material and a plasma, wherein the film of hardly-etched material is etched using the mask formed with a side wall angled at 90 degrees or less with res...
12/28/2004
6833079Method of etching a shaped cavity
The present disclosure pertains to our discovery of a method of etching a shaped cavity in a substrate, where the shaped cavity has a width that is at least as great as its depth. We have discovered that by varying the process chamber pressure during etching of the ...
12/21/2004
6827869Method of micromachining a multi-part cavity
The present disclosure pertains to our discovery of a particularly efficient method for etching a multi-part cavity in a substrate. The method provides for first etching a shaped opening, depositing a protective layer over at least a portion of the inner surface of ...
12/07/2004
6811853Single mask lithographic process for patterning multiple types of surface features
A method for patterning different types of surface features on a semiconductor substrate (e.g. metal pads, etched pits and grooves) where the features are accurately located by a single mask. First, a dielectric layer is formed on the substrate. Next, an etch-resist...
11/02/2004
6797188Self-cleaning process for etching silicon-containing material
A method of etching a silicon-containing material in a substrate comprises placing the substrate in a process chamber and exposing the substrate to an energized gas comprising fluorine-containing gas, chlorine-containing gas and sidewall-passivation gas. The silicon...
09/28/2004
1      
 
Sign InRegister
Username  
Password   
forgot password?