A simulation environment for the sport of boxing utilizing a robotic machine interface system which carries a person
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| Number | Title | Issue Date |
| 7812265 | Semiconductor package, printed circuit board, and electronic device Provided are a semiconductor package and a method for forming the same, and a PCB (printed circuit board). The semiconductor package comprises: a PCB including a slit at a substantially central portion thereof, the PCB including an upper surface and a lower surface;... | 10/12/2010 |
| 7714236 | Electric component An electric component includes a substrate, a function element provided on the substrate, a first sealing body provided on the substrate to cover the function element at a certain distance, the first sealing body including multiple apertures communicating with an in... | 05/11/2010 |
| 7683269 | Thin film device and method for manufacturing the same A terminal electrode body on a substrate is exposed relative to a resin layer, protruding out beyond the side of the resin layer. That is, the terminal electrode body is not covered by the resin layer. The electronic element is covered by an insulating layer and the... | 03/23/2010 |
| 7683268 | Semiconductor module with high process accuracy, manufacturing method thereof, and semiconductor device therewith A semiconductor element and a passive element are embedded in an insulating resin film by thermocompression bonding. After formation of a interconnection, a layered film which contains a film insulating between elements and is provided with a recess or penetrated po... | 03/23/2010 |
| 7371609 | Stacked module systems and methods The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In a preferred embodiment in accordance with the invention, a form standard associated with one or more CSPs provides a physical f... | 05/13/2008 |
| 7362586 | Electronic component with shielding case and method of manufacturing the same Shielding cases each include a pair of opposed first surfaces with catching pieces protruding therefrom and a pair of second surfaces without catching pieces. A motherboard forms substrates each including a pair of opposed first side surfaces with catching grooves a... | 04/22/2008 |
| 7362201 | Inductance device and manufacturing method thereof An inductance device has a hollow center coil around which a conducting wire is wound so that a hollow portion is formed along a center axis line of the hollow center coil, a filler which is filled into the hollow portion of the hollow center coil, and includes magn... | 04/22/2008 |
| 7352602 | Configurable inputs and outputs for memory stacking system and method Embodiments of the present invention relate to configurable inputs and/or outputs for memory and memory stacking applications. More specifically, embodiments of the present invention include memory devices that include a die having a circuit configured for enablemen... | 04/01/2008 |
| 7350979 | Optical transceiver having an optical receptacle optionally fixed to a frame The present invention provides an optical transceiver that has an optical semiconductor device coupled to an optical fiber via an optical connector attached to an end of the optical fiber. The optical transceiver comprises at least one optical subassembly including ... | 04/01/2008 |
| 7330354 | Mobile terminal device and method for radiating heat therefrom In a mobile terminal device, at least one heat conduction layer formed of a member, such as copper, aluminum or carbon, being excellent in heat conductivity is provided inside a circuit board on which electronic components are mounted. The heat generated in the elec... | 02/12/2008 |
| 7310458 | Stacked module systems and methods The present invention provides methods for constructing stacked circuit modules and precursor assemblies with flexible circuitry. Using the methods of the present invention, a single set of flexible circuitry whether articulated as one or two flex circuits may be em... | 12/18/2007 |
| 7282796 | Electronic assembly having a more dense arrangement of contacts that allows for routing of traces to the contacts An electronic assembly is described, having a substrate and contacts on the substrate which are spaced and arranged in a manner that allows for a more dense arrangement of contacts but still allows for routing of traces between the contacts. ... | 10/16/2007 |
| 7274110 | Semiconductor component having a CSP housing The invention relates to a semiconductor component for mounting on a printed circuit board. The semiconductor component includes a housing that at least partially surrounds at least one flat semiconductor chip. Electrical contacts are assigned to the semiconductor c... | 09/25/2007 |
| 7268002 | Packaging method, packaging structure and package substrate for electronic parts A packaging method, a packaging structure and a package is substrate capable of restraining a warp of a thin film substrate, increasing a product yield, and building up a sufficient cooling capacity in the case of mounting an LSI having a high exothermic quantity. A... | 09/11/2007 |
| 7262082 | Method of making a three-dimensional stacked semiconductor package with a metal pillar and a conductive interconnect in an encapsulant aperture A method of making a three-dimensional stacked semiconductor package includes providing a first semiconductor chip assembly that includes a first chip, a first conductive trace and a first encapsulant, wherein the first conductive trace includes a first metal pillar... | 08/28/2007 |
| 7247933 | Thin multiple semiconductor die package A method and apparatus for forming a multiple semiconductor die assembly (200, 300, 400) having a thin profile are presented. The semiconductor die assembly (200, 300, 400) comprises a plurality of die packages (100), with each die package (1... | 07/24/2007 |
| 7239024 | Semiconductor package with recess for die A semiconductor package is disclosed with a recess (51) for an integrated circuit die (52). The recess is made by bending or deforming all layers of a package substrate, and therefore the recess contains circuitry to connect to the integrated circuit d... | 07/03/2007 |
| 7236372 | Surface mounted power supply circuit apparatus and method for manufacturing it A surface mounted power supply circuit apparatus, including a circuit substrate, circuit constituting parts mounted on the circuit substrate, and a sealing member provided on the circuit substrate for covering the circuit constituting parts, at least one portion of ... | 06/26/2007 |
| 7227250 | Ball grid array substrate having window and method of fabricating same Disclosed is a ball grid array substrate having a window formed on a core material instead of a thin core material, and wherein a semiconductor chip is mounted thereon, thereby reducing the thickness of a package, and a method of fabricating the same. The ball grid ... | 06/05/2007 |
| 7227249 | Three-dimensional stacked semiconductor package with chips on opposite sides of lead A three-dimensional stacked semiconductor package includes first and second chips, first and second adhesives, first and second wire bonds, a lead and an encapsulant. The chips are disposed on opposite sides of the lead, and the wire bonds contact the same side of t... | 06/05/2007 |
| 7208335 | Castellated chip-scale packages and methods for fabricating the same A method for fabricating a chip-scale package includes securing a device substrate that carries at least two adjacent semiconductor devices to a sacrificial substrate. The sacrificial substrate may include conductive elements on a surface thereof, which are located ... | 04/24/2007 |
| 7199440 | Techniques for joining an opto-electronic module to a semiconductor package The present invention provides a low cost device that has a true die to external fiber optic connection. Specifically, the present invention relates to an optical device package joined to a semiconductor device package. In some cases, the combination is joined using... | 04/03/2007 |
| 7196418 | Semiconductor device and stacked semiconductor device that can increase flexibility in designing a stacked semiconductor device A semiconductor device includes a semiconductor element having a plurality of electrodes provided on one principal surface thereof and a wiring substrate having a conductive layer on an insulating substrate. The wiring substrate is arranged in a substantially U-shap... | 03/27/2007 |
| 7193490 | High frequency transmission line and high frequency board Since a width of an edge portion of a signal line of a first high frequency transmission line is changed with respect to a width of another portion thereof, a deviation of impedances in a connection portion of the first and second high frequency transmission lines c... | 03/20/2007 |
| 7189593 | Elimination of RDL using tape base flip chip on flex for die stacking A flexible film interposer for stacking a flip chip semiconductor die onto a second (bottom) semiconductor die, semiconductor devices and stacked die assemblies that incorporate the flexible film interposer, and methods of fabricating the devices and assemblies are ... | 03/13/2007 |
| 7190060 | Three-dimensional stacked semiconductor package device with bent and flat leads and method of making same A three-dimensional stacked semiconductor package device includes first and second semiconductor package devices and a conductive bond. The first device includes a first insulative housing, a first semiconductor chip and a first lead that is bent outside the first i... | 03/13/2007 |
| 7183491 | Printed wiring board with improved impedance matching To provide a printed wiring board where the impedance between pads through which differential signals pass has been set to a predetermined standard value. The printed wiring board includes a first conductor layer extending over an area excluding a hole formed for ea... | 02/27/2007 |
| 7174631 | Method of fabricating electrical connection terminal of embedded chip An electrical connection terminal of an embedded chip and a method for fabricating the same are disclosed. An insulating layer is provided on a circuit board integrated with a chip and has a plurality of first openings for exposing a conductive pad of the chip. A fi... | 02/13/2007 |
| 7173325 | Expansion constrained die stack Structures and techniques for mounting semiconductor dies are disclosed. In one embodiment, the invention includes a stack of printed wiring board assemblies that are connected via interconnection components. At least one of the printed wiring board assemblies inclu... | 02/06/2007 |
| 7161092 | Apparatus and method for protecting an electronic circuit The present invention provides in one embodiment, a system for encapsulating a substrate on a vehicle structure. The system includes the substrate, the vehicle structure and a package substrate. The substrate has a top portion and a bottom portion. The vehicle struc... | 01/09/2007 |
| 7129113 | Method of making a three-dimensional stacked semiconductor package with a metal pillar in an encapsulant aperture A method of making a three-dimensional stacked semiconductor package includes providing a first semiconductor chip assembly that includes a first chip, a first conductive trace and a first encapsulant, wherein the first conductive trace includes a first metal pillar... | 10/31/2006 |
| 7066741 | Flexible circuit connector for stacked chip module The present invention provides a flexible circuit connector for electrically coupling IC devices to one another in a stacked configuration. Each IC device includes: (1) a package having top, bottom, and peripheral sides; and (2) external leads that extend out from a... | 06/27/2006 |
| 7067911 | Three-dimensional stacked semiconductor package with metal pillar in encapsulant aperture A three-dimensional stacked semiconductor package includes first and second semiconductor chip assemblies. The first semiconductor chip assembly includes a first chip, a first conductive trace and a first encapsulant, and the first conductive trace includes a first ... | 06/27/2006 |
| 7049510 | Sensor A sensor with a carrier board which is arranged in a housing is at least partly produced by an injection molding process and fitted with electronic, optical, electromechanical and/or opto-electronic components. A region of the carrier board and at least some of the ... | 05/23/2006 |
| 7026708 | Low profile chip scale stacking system and method The present invention stacks chip scale-packaged integrated circuits (CSPs) into low profile modules that conserve PWB or other board surface area. Low profile contacts are created by any of a variety of methods and materials. A consolidated low profile contact stru... | 04/11/2006 |
| 7008824 | Method of fabricating mounted multiple semiconductor dies in a package A semiconductor device includes multiple dies, in which a first die and a second die are mounted on a leadframe. The bond pads on the first and second dies are wirebonded to the leadframe. The first die, second die, and leadframe are encapsulated in a package. ... | 03/07/2006 |
| 6956284 | Integrated circuit stacking system and method The present invention stacks integrated circuits (ICs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules... | 10/18/2005 |
| 6940729 | Integrated circuit stacking system and method The present invention stacks packaged integrated circuits into modules that conserve PWB or other board surface area. The invention provides techniques and structures for aggregating chip scale-packaged integrated circuits (CSPs) or leaded packages with other CSPs o... | 09/06/2005 |
| 6919626 | High density integrated circuit module The present invention provides a method and apparatus for fabricating densely stacked ball-grid-array packages into a three-dimensional multi-package array. Integrated circuit packages are stacked on one another to form a module. Lead carriers provide an external po... | 07/19/2005 |
| 6914324 | Memory expansion and chip scale stacking system and method The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with th... | 07/05/2005 |