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Class 148/33.1 - With contiguous layer doped to degeneracy


Subclass of Class 148 - Metal treatment
Definition: Stock which has two contiguous layers of semiconductive
No. of patents: 68
Last issue date: 05/19/2009


1    
NumberTitleIssue Date
7534310Single crystal GaN substrate, method of growing single crystal GaN and method of producing single crystal GaN substrate
A low dislocation density GaN single crystal substrate is made by forming a seed mask having parallel stripes regularly and periodically aligning on an undersubstrate, growing a GaN crystal on a facet-growth condition, forming repetitions of parallel facet hills and...
05/19/2009
7338883Process for transferring a layer of strained semiconductor material
The invention relates to a process for producing an electronic structure that includes a thin layer of strained semiconductor material from a donor wafer. The donor wafer has a lattice parameter matching layer that includes an upper layer of a semiconductor material...
03/04/2008
7315050Semiconductor device, semiconductor layer and production method thereof
A semiconductor device is prepared by the use of a vapor phase method and is provided with a semiconductor layer composed of boron phosphide (BP) having a band gap at room temperature of not less than 2.8 eV and not more than 3.4 eV or a boron phosphide (BP)-base mi...
01/01/2008
7301180Structure and method for a high-speed semiconductor device having a Ge channel layer
The invention provides semiconductor structure comprising a strained Ge channel layer, and a gate dielectric disposed over the strained Ge channel layer. In one aspect of the invention, a strained Ge channel MOSFET is provided. The strained Ge channel MOSFET include...
11/27/2007
7250359Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization
A semiconductor structure including a semiconductor substrate, at least one first crystalline epitaxial layer on the substrate, the first layer having a surface which is planarized, and at least one second crystalline epitaxial layer on the at least one first layer....
07/31/2007
7250358Wafer for preventing the formation of silicon nodules and method for preventing the formation of silicon nodules
The present invention is directed to a wafer device method for processing same. A wafer for epitaxial deposition is backside sealed with a dopant seal layer (protection layer comprised of silicon dioxide or silicon nitride. Then, a layer of polysilicon is formed coe...
07/31/2007
7235819Semiconductor device having group III nitride buffer layer and growth layers
An epitaxial growth system comprises a housing around an epitaxial growth chamber. A substrate support is located within the growth chamber. A gallium source introduces gallium into the growth chamber and directs the gallium towards the substrate. An activated nitro...
06/26/2007
7232743Semiconductor structure for providing strained crystalline layer on insulator and method for fabricating same
A method for fabricating a semiconductor structure having a high-strained crystalline layer with a low crystal defect density is disclosed. The structure includes a substrate having a first material comprising germanium or a Group(III)-Group(V)-semiconductor or allo...
06/19/2007
7232737Treatment of a removed layer of silicon-germanium
A method of forming a structure that includes a removed layer taken from a donor wafer donor wafer that includes a first layer of Si1-xGex and a second layer of Si1-yGey. The method includes implanting atomic species into ...
06/19/2007
7226504Method to form thick relaxed SiGe layer with trench structure
A method of forming a SiGe layer having a relatively high germanium content and a relatively low threading dislocation density includes preparing a silicon substrate; depositing a layer of SiGe to a thickness of between about 100 nm to 500 nm, wherein the germanium ...
06/05/2007
7217978SRAM memories and microprocessors having logic portions implemented in high-performance silicon substrates and SRAM array portions having field effect transistors with linked bodies and method for making same
The present invention generally concerns fabrication methods and device architectures for use in memory circuits, and more particularly concerns hybrid silicon-on-insulator (SOI) and bulk architectures for use in memory circuits. Once aspect of the invention concern...
05/15/2007
7195987Methods of forming CMOS integrated circuit devices and substrates having buried silicon germanium layers therein
CMOS integrated circuit devices include an electrically insulating layer and an unstrained silicon active layer on the electrically insulating layer. An insulated gate electrode is also provided on a surface of the unstrained silicon active layer. A Si1-x...
03/27/2007
7192482Seed and seedholder combinations for high quality growth of large silicon carbide single crystals
A silicon carbide seeded sublimation growth system and associated method are disclosed. The system includes a crucible, a silicon carbide source composition in the crucible, a seed holder in the crucible, a silicon carbide seed crystal on the seed holder, means for ...
03/20/2007
7183611SRAM constructions, and electronic systems comprising SRAM constructions
The invention includes SRAM constructions comprising at least one transistor device having an active region extending into a crystalline layer comprising Si/Ge. A majority of the active region within the crystalline layer is within a single crystal of the crystallin...
02/27/2007
7132375Method of manufacturing a semiconductor device by crystallization of a semiconductor region by use of a continuous wave laser beam through the substrate
A technique is provided for forming a crystalline semiconductor film whose orientation is uniform by control of crystal orientation and obtaining a crystalline semiconductor film in which concentration of an impurity is reduced. A configuration of the invention is t...
11/07/2006
7112860Integrated nitride-based acoustic wave devices and methods of fabricating integrated nitride-based acoustic wave devices
A monolithic electronic device includes a substrate, a semi-insulating, piezoelectric Group III-nitride epitaxial layer formed on the substrate, a pair of input and output interdigital transducers forming a surface acoustic wave device on the epitaxial layer and at ...
09/26/2006
7097718Single crystal silicon wafer having an epitaxial layer substantially free from grown-in defects
Epitaxial wafers comprising a single crystal silicon substrate comprising agglomerated vacancy defects and having an axially symmetric region in which silicon self-interstitials are the predominant intrinsic point defect and which is substantially free of agglomerat...
08/29/2006
7088757Use of spiro compounds as laser dyes
Use of spiro compounds of formula (I), where K1 and K2 are, independently of one another, conjugated systems, as a laser dye. ...
08/08/2006
7064073Technique for reducing contaminants in fabrication of semiconductor wafers
According to one embodiment, a method for reducing contaminants in a reactor chamber is disclosed where the method comprises a step of etching the reactor chamber, which can comprise, for example, a dry etch process performed with hydrogen and HCL. Next, the reactor...
06/20/2006
7049198Semiconductor device and method for fabricating the same
An S1-yGey layer (where 0
05/23/2006
7034330Group-III nitride semiconductor device, production method thereof and light-emitting diode
A Group-III nitride semiconductor device including a crystal substrate, an electrically conducting Group-III nitride semiconductor (AlXGaYIn1−(X+Y)N: 0≦X
04/25/2006
7018909Forming structures that include a relaxed or pseudo-relaxed layer on a substrate
The invention relates to methods of forming a relaxed or pseudo-relaxed layer on a substrate, wherein the relaxed layer may be a semiconductor material. An implementation of the method includes growing an elastically stressed semiconductor material layer on a donor ...
03/28/2006
7019326Transistor with strain-inducing structure in channel
Various methods for forming a layer of strained silicon in a channel region of a device and devices constructed according to the disclosed methods. In one embodiment, a strain-inducing layer is formed, a relaxed layer is formed on the strain-inducing layer, a portio...
03/28/2006
7018910Transfer of a thin layer from a wafer comprising a buffer layer
A process for producing a structure of a thin layer of semiconductor material obtained from a composite structure donor wafer. The donor wafer includes a lattice parameter matching layer of a matching substrate that advantageously has an upper layer of semiconductor...
03/28/2006
6995427Semiconductor structure for providing strained crystalline layer on insulator and method for fabricating same
A semiconductor structure having a high-strained crystalline layer with a low crystal defect density and a method for fabricating such a semiconductor structure are disclosed. The structure includes a substrate having a first material comprising germanium or a Group...
02/07/2006
6969875Buried channel strained silicon FET using a supply layer created through ion implantation
A buried channel FET including a substrate, a relaxed SiGe layer, a channel layer, a SiGe cap layer, and an ion implanted dopant supply. The ion implanted dopant supply can be in either the SiGe cap layer or the relaxed SiGe layer. In one embodiment the FET is a MOS...
11/29/2005
6953703Method of making a semiconductor device with exposure of sapphire substrate to activated nitrogen
An epitaxial growth system comprises a housing around an epitaxial growth chamber. A substrate support is located within the growth chamber. A gallium source introduces gallium into the growth chamber and directs the gallium towards the substrate. An activated nitro...
10/11/2005
6953736Process for transferring a layer of strained semiconductor material
The invention relates to a process for producing an electronic structure that includes a thin layer of strained semiconductor material from a donor wafer. The donor wafer has a lattice parameter matching layer that includes an upper layer of a semiconductor material...
10/11/2005
6936357Bulk GaN and ALGaN single crystals
Bulk GaN and AlGaN single crystal boules, preferably fabricated using a modified HVPE process, are provided. The single crystal boules typically have a volume in excess of 4 cubic centimeters with a minimum dimension of approximately 1 centimeter. If desired, the bu...
08/30/2005
6936103Low indium content quantum well structures
A method of suppression of Indium carry-over in the MOCVD growth of thin InGaAsP quantum wells, with low Indium content, on top of thick GaInAsP, with high Indium content. These quantum wells are essential in the stimulated emission of 808 to 880 nm phosphorous-base...
08/30/2005
6933518RF circuits including transistors having strained material layers
Circuits for processing radio frequency (“RF”) and microwave signals are fabricated using field effect transistors (“FETs”) that have one or more strained channel layers disposed on one or more planarized substrate layers. FETs having such a configuration ex...
08/23/2005
6917096Semiconductor device and method of manufacturing substrate
A semiconductor device comprises a base substrate, a silicon oxide layer formed on the base substrate, a first semiconductor layer formed on the silicon oxide layer, the first semiconductor layer including an SiGe layer with a Ge concentration not less than 30 atomi...
07/12/2005
6914301CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same
CMOS integrated circuit devices include an electrically insulating layer and an unstrained silicon active layer on the electrically insulating layer. An insulated gate electrode is also provided on a surface of the unstrained silicon active layer. A Si1-x...
07/05/2005
6596095Epitaxial silicon wafer free from autodoping and backside halo and a method and apparatus for the preparation thereof
A single crystal silicon wafer with a back surface free of an oxide seal and substantially free of a chemical vapor deposition process induced halo and an epitaxial silicon layer on the front surface, the epitaxial layer is characterized by an axially sym...
07/22/2003
6565649Epitaxial wafer substantially free of grown-in defects
The present invention is directed to an epitaxial wafer comprising a single crystal silicon substrate having an axially symmetric region in which silicon self-interstitials are the predominant intrinsic point defect and which is substantially free of aggl...
05/20/2003
6521041Etch stop layer system
A SiGe monocrystalline etch-stop material system on a monocrystalline silicon substrate. The etch-stop material system can vary in exact composition, but is a doped or undoped Si1-x Gex alloy with x generally between 0.2 and 0.5. Acr...
02/18/2003
6379472Group III-nitride thin films grown using MBE and bismuth
The present invention comprises growing gallium nitride films in the presence of bismuth using MBE at temperatures of about 1000 K or less. The present invention further comprises the gallium nitride films fabricated using the inventive fabrication method...
04/30/2002
6284039Epitaxial silicon wafers substantially free of grown-in defects
The present invention is directed to a set of epitaxial silicon wafers assembled in a wafer cassette, boat or other wafer carrier. Each wafer comprises a single crystal silicon substrate having an axially symmetric region in which silicon self-interstitia...
09/04/2001
6193813Utilization of SiH4 soak and purge in deposition processes
A method of processing a substrate, such as a semiconductor wafer, in a vacuum processing chamber includes the steps of depositing a material on a surface of the substrate using a gas mixture, and purging the chamber of residual gases by flowing SiH4...
02/27/2001
6059895Strained Si/SiGe layers on insulator
An SOI substrate and method for forming is described incorporating the steps of forming strained layers of Si and/or SiGe on a first substrate, forming a layer of Si and/or Si O2 over the strained layers, bonding a second substrate h...
05/09/2000
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