Quotables
"It is my heart-warmed and world-embracing Christmas hope and aspiration that all of us, the high, the low, the rich, the poor, the admired, the despised, the loved, the hated, the civilized, the savage (every man and brother of us all throughout the whole earth), may eventually be gathered together in a heaven of everlasting rest and peace and bliss, except the inventor of the telephone. "
Mark Twain ; Christmas greetings, 1890
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| Number | Title | Issue Date |
| 8191054 | Process for handling shared references to private data Methods and apparatus are provided for a linker to resolve references from shared memory to private memory in a multi-core system. ... | 05/29/2012 |
| 8181168 | Memory access assignment for parallel processing architectures A system comprises a plurality of computation units interconnected by an interconnection network. A method for configuring the system comprises forming subsets of instructions corresponding to different portions of a program, the subsets of instructions being relate... | 05/15/2012 |
| 8146066 | Systems and methods for caching compute kernels for an application running on a parallel-processing computer system A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accele... | 03/27/2012 |
| 8136105 | Method to exploit superword-level parallelism using semi-isomorphic packing A computer program product is provided for extracting SIMD parallelism. The computer program product includes instructions for providing a stream of input code comprising basic blocks; identifying pairs of statements that are semi-isomorphic with respect to each oth... | 03/13/2012 |
| 8127283 | Enabling graphical notation for parallel programming In one embodiment, the present invention includes a method for developing of a parallel program by specifying graphical representations for input data objects into a parallel computation code segment, specifying graphical representations for parallel program schemes... | 02/28/2012 |
| 8108847 | Pairing of spills for parallel registers A system can include an analyzer module configured to analyze spill code generated by a register allocator to determine that register spill instructions can be paired, wherein paired register spill instructions relate to corresponding register locations in each of a... | 01/31/2012 |
| 8108846 | Compiling scalar code for a single instruction multiple data (SIMD) execution engine A mechanism is provided for performing scalar operations using a SIMD data parallel execution unit. With the mechanisms of the illustrative embodiments, scalar operations in application code are identified that may be executed using vector operations in a SIMD data ... | 01/31/2012 |
| 8108845 | Parallel programming computing system to dynamically allocate program portions A computing system receives a program created by a technical computing environment, analyzes the program, generates multiple program portions based on the analysis of the program, dynamically allocates the multiple program portions to multiple software units of exec... | 01/31/2012 |
| 8108844 | Systems and methods for dynamically choosing a processing element for a compute kernel A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accele... | 01/31/2012 |
| 8051412 | Global compiler for controlling heterogeneous multiprocessor Performance of a heterogeneous multiprocessor is reduced as much as possible within a short time without any awareness of parallelization matched with a configuration of the heterogeneous multiprocessor. In a heterogeneous multiprocessor system, tasks having paralle... | 11/01/2011 |
| 8046750 | Disco: a simplified distributed computing library Core commands and aggregations of such commands are provided to programmers to enable them to generate programs that can be parallel-processed without requiring the programmer to be aware of parallel-processing techniques. The core commands and aggregations abstract... | 10/25/2011 |
| 8037463 | Computer program functional partitioning system for heterogeneous multi-processing systems The present invention provides for a system for computer program functional partitioning for heterogeneous multi-processing systems. At least one system parameter of a computer system comprising one or more disparate processing nodes is identified. Computer program ... | 10/11/2011 |
| 8037462 | Framework for parallelizing general reduction A method for providing parallel processing capabilities including: performing scalar and array privatization analysis via a compiler; checking whether an assignment statement is reducible; recognizing reduction patterns through a pattern matching algorithm; classify... | 10/11/2011 |
| 8032873 | Computer program code size partitioning system for multiple memory multi-processing systems The present invention provides for a system for computer program code size partitioning for multiple memory multi-processor systems. At least one system parameter of a computer system comprising one or more disparate processing nodes is identified. Computer program ... | 10/04/2011 |
| 8032872 | Supporting applets on a high end platform To execute legacy smart card applications in a next generation smart card environment, a mechanism converts the applications into a format executable by the next generation smart card platforms. For instance, in a Java-based environment, a normalizer tool translates... | 10/04/2011 |
| 8010954 | Parallel programming interface to dynamically allocate program portions A computing device-implemented method includes receiving a program created by a technical computing environment, analyzing the program, generating multiple program portions based on the analysis of the program, dynamically allocating the multiple program portions to... | 08/30/2011 |
| 8010953 | Method for compiling scalar code for a single instruction multiple data (SIMD) execution engine Performing scalar operations using a SIMD data parallel execution unit is provided. With the mechanisms of the illustrative embodiments, scalar operations in application code are identified that may be executed using vector operations in a SIMD data parallel executi... | 08/30/2011 |
| 7996827 | Method for the translation of programs for reconfigurable architectures A method for advantageously translating high-level language codes for data processing using a reconfigurable architecture, memories addressable internally from within said reconfigurable architecture, and memories external to said reconfigurable architecture, may in... | 08/09/2011 |
| 7954095 | Analysis and selection of optimal function implementations in massively parallel computer An apparatus, program product and method optimize the operation of a parallel computer system by, in part, collecting performance data for a set of implementations of a function capable of being executed on the parallel computer system based upon the execution of th... | 05/31/2011 |
| 7941460 | Compilation model for processing hierarchical data in stream systems Provided are techniques for compilation of hierarchical data processing. A data flow diagram including one or more operators, wherein each operator includes at least one of an incoming arc and an outgoing arc, is received. For each operator, for each incoming arc, i... | 05/10/2011 |
| 7882498 | Method, system, and program of a compiler to parallelize source code Provided are a method, system, and program for parallelizing source code with a compiler. Source code including source code statements is received. The source code statements are processed to determine a dependency of the statements. Multiple groups of statements ar... | 02/01/2011 |
| 7856625 | Program conversion device and method A program conversion device for converting a program source is provided. The program conversion device comprises: a section and index acquisition device for acquiring a section code for indicating a section embedded in the program and performance index information e... | 12/21/2010 |
| 7853937 | Object-oriented, parallel language, method of programming and multi-processor computer This invention relates to architecture and synchronization of multi-processor computing hardware. It establishes a new method of programming, process synchronization, and of computer construction, named stress-flow by the inventor, allowing benefits of both opposing... | 12/14/2010 |
| 7844959 | Runtime optimization of distributed execution graph A general purpose high-performance distributed execution engine for coarse-grained data-parallel applications is proposed that allows developers to easily create large-scale distributed applications without requiring them to master concurrency techniques beyond bein... | 11/30/2010 |
| 7840949 | System and method for data transformation using dataflow graphs A system and method for managing data, such as in a data warehousing, analysis, or similar applications, where dataflow graphs are expressed as reusable map components, at least some of which are selected from a library of components, and map components are assemble... | 11/23/2010 |
| 7831640 | Using an overflow list to process mark overflow Mark stack overflow list. A method may be practiced in a computing environment including application code that implements garbage collection functionality. The garbage collection functionality includes pushing object references onto a mark stack, such that objects r... | 11/09/2010 |
| 7810084 | Parallel generating of bundles of data objects Computer-implemented methods, computer systems and computer program products are provided for parallel processing a plurality of data objects with a plurality of processors. As disclosed herein, the data objects to be assembled for further processing may be in bundl... | 10/05/2010 |
| 7810083 | Mechanism to emulate user-level multithreading on an OS-sequestered sequencer Method, apparatus and system embodiments to provide user-level creation, control and synchronization of OS-invisible “shreds” of execution via an abstraction layer for a system that includes one or more sequencers that are sequestered from operating system contr... | 10/05/2010 |
| 7805413 | Array compression method A program stored in a storage device is read. Partial compression, in the element in an array in a loop nest in the program, is performed by replacing an element local only in the loop nest in the entire program with a scalar variable. Access to an original array is... | 09/28/2010 |
| 7793276 | Apparatus and method for automatically parallelizing network applications through pipelining transformation In some embodiments, a method and apparatus for automatically parallelizing a sequential network application through pipeline transformation are described. In one embodiment, the method includes the configuration of a network processor into a D-stage processor pipel... | 09/07/2010 |
| 7765532 | Inducing concurrency in software code An Induced Multi-threading (IMT) framework may be configured to induce multi-threaded execution in software code. In one embodiment, the IMT framework may include a concurrent code generator configured to receive marked code having one or more blocks of code marked ... | 07/27/2010 |
| 7721273 | Controller equipment model systems and methods The present invention relates to a system and methodology facilitating automated manufacturing processes in an industrial controller environment. An automation system is provided for automated industrial processing. The system includes an equipment phase object that... | 05/18/2010 |
| 7712090 | Parallel compiling with a serial scheduler Methods and apparatus, including computer program products, for generating an executable program, including receiving serial compile commands in a pseudo-compiler to compile source code modules, scheduling the serial compiler commands in parallel compilers to compil... | 05/04/2010 |
| 7694289 | Method for embedding object codes in source codes Methods for embedding codes executable in a first system having a first microprocessor into codes executable in a second system having a second microprocessor are described herein. In one aspect of the invention, an exemplary method includes providing first codes ha... | 04/06/2010 |
| 7689977 | Open multi-processing reduction implementation in cell broadband engine (CBE) single source compiler The present disclosure is directed to a method for providing an OpenMP reduction implementation. The method may comprise creating an aggregate of at least one reduction variable in a parallel region or a work-sharing construct; defining a pointer variable, the point... | 03/30/2010 |
| 7673294 | Mechanism for pipelining loops with irregular loop control This invention modifies an irregular software pipelined loop conditioned upon data in a condition register in a compiler scheduled very long instruction word data processor to prevent over-execution upon loop exit. The method replaces a register modifying instructio... | 03/02/2010 |
| 7657880 | Safe store for speculative helper threads The latencies associated with retrieving instruction information for a main thread are decreased through the use of a simultaneous helper thread. The helper thread is permitted to execute Store instructions. Store blocker logic operates to prevent data associated wi... | 02/02/2010 |
| 7620945 | Parallelization scheme for generic reduction One embodiment of the present invention provides a system that supports parallelized generic reduction operations in a parallel programming language, wherein a reduction operation is an associative operation that can be divided into a group of sub-operations that ca... | 11/17/2009 |
| 7559056 | Object-oriented component and framework architecture for signal processing A reconfigurable distributed signal processing system uses an object-oriented component-framework architecture in which the system permits large-scale software reuse. This is accomplished by the use of a framework and a number of reusable, reconfigurable software co... | 07/07/2009 |
| 7549145 | Processor dedicated code handling in a multi-processor environment Code handling, such as interpreting language instructions or performing “just-in-time” compilation, uses a heterogeneous processing environment that shares a common memory. In a heterogeneous processing environment that includes a plurality of processors, one of... | 06/16/2009 |
