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| Number | Title | Issue Date |
| 7904842 | Modifying a logic implementation by swapping inputs of fanout-free cones An implementation of a logic description is improved. The implementation has two signals coupled to two inputs of a fanout-free cone. A swap function is determined of the inputs of the fanout-free cone. The swap function indicates whether there is a difference at an... | 03/08/2011 |
| 7904841 | Method and system for optimizing digital filters A method and system is described for optimizing a digital filter defined by coefficients that are multiplied by input data and accumulated to generate output data. A factorization set of candidate factors is compiled based on the coefficients. For each of the candid... | 03/08/2011 |
| 7890896 | Method and apparatus for distinguishing combinational designs Ordinary minterm counting (OMC) and weighted minterm counting (WMC) are applied as combinational design discriminators to a pair of combinational designs D1 and D2. OMC assigns the same weight to each minterm, while WMC assigns a weight that can vary. ... | 02/15/2011 |
| 7882463 | Integrated circuit selective scaling The invention includes a solution for selectively scaling an integrated circuit (IC) design by: layer, region or cell, or a combination of these. The selective scaling technique can be applied in a feedback loop with the manufacturing system with process and yield f... | 02/01/2011 |
| 7882462 | Hardware definition language generation for frame-based processing An automatic code generation application is used to automatically generate code and build programs from a textual model or graphical model for implementation on the computational platform based on the design. One or more model elements may be capable of frame-based ... | 02/01/2011 |
| 7870516 | Asynchronous, multi-rail, asymmetric-phase, static digital logic with completion detection and method for designing the same A method of converting a Boolean logic circuit into an asynchronous multi-rail circuit is provided. A Boolean logic circuit is converted into a first multi-rail circuit using at least Shannon's expansion. The first multi-rail circuit is technology mapped into a seco... | 01/11/2011 |
| 7849424 | Systems, devices, and methods for controlling electrical and optical properties of transparent conductors Systems, devices, and methods for designing and/or manufacturing transparent conductors. A system is operable to evaluate optical and electrical manufacturing criteria for a transparent conductor. The system includes a database including stored reference transparent... | 12/07/2010 |
| 7836414 | Formally proving the functional equivalence of pipelined designs containing memories One embodiment of the present invention provides a system that formally proves the functional equivalence of pipelined designs. First, the system receives a specification for a first pipelined design, which includes a first memory system, and a specification for a s... | 11/16/2010 |
| 7836413 | Building binary decision diagrams efficiently in a structural network representation of a digital circuit A method, system and computer program product for building decision diagrams efficiently in a structural network representation of a digital circuit using a dynamic resource constrained and interleaved depth-first-search and modified breadth-first-search schedule is... | 11/16/2010 |
| 7831938 | Interactive interface resource allocation in a behavioral synthesis tool A behavioral synthesis tool that allows a designer to design an integrated circuit using a generic programming language, such as ANSI C or C++, without the need to include timing information into the source code. In one aspect, the source code is read into the behav... | 11/09/2010 |
| 7823094 | Pseudo-string based pattern recognition in L3GO designs A system and method for processing glyph-based data associated with generating very large scale integrated circuit (VLSI) designs. A system is provide that includes a serialization system for converting an input region of glyph design data into a pseudo-string; and ... | 10/26/2010 |
| 7818695 | Redistribution of current demand and reduction of power and DCAP A method to redistribute current demand is presented. The method includes a first step of determining timing arc data for one or more timing arcs of a circuit design. The method includes a second step of checking the timing arc data for delay shift target cells. The... | 10/19/2010 |
| 7810055 | Design independent correlation data storage for use with physical design of programmable logic devices A method of managing correlation data for a design implementation process can include identifying correlation data from each of a plurality of design applications. Each of the design applications can generate a circuit description and the correlation data can specif... | 10/05/2010 |
| 7810056 | Method and system for implementing context aware synthesis of assertions A method and system for implementing context aware synthesis of assertions is disclosed. The method and system for assertion synthesis includes converting an assertion formula to sequence implication form using semantic preserving rewrite rules, performing optimizat... | 10/05/2010 |
| 7805689 | Circuit board information acquisition and conversion method, program, and device for the same A circuit information acquisition and conversion device, a method, and a program therefor for acquiring a layer configuration, wire traces and shapes of via holes from circuit board design information; optimizing, before conversion into an analysis model, the output... | 09/28/2010 |
| 7805690 | Method for generating compiler, simulation, synthesis and test suite from a common processor specification A hardware/software design tool converts an electronic design specification and zero or more technology specifications into realization of the electronic design in computer hardware, software and firmware. It compiles design and logic technology specifications into ... | 09/28/2010 |
| 7797647 | Circuit having hardware threading Hardware threading optimizes use of hardware resources in a dynamic workload environment. Unutilized hardware resources are dynamically borrowed to increase throughput performance and/or power savings by enabling parallel processing of application pipeline stages. | 09/14/2010 |
| 7783997 | Large scale finite state machines Large-scale finite state machines. An implementation is a method of splitting FSMs in which a dataflow graph is accessed that represents an expression. A cost analysis of computing sub-expressions of the expression corresponding to subsets of the dataflow graph is p... | 08/24/2010 |
| 7765498 | Methods of incorporating process-induced layout dimension changes into an integrated circuit simulation netlist Computer-implemented methods of generating netlists for use in post-layout simulation procedures. A lookup table includes a predetermined set of features (e.g., transistors of specified sizes and shapes) supported by an integrated circuit (IC) fabrication process, w... | 07/27/2010 |
| 7761820 | Automated migration of analog and mixed-signal VLSI design A method for migrating an electronic circuit from a source technology to a target technology includes accepting a source circuit that operates in the source technology. The source circuit includes source components interconnected at nodes in accordance with a source... | 07/20/2010 |
| 7739628 | Synchronous to asynchronous logic conversion Apparatus, systems, and methods may operate to generate a synchronous netlist from a synchronous circuit design representation, automatically substitute asynchronous components taken from an asynchronous standard cell component library for corresponding standard cel... | 06/15/2010 |
| 7730433 | Analog design retargeting An analog retargeting system and method are disclosed for converting a circuit from a source technology to a target technology. Thus, an analog circuit in a source technology can be converted to another technology while maintaining substantially the same circuit beh... | 06/01/2010 |
| 7725846 | Conversion of a three-dimensional wire harness representative to a two-dimensional orthogonal wire harness representative A method and system are described that allow conversion of a three-dimensional representation of a wire harness to a two-dimensional representation. In one aspect, the three-dimensional representation of the wire harness is converted to a two-dimensional orthogonal ... | 05/25/2010 |
| 7698668 | Automatic translation of simulink models into the input language of a model checker A translator converts an input model, such as resulting from a simulation of a design to be verified, into an output model suitable for verification by a model checker. The input model, for example, may be produced using Simulink, and the output model, for example, ... | 04/13/2010 |
| 7689943 | Parametric reduction of sequential design A method, system and computer program product for performing parametric reduction of sequential designs is disclosed. The method comprises receiving an initial design including one or more primary inputs, one or more targets, and one or more state elements. A cut of... | 03/30/2010 |
| 7685541 | Translation of high-level circuit design blocks into hardware description language Translation of high-level design blocks into a design specification in a hardware description language (HDL). Each block in the high-level design is assigned to a group. A set of attributes is identical between the blocks in a group. For each group of blocks, a resp... | 03/23/2010 |
| 7673259 | System and method for synthesis reuse A method of synthesis of multiple implementations of a design is provided comprising: translating a model of the design to a first output model compliant with first constraints; and translating the model of the design to a second output model compliant with second c... | 03/02/2010 |
| 7653886 | Crosslinking of netlists In one embodiment, a method for determining crosslinking between netlists is provided. The first netlist and second netlist may have nets that have different net names but may be the same net. It is also possible that the content of individual nets in one list may n... | 01/26/2010 |
| 7610567 | Systems and methods for performing automated conversion of representations of synchronous circuit designs to and from representations of asynchronous circuit designs Methods and systems automate an approach to provide a way to convert a circuit design from a synchronous representation to an asynchronous representation without any designer or user interaction or redesign of the synchronous circuit. An optimized, automated, non-In... | 10/27/2009 |
| 7596770 | Temporal decomposition for design and verification Behavior of a finite state machine is represented by unfolding a transition relation that represents combinational logic behavior of the finite state machine into a sequence of transition relations representing combinational logic behavior of the finite state machin... | 09/29/2009 |
| 7594204 | Method and apparatus for performing layout-driven optimizations on field programmable gate arrays A method for designing a system on a target device utilizing field programmable gate arrays (FPGAs) includes identifying a group of components associated with a critical signal in the system. A first copy and a second copy of the group of components are generated wh... | 09/22/2009 |
| 7587687 | System and method for incremental synthesis A method of synthesis of a model representing a design is provided comprising: inputting to a synthesis tool information representing a design at a level of abstraction; using a synthesis tool to automatically translate the information representing a design at a lev... | 09/08/2009 |
| 7587688 | User-directed timing-driven synthesis Users or applications provide optimization information that specifies performance-critical portions of the design. Users can identify performance-critical portions of their designs from a priori evaluation of their design or by analyzing the results of previous comp... | 09/08/2009 |
| 7568173 | Independent migration of hierarchical designs with methods of finding and fixing opens during migration Methods of independently migrating a hierarchical design are disclosed. A method for migrating a macro in an integrated circuit comprises: determining an interface strategy between a base cell in the macro and the macro, the base cell including an interface element ... | 07/28/2009 |
| 7565632 | Behavioral synthesizer system, operation synthesizing method and program A behavioral synthesis system which synthesizes behavior without inline expansion of a callee function, even one which has a pointer as an argument during the synthesis of a caller function. There is also a language analyzer that analyzes the behavior level descript... | 07/21/2009 |
| 7565631 | Method and system for translating software binaries and assembly code onto hardware A computer-aided hardware design system enables design of an actual hardware implementation for a digital circuit using a software implementation of an algorithm in assembly language or machine binary code by converting an algorithmic representation for a hardware d... | 07/21/2009 |
| 7552405 | Methods of implementing embedded processor systems including state machines Methods of implementing state machines using embedded processors. The designer specifies the logical footprint of the state machine in a formalism that can be transformed into hardware. This approach decouples the designer from the design, so that a state machine ca... | 06/23/2009 |
| 7546561 | System and method of state point correspondence with constrained function determination A system and method for determining scan chain correspondence including defining a reference scan chain having reference latches and a reference constraint, each of the reference latches having a reference latch logic cone, the reference constraint having a referenc... | 06/09/2009 |
| 7543253 | Method and apparatus for compensating for temperature drift in semiconductor processes and circuitry The present invention provides a method and apparatus for compensating for temperature effects in the operation of semiconductor processes circuitry, such as reference circuits. The method operates on the realization that the second order effects such as “curvatur... | 06/02/2009 |
| 7539955 | System and method for reformatting a motherboard design file A method for reformatting a motherboard design file includes the steps of: converting the motherboard design file from a first format to a second format, and generating a converted temp file based on the motherboard design file; selecting information classes of the ... | 05/26/2009 |
