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| Number | Title | Issue Date |
| 5251159 | Circuit simulation interface methods In a process for analyzing simulation results and providing such results in terms that are familiar to the circuit designer, user-defined primitives, or tiles, are used to reduce large quantities of simulation data into meaningful information. Incremental... | 10/05/1993 |
| 5225991 | Optimized automated macro embedding for standard cell blocks A standard cell macro embedding method that extends the capability of conventional circuit placement routines by enabling them to automatically and optimally embed macro blocks within standard cell blocks. The macro blocks can be selected portions of the ... | 07/06/1993 |
| 5218557 | Expert system for assisting in the design of a complex system A new system design tool receives a design representation from a designer, simulates it and compares the simulated operation of the design representation with the desired operation as provided by the operator and identifies causes of discrepancies therebe... | 06/08/1993 |
| 5210701 | Apparatus and method for designing integrated circuit modules A method and apparatus for generating a multiport static random-access memory (SRAM) in an integrated circuit. The apparatus includes a tape drive for accepting parameters describing a particular technology process and a keyboard for accepting user specif... | 05/11/1993 |
| 5185706 | Programmable gate array with logic cells having configurable output enable A configurable logic array, includes a plurality of configurable logic cells which include a tristate output buffer, having an input receiving a logic signal from within the configurable logic cell, an output connected to the configurable interconnect str... | 02/09/1993 |
| 5164907 | Computer aided design system capable of placing functional blocks with a circuit constraint satisfied A system and method for logic circuit design in which functional blocks are placed on a substantially plane area in compliance with logic connection information under a circuit constraint. Critical nets are first extracted from logic connection informatio... | 11/17/1992 |
| 5139963 | Method and a system for assisting mending of a semiconductor integrated circuit, and a wiring structure and a wiring method suited for mending a semiconductor integrated circuit A method and a system for assisting mending of an LSI after it has been formed into a chip which is necessitated by modification of logic etc. The mending includes corrections by connecting or cutting interconnections of the LSI. The assisting method and ... | 08/18/1992 |
| 5121330 | Method and system for product restructuring A system and method for restructuring a product assembly utilizes a knowledge base of past product designs to identify to an expert, which components within the assembly are candidates for replacement with other components. By reducing the varieties of co... | 06/09/1992 |
| 5109479 | Method of designing three dimensional electrical circuits A computer aided design package is used to create a mathematical representation of a three-dimensional object. This object is defined as a set of surfaces oriented in space. A map of the flattened object is created by concatenating selected ones of the su... | 04/28/1992 |
| 5051936 | Microprocessor-based controller with synchronous reset A microprocessor-based controller with synchronous reset including a processor for processing information having an input receiving an input signal and an output providing an output signal. The input signal conveys information about the process and the ou... | 09/24/1991 |
| 5046016 | Computer aided design for TE01 mode circular waveguide A computer aided design (CAD) method for designing circular overmoded waveguide systems having optimal operating characteristics. The CAD method receives selected input waveguide operational, material and structural parameters and computes the resulting w... | 09/03/1991 |
| 5043920 | Multi-dimension visual analysis An improved technique for processing large amounts of information and displaying that information graphically. The graphic display focuses attention to suspect areas employing colors and shading techniques to quickly focus the user's attention to problem ... | 08/27/1991 |
| 5034899 | Software tool for automatically generating a functional-diagram graphic A software process for automatically generating a functional diagram graphic, which can be used for automatically generating functional diagrams from a control program for a stored-program control system on a graphical display device, particularly a progr... | 07/23/1991 |
| 5027355 | Logic circuit and design method for improved testability A method for designing integrated circuits for improved testability. A main logic function operable in initialization and test modes is defined in terms of component logic macros. Testability circuitry for generating CLEAR, CLEAR0 and CLEAR1 testability s... | 06/25/1991 |
| 4974175 | Drawing information processing method and apparatus An apparatus and method for processing information of a drawing comprises steps of defining figure data representing figures, respectively, included in a drawing, preparing a plurality of regions called as field block memory regions for storing the figure... | 11/27/1990 |
| 4970664 | Critical path analyzer with path context window A screen display includes a path context window for displaying a signal path in its entirety apart from the schematic sheets on which the path portions appear. The window contains multiple display portions each graphically displaying a path portion appear... | 11/13/1990 |
| 4965741 | Method for providing an improved human user interface to a knowledge based system An improved method for interfacing a human user to the combination of an expert system and a computer aided design system, characterized in that the expert system advice is provided in various formats, the expert system provides for interrupted operation ... | 10/23/1990 |
| 4964056 | Automatic design system of logic circuit An automatic design system of a logic circuit system includes a storage for storing information about structures and functions of known basic circuits available for a circuit system to be designed, an input device for receiving design specification inform... | 10/16/1990 |
| 4873647 | Digital waveform analyzer An automated waveform analyzer for designing, on a computer, a logic implementation of an interface circuit connected between a first digital device and one or more other digital devices. The analyzer identifies from the remaining input and output wavefor... | 10/10/1989 |
| 4849928 | Logic array programmer This logic array programmer which comprises a random access memory for storing a library of programmable array logic JEDEC files, including given device codes. The programmer also includes a permanent memory for storing a device code conversion table, for... | 07/18/1989 |
| 4845633 | System for programming graphically a programmable, asynchronous logic cell and array A system for programming an asynchronous logic cell and a two- or three-dimensional array formed of such cells. Each cell comprises a number of exclusive-OR gates, Muller C-elements and programmable switches. The logic cell is reprogrammable and may even ... | 07/04/1989 |
| 4813013 | Schematic diagram generating system using library of general purpose interactively selectable graphic primitives to create special applications icons An interactive rule based system enables problem solutions to be generated in schematic diagram form. A methodology designer selects and arranges graphic primitives using a graphics terminal to create a library of icons. Under control of a computer proces... | 03/14/1989 |
| 4758953 | Method for generating logic circuit data In automatic development of the higher hierarchic logic into the lower hierarchic logic in a hierarchic logic designing, identification codes are beforehand assigned to logic components of the higher hierarchic logic, and the identification codes are also... | 07/19/1988 |
| 4751656 | Method for choosing replacement lines in a two dimensionally redundant array A method of assigning replacement rows and colums in a two dimensionally redundant array in which if the number of failures along a row exceeds the number of remaining redundant columns, then replacing that row with one of the redundant rows. The process ... | 06/14/1988 |
| 4677548 | LSI microprocessor chip with backward pin compatibility and forward expandable functionality A chip implemented in new technology is designed to include expandable levels of new functionality. The chip includes compatibility circuits which connect to a number of pins which are unused in the chip it replaces in an existing computer system. The com... | 06/30/1987 |
| 4656603 | Schematic diagram generating system using library of general purpose interactively selectable graphic primitives to create special applications icons An interactive rule based system enables problem solutions to be generated in schematic diagram form. A methodology designer selects and arranges graphic primitives using a graphics terminal to create a library of icons. Under control of a computer proces... | 04/07/1987 |
| 4641247 | Bit-sliced, dual-bus design of integrated circuits A monolithic integrated circuit chip preferably includes a pair of data busses capable of conducting in parallel the number of signals which can be processed simultaneously by the components on the chip. Signals on the busses are carried in a time-multipl... | 02/03/1987 |
| 4566064 | Combinational logic structure using PASS transistors PASS transistors are used to reduce the layout complexity of logic circuits by using PASS transistors connected to pass a first and second input function to an output node in response to selected CONTROL signals, thereby to generate a selected output func... | 01/21/1986 |
| 4549262 | Chip topography for a MOS disk memory controller circuit An improved chip topography for a disk memory controller circuit is provided which includes electrical interface circuitry disposed around the periphery of the chip and forming an approximately quadrilateral framework surrounding the remainder of the circ... | 10/22/1985 |
| 4503386 | Chip partitioning aid (CPA)-A structure for test pattern generation for large logic networks Disclosed is a design discipline, or approach, in the form of circuitry and a test method, or methodology which obviates the problems of the prior art and allows testing of each individual chip and interchip connections of a plurality of interconnected ch... | 03/05/1985 |
| 4402044 | Microprocessor with strip layout of busses, ALU and registers A single-chip microprocessor device of the MOS/LSI type contains an ALU, several interal busses, a number of address/data registers, and an instruction register with associated control decode or microcontrol generator circuitry. The device communicates wi... | 08/30/1983 |
| 4250556 | Electronic control system for analog circuits An electronic control system for analog circuits has controllable analogue circuits which can be combined with one another by way of an electronic switching network. The digital states of the individual crosspoints of the switching network can be programm... | 02/10/1981 |
| 4190890 | Programmable light director system A dual axis, laser powered light director system for routing wire of electric harnesses includes a laser light source carried on a carriage which is moved longitudinally of a wire harness assembly board. The laser light beam is directed to a rotatable mir... | 02/26/1980 |
