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| Number | Title | Issue Date |
| 8132089 | Error checking at the re-sequencing stage Computer communications that are to be recorded are visible to a network interface on a recording computer. The network interface receives the packets to be recorded. The network layer of the recording computer implements a subset of the normal IP module in the netw... | 03/06/2012 |
| 7849391 | Early detection of false start-of-packet triggers in a wireless network node An apparatus, a carrier medium storing instructions to implement a method, and a method in a node of a wireless network able to receive packets that exactly or substantially conform to a wireless network standard according to which each packet includes a header havi... | 12/07/2010 |
| 7840887 | Data stream processing method and system A method and system for decoding a received data stream are disclosed. The appropriate time interval to decode the received data stream is derived from the data stream itself. A header of the data stream is analyzed to determine two sets of time ranges, each set of ... | 11/23/2010 |
| 7600181 | Circuit to reduce rail noise voltage spikes due to switching on an input-output bus A circuit to reduce noise spikes on the power and ground rails of a chip when switching over an input-output bus, the circuit comprising an encoder to encode a word before transmission over the input-output bus so that the difference in the number of 1 bits and the ... | 10/06/2009 |
| 7559011 | Circuit having a programmable circuit and method of validating a bitstream loaded into a programmable device A method of validating a bitstream loaded into a circuit having a programmable circuit is disclosed. According to one embodiment, the method comprises steps of loading a configuration bitstream comprising an error detection command at an input of the circuit; decodi... | 07/07/2009 |
| 7444565 | Re-programmable COMSEC module A method of mitigating logic upsets includes providing an input to each of a plurality of programmable logic components, processing the input in each programmable logic component, determining an output from each programmable logic component, providing the output fro... | 10/28/2008 |
| 7415661 | Early detection of false start-of-packet triggers in a wireless network node An apparatus, a carrier medium storing instructions to implement a method, and a method in a node of a wireless network able to receive packets that exactly or substantially conform to a wireless network standard according to which each packet includes a header havi... | 08/19/2008 |
| 7385929 | Method and system for detecting false packets in wireless communications systems Specific bits of an incoming transmission are compared against a predetermined bit pattern. If the selected bits do not match the predetermined bit pattern, then the incoming transmission is rejected as a false packet. The predetermined bit pattern can include legal... | 06/10/2008 |
| 7313104 | Wireless computer system with latency masking A wireless computer system (30) is formed to have a host section (31) and a wireless hardware section (40). A first portion of a transmission frame is formed in system memory (36) of a host section (31) and a second portion of the ... | 12/25/2007 |
| 7277840 | Method for detecting bus contention from RTL description A method for efficiently detecting bus contention from a register transfer level (RTL) description is provided. A bus contention occurs if more than two components try to propagate data onto a bus at the same time. The provided method simulates possible input combin... | 10/02/2007 |
| 7269176 | Communications arrangement In a communications system, especially an SDH DCN system in which most network elements (NEs) function as intermediate systems (ISs) rather than end systems (ESs), it is made possible to reduce the constraints on the DCN topology posed by the IS-IS routing protocol ... | 09/11/2007 |
| 7249106 | Information processing method and apparatus and program storage medium for prohibiting duplication of contents in large quantities A contents database 114 memorizes the discriminating information for discriminating contents and the temporal information as to the time of content duplication associated with the discriminating information. A recording program 113 acquires the discrim... | 07/24/2007 |
| 7222290 | Method and apparatus for receiver detection on a PCI-Express bus A method and apparatus are provided for detecting a receiver over a PCI-Express bus. A receiver is detected on a PCI-Express link by adjusting a common mode voltage using a current injected into one or more transmitter output nodes and detecting whether a receiver i... | 05/22/2007 |
| 7197689 | Trellis-based receiver Receivers (1) for receiving encoded block signals and comprising processor systems (2) decode block signals by using Viterbi algorithms for finding a first candidate/path in a trellis (18) and by generating cost signals for finding further candi... | 03/27/2007 |
| 7171161 | System and method for classifying signals using timing templates, power templates and other techniques A system and method for classifying signals occurring in a frequency band. One or more characteristics of one or more signals in the frequency band are detected using any suitable technology, such as a device that can generate characteristics of signal pulses detect... | 01/30/2007 |
| 7170394 | Remote current sensing and communication over single pair of power feed wires Disclosed is a novel technique for transferring power and signals between two electrical devices over a single wire pair. In particular, a remote sensor is connected to a host device. Power to the remote sensor is supplied through a voltage reference and control loo... | 01/30/2007 |
| 7124410 | Distributed allocation of system hardware resources for multiprocessor systems A method is provided for allocating system resources across multiple nodes of a system communicating through a hardware device. The method provides for allocation of transaction units or identifiers in an allocating component for use in a multiple target component w... | 10/17/2006 |
| 7116092 | Integrated spectrum analyzer circuits and methods for providing on-chip diagnostics Spectrum analyzer circuits and methods are provided which implement “zero-IF” (direct conversion) or “near-zero IF” (or very low IF) architectures that enable implementation of integrated (on-chip) spectrum analyzers for measuring the frequency spectrum of i... | 10/03/2006 |
| 7064706 | Method and apparatus for assisted GPS A cellular network protocol that maintains the reliability of assisted GPS based positioning is taught. An Integrity Monitor (IM) informs mobile stations, their users, or networks of measurement quality and it warns them of failing and failed GPS satellites by isola... | 06/20/2006 |
| 7062703 | Early detection of false start-of-packet triggers in a wireless network node An apparatus, a carrier medium storing instructions to implement a method, and a method in a node of a wireless network able to receive packets that exactly or substantially conform to a wireless network standard according to which each packet includes a header havi... | 06/13/2006 |
| 7054361 | Method and apparatus for enhancing an infrared signal protocol An apparatus and method for providing control signals, comprising a processor coupled to a memory, for generating a signal sequence. The processor encodes the signal sequence into a plurality of symbols using a 5 pulse position modulated (5 PPM) scheme. Advantageous... | 05/30/2006 |
| 7043495 | Techniques for JEDEC file information integrity and preservation of device programming specifications A method of generating a file suitable for programming a programmable logic device. The method generally comprises the steps of (A) generating a programming item from a plurality of parameters that define a program for the programmable logic device, (B) storing the ... | 05/09/2006 |
| 7043533 | Method and apparatus for arbitrating master-slave transactions The present invention provides a method and apparatus for arbitrating master-slave transactions. The apparatus includes a slave device adapted to receive a first request from a first master device. The apparatus further includes a record of one or more previous requ... | 05/09/2006 |
| 7035593 | Signal classification methods for scanning receiver and other applications Signal classification techniques for classifying signals occurring in a frequency band using a plurality of classifier procedures each dedicated to identify a particular signal or signal type. The classification procedures operate on spectrum activity data that may ... | 04/25/2006 |
| 7036069 | Method and entity of packet loss distinction The present invention provides a method and apparatus for distinguishing between congestion and corruption losses during the transmission of data packets. The packet lost distinction is based on the evaluation of an error detection/correction code of each data packe... | 04/25/2006 |
| 7031257 | Radio link protocol (RLP)/point-to-point protocol (PPP) design that passes corrupted data and error location information among layers in a wireless data transmission protocol A radio link protocol (RLP)/point-to-point protocol (PPP) design is disclosed for wireless multimedia packet networks that passes corrupted packet data and error location information among OSI layers. The RLP layer provides erasure data frames and optionally error l... | 04/18/2006 |
| 7026913 | Methods and apparatus for self-diagnosing electronic price labels A self-diagnosing electronic price label. The label communicates with a central processor in order to receive price information for display and to report the status of the label to the central processor. The label periodically runs a self-test program to verify prop... | 04/11/2006 |
| 7017096 | Sequential test pattern generation using clock-control design for testability structures Techniques for testing a sequential circuit comprising a plurality of flip-flops or other types of registers. The circuit is first configured such that substantially all feedback loops associated with the registers, other than one or more self-loops each associated ... | 03/21/2006 |
| 7013422 | Noise removal in multibyte text encodings using statistical models Disclosed is a method of validating a byte sequence having a plurality of states, the method comprising designating one or more noise states from among the plurality of states; generating a most probable state sequence for the byte sequence; utilizing said state seq... | 03/14/2006 |
| 6980703 | Information storage apparatus and article of manufacture An information storage apparatus comprises a storage device which stores digital data, an input device which sets a compression ratio of the stored data, and a writing device which writes the set compression ratio as additional data for the stored digital data to th... | 12/27/2005 |
| 6977980 | Timing synchronization methods and systems for transmit parallel interfaces Transmit parallel interfaces and methods are provided in which a clock signal is generated that maximizes the setup and hold window of input data. In at least some embodiments, a divider circuit provides a clock signal in one clock domain that has a rising edge loca... | 12/20/2005 |
| 6968492 | Hardware-efficient CRC generator for high speed communication networks A cyclic redundancy check (CRC) generator, in accordance with a specific embodiment of the present invention, generates a 32-bit CRC for each packet whose data bytes are carried over a 128-bit bus by first dividing the data bytes by a 123nd degree generat... | 11/22/2005 |
| 6966025 | D/A conversion apparatus, decoder, and tape drive A D/A converter has a serial interface. Of the sets of the data representing multiple control signals output from latch circuits, the data representing input data, the data representing strobe signal, and the data representing clock signal are supplied to the D/A co... | 11/15/2005 |
| 6941500 | Method for implementing a modified radio link protocol A method of performing a modified RLP that reduces the transmission delay in a communications system by detecting frame erasures when they occur. The modified RLP method requests retransmission of erased frames based on pattern violations instead of sequence number ... | 09/06/2005 |
| 6924901 | Communication system, image forming apparatus, initialization method, trouble compensation method and storage medium There is provided a communication system which is capable of resetting sub-communication ICs without providing special reset signal lines for transmitting a reset signal and also capable of properly transmitting a communication reset signal to the sub-communication ... | 08/02/2005 |
| 6918070 | Network performance monitoring and restoration based on transmission code violations A network element (NE) in a communications network decodes a data stream received over a communication link. Upon synchronization with the data stream, the NE determines a performance metric for the link based on a number of transmission code violations. In response... | 07/12/2005 |
| 6904502 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors The present invention relates to the design of highly reliable high performance microprocessors, and more specifically to designs using a blind invalidate circuit in high-speed memories. In accordance with an embodiment of the present invention, a tag array memory c... | 06/07/2005 |
| 6883134 | Method and program product for detecting bus conflict and floating bus conditions in circuit designs A method and program product for verifying a logic design for proper operation of tri-state buses in the design, comprises, for each bus in the circuit design, determining the smallest cut set, a min-cut, of the logic controlling the bus, performing an exhaustive an... | 04/19/2005 |
| 6766485 | Integrated circuit fault tester, integrated circuit fault test method and recording medium recorded with fault test control program A unit test signal having duration T is repeatedly supplied from an LSI tester to an IC under test and, simultaneously, a power source current is supplied from the LSI tester through a current detection unit to the IC under test. The power source current is monitore... | 07/20/2004 |
| 6725420 | Pattern detection for computer segments Method and system for compensating for a segment length of one or more of three consecutive mark and space segments utilized in a computer system. The three segments are received at a first pre-processor, the first segment is separated and issued separately from the... | 04/20/2004 |
