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| Number | Title | Issue Date |
| 8190983 | Apparatus and methods for CRC error injection in a storage system Apparatus and methods for Cyclic Redundancy Check (CRC) error injection between storage controllers and storage devices in a storage system. A plurality of bridge devices are configured in a storage system each coupled persistently coupled to a corresponding one of ... | 05/29/2012 |
| 8176405 | Data integrity validation in a computing environment A method for validating data in a data storage system comprising associating a first data chunk with first check data and storing the first data chunk and the first check data on a first storage device. Additional associated data chunks of the first data and associa... | 05/08/2012 |
| 8161365 | Cyclic redundancy check generator A cyclic redundancy check (“CRC”) generator and method therefor are described. Checksum bits and checksum enable bits are bitwise ANDed to provide interim checksum outputs. The interim checksum outputs are XORed to provide resultant checksum outputs. Data bits a... | 04/17/2012 |
| 8161364 | Out of order checksum calculation for fragmented packets A network interface controller comprises a first interface that sequentially receives second and first fragments of a packet comprising second and first data portions of the packet, respectively. A checksum adder calculates a first checksum for the first fragment ba... | 04/17/2012 |
| 8156415 | Method and system for command queuing in disk drives A method and system for command queuing in disk drives may improve performance by queuing multiple commands and sequentially executing them automatically without firmware intervention. The method may use a number of queues, e.g., a staging queue for commands to be e... | 04/10/2012 |
| 8156414 | String reconstruction using multiple strings Disclosed are systems and methods for reconstructing a string comprising characters given multiple strings that may contain one or more errors. In embodiments, pairwise comparisons of strings within a set of candidate strings that may contain errors is performed so ... | 04/10/2012 |
| 8151177 | Methods and arrangements for partial word stores in networking adapters A method and arrangement for the implementation of a simple algorithm to store an N-bit checksum into any unaligned position within a larger NxP-bit word, which avoids the use of a logic-intensive implementation that employs a bank of demultiplexers, or a latency-in... | 04/03/2012 |
| 8132088 | Data formatting in data storage A method of processing data comprising arranging data into a data group comprising a plurality of sub groups each said subgroup comprising a plurality of columns; for each column, determining at least one checksum data of said column; and for each column, storing th... | 03/06/2012 |
| 8117525 | Method for parallel data integrity checking of PCI express devices An apparatus and method for supporting PCI Express is disclosed. A physical layer has a PCI Express interface for receiving data from a PCI Express compatible communication medium. The data is in the form of a packet. A data link layer is disclosed for verifying a C... | 02/14/2012 |
| 8117526 | Apparatus and method for generating a transmit signal and apparatus and method for extracting an original message from a received signal A method for extracting an original message from a received signal including data bits representing the original message or an inverted version thereof, an indicator indicating whether the data bits represent the original message or the inverted version thereof, and... | 02/14/2012 |
| 8103946 | Secure data strategy for vehicle control systems A method of providing secure data from vehicle operational variable data that includes a plurality of data message bits includes the steps of dividing the plurality of data message bits into a first group of data message bits and a second group of data message bits,... | 01/24/2012 |
| 8095862 | End-to-end cyclic redundancy check protection for high integrity fiber transfers A method, transceiver, and computer program storage product transfer data over fiber between a first transceiver and a second transceiver. The second transceiver is determined to support a high integrity cyclic redundancy check associated with substantially an entir... | 01/10/2012 |
| 8095863 | Low complexity decoding of low density parity check codes An improved decoder and decoding method for low density parity check (LDPC) codes is provided. Decoding proceeds by repetitive message passing from a set of variable nodes to a set of check nodes, and from the check nodes back to the variable nodes. The variable nod... | 01/10/2012 |
| 8069402 | Error detection system This disclosure relates to method, device and system for detecting errors in a communication system. A signal is received from a transmitter at a receiver wherein the signal includes a data portion and a result of a hash function. The hash function is computed in pa... | 11/29/2011 |
| 8060812 | Methods, systems, and computer program products for class verification A system for class verification includes a data storage device holding verification caches; and a host system in communication with the data storage device, the host system executing a virtual machine (VM), including a class verifier. The VM is configured to perform... | 11/15/2011 |
| 8060813 | Apparatus and method for generating error detection codes An apparatus for generating error detection codes can include an error detection code generation unit configured to generate virtual error detection codes using virtual DBI information and data, and an error detection code regeneration unit configured to generate er... | 11/15/2011 |
| 8055989 | Boot security using embedded counters The present disclosure provides a system for providing a security and method of providing an enhanced security booting environment. The system and method includes a basic input/output system (BIOS) stored in memory. The system and method also includes a counter embe... | 11/08/2011 |
| 8051367 | Storage sub-system and method for controlling the same The present invention provides means for effectively reducing the amount of data by means of de-duplication in a disk array apparatus having a data guarantee code. A control means for the disk array apparatus that adds a data guarantee code to each logical da... | 11/01/2011 |
| 8042033 | Protection of access information in wireless communications Protection of access information in wireless communications is achieved by transmitting access information related to configuration to a terminal, receiving a result of a countermeasure procedure performed by the terminal, deciding whether the configuration is corre... | 10/18/2011 |
| 8037399 | Techniques for segmented CRC design in high speed networks Embodiments of the present invention provide techniques for efficient generation of CRC values in a network environment. Specific embodiments of the present invention enable CRC processing circuits that can generate CRC values at high data throughput rates (e.g., 10... | 10/11/2011 |
| 8015478 | Data processing A non-transitory computer readable medium includes a computer program, which when executed by a processor performs a method, the method including processing a data message to extract segments of data and computing a checksum by applying gray code conversions to one ... | 09/06/2011 |
| 8006126 | Data integrity validation in storage systems Data validation systems and methods are provided. Data is recorded in N data chunks on one or more storage mediums. A first validation chunk independently associated with said N data chunks comprises first validation information for verifying accuracy of data record... | 08/23/2011 |
| 7992076 | Method and device of rewriting a primary sector of a sector erasable semiconductor memory means In a method of rewriting a primary sector of a sector erasable semiconductor memory device, a bootloader code is copied from the primary sector to a second sector, all content of the first sector is subsequently erased, and the bootloader code is recopied from the s... | 08/02/2011 |
| 7979784 | Method and system for enhancing transmission reliability of video information over wireless channels A method and system for enhancing transmission reliability of video information over a wireless channel is provided. The video information includes pixels, each having a plurality of components and each component including video information bits that are placed in s... | 07/12/2011 |
| 7904796 | Serial data communication—CAN memory error detection methods A method is provided for formatting a message, with a first plurality of bits forming a data component, and a second plurality of bits forming a reserved component, for transmission in a vehicle. The method comprises the steps of calculating an initial checksum from... | 03/08/2011 |
| 7882424 | Serial data communication—CAN memory error detection methods A method is provided for formatting a message, with a first plurality of bits forming a data component, and a second plurality of bits forming a reserved component, for transmission in a vehicle. The method comprises the steps of calculating an initial checksum from... | 02/01/2011 |
| 7856593 | Low complexity decoding of low density parity check codes An improved decoder and decoding method for low density parity check (LDPC) codes is provided. Decoding proceeds by repetitive message passing from a set of variable nodes to a set of check nodes, and from the check nodes back to the variable nodes. The variable nod... | 12/21/2010 |
| 7770097 | Redundant path communication methods and systems The systems and methods described herein provide a redundant communication path. The systems and methods can provide a second source for the same data under many circumstances. These circumstances can include, for example, 1) when data incurs errors during transmiss... | 08/03/2010 |
| 7770096 | Method of operating a matrix checksum A method of operating a matrix checksum includes the steps of determining a column checksum for the data bytes in an information packet. A row checksum for the data bytes in an information packet is determined. The information packet including the column checksum an... | 08/03/2010 |
| 7734994 | RFID decoding subsystem with pre-decode module A radio frequency identification (RFID) decoding subsystem includes a pre-decode module and a decode module. The pre-decode module is coupled to process down-converted RFID signals into at least one of pre-decoded baseband data and corresponding decoding information... | 06/08/2010 |
| 7730387 | Data transmission method and apparatus using multiple scrambling codes A packet including data and a cyclic redundancy check code is encoded by using a selectable one of N scrambling codes (N>1). The encoded packet is transmitted and received, then decoded N times by using the N scrambling codes. The cyclic redundancy check code is use... | 06/01/2010 |
| 7712015 | Apparatus and method for separating corrupted data from non-corrupted data within a packet A method and apparatus for detecting errors and improving quality in real-time data transmissions is provided. In one embodiment, the packet header checksum field is turned off to allow uninterrupted transmission of data packet payloads. A checksum added to each ind... | 05/04/2010 |
| 7702994 | Method of determining a corruption indication of a sequence of encoded data frames The present invention relates to a method of determining a corruption indication of a sequence (100) of encoded data frames distributed over a network, said data frames being encoded according to a predictive block-based encoding technique. Said method compri... | 04/20/2010 |
| 7631251 | Method and apparatus for calculating checksums A method for calculating checksums includes calculating a first checksum based at least in part on a first block of data, and calculating a partial checksum based at least in part on a second block of data. The second block of data comprises a data portion followed ... | 12/08/2009 |
| 7627806 | Integrated hard-wired or partly hard-wired CRC generation and/or checking architecture for a physical coding sublayer in a programmable logic device A programmable logic integrated circuit device (“PLD”) includes high-speed serial interface (“HSSI”) circuitry that is at least partly hard-wired to perform at least some functional aspects of the HSSI operations. Cyclic redundancy check (CRC) generation and... | 12/01/2009 |
| 7624335 | Verifying a file in a system with duplicate segment elimination using segmention-independent checksums Verifying a file in a system with duplicate segment elimination is disclosed. A data file is segmented into a plurality of distinct data segments, and a checksum is computed for each of the plurality of distinct data segments. A constructed data file checksum is con... | 11/24/2009 |
| 7613991 | Method and apparatus for concurrent calculation of cyclic redundancy checks Circuits and methods provide the concurrent calculation of CRC bits for messages from different channels, where one part of a message is received at a time. Context buffers store certain state variables of the CRC calculation for each channel. The context buffers ou... | 11/03/2009 |
| 7590930 | Instructions for performing modulo-2 multiplication and bit reflection A technique to perform carry-less multiplication and bit reflection operations. More specifically, embodiments of the invention include an instruction to perform carry-less multiplication and an instruction to perform a bit reflection operation. ... | 09/15/2009 |
| 7571377 | Method and apparatus for transmitting data in an integrated circuit A method and apparatus for transmitting data packets in an integrated circuit according to a data integrity scheme that embeds an integrity value in each data packet. As the data packets are transferred, the data integrity value for a data packet is stored during a ... | 08/04/2009 |
| 7565602 | Memory error detection device and method for detecting a memory error A memory error detection device for a memory having cells arranged in memory rows and columns, wherein the memory is occupied such that the protection memory row or column has a predetermined reference parity value in a state of integrity, the parity value is chosen... | 07/21/2009 |
