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| Number | Title | Issue Date |
| 8433988 | Method and apparatus for masking signal loss A method and apparatus are capable of masking a signal loss condition. According to an exemplary embodiment, the method includes steps of receiving a signal, detecting a period of loss of the signal, and enabling a received portion of the signal to be reproduced con... | 04/30/2013 |
| 8429513 | Loading secure code into a memory A method of verifying the integrity of code in a programmable memory, the method including: receiving the code from an insecure memory; generating error detection bits for the code as it is received from the insecure memory; storing the code and the error detection ... | 04/23/2013 |
| 8429512 | Reduced complexity LDPC decoder To decode a manifestation of a codeword in which K information bits are encoded as N>K codeword bits, messages are exchanged between N bit nodes and N−K check nodes. During computation, messages are expressed with a full message length greater than two bits. In ea... | 04/23/2013 |
| 8418043 | Error detection A method of error detection for a data packet, the method comprising the steps of: i) identifying a set of non-compliances (N), the non-compliances being illegal bit sequences according to a coding standard; ii) identifying a first subset (N+) of non-compliances tha... | 04/09/2013 |
| 8413035 | Power control apparatus and method for realizing efficient load factor with lower contracted power limit A power control apparatus is provided that includes a calculation unit, a detection unit, a storage unit, a selection unit and an execution unit. The detection unit detects whether a required spare capacity is short, based on the required spare capacity, the spare p... | 04/02/2013 |
| 8413034 | Magnetic data processing device, magnetic data processing method, and magnetic data processing program In a magnetic data processing device, an input part sequentially receives magnetic data output from a magnetic sensor. A storage part stores a plurality of the magnetic data as a data set of statistical population. An index derivation part derives a distribution ind... | 04/02/2013 |
| 8407573 | Method and apparatus for equalization of received signals A receiver for a mobile communication device comprises an primary detector for generating an initial sequence estimate comprising a plurality of initial symbol estimates from a received symbol sequence corrupted by intersymbol interference, and a secondary detector ... | 03/26/2013 |
| 8397151 | Integrity of low bandwidth communications The invention relates to a method for checking the integrity of a set of data packets received by a receiving communication device from a sending communication device, the data packets of the set being received in unpredictable order. The invention also relates to a... | 03/12/2013 |
| 8392811 | Methods and systems for a-priori decoding based on MAP messages A method and apparatus for decoding encoded data bits of a wireless communication transmission are provided. A set of a-priori bit values corresponding to known bit values of the encoded data bits may be generated. Decoding paths that correspond to decoded data bits... | 03/05/2013 |
| 8392812 | Teletext decoder A teletext decoder is provided which is suitable for decoding a packet of teletext signal to generate a teletext. The teletext decoder includes an error judgment device for judging the accuracy of a plurality of sliced bits, and correcting an error occurrence bit in... | 03/05/2013 |
| 8386900 | Controlling point-to-multipoint transmissions of content data over a radio interface The invention relates to error control for point-to-multipoint (PTM) transmissions of content data over a radio interface. A method embodiment for controlling a PTM transmission in a PTM-enabled network comprises the steps of receiving and storing redundancy data at... | 02/26/2013 |
| 8386899 | Quantum computing method and a quantum computer In an operation of two qubit gate having failure information related to success or failure, by using a code to concatenate N-error-correcting code transversally executing a Pauli gate, a Hadamard gate and a CNOT gate, an error-correction is executed by an error-corr... | 02/26/2013 |
| 8347198 | Semiconductor memory device having capability of stable initial operation A semiconductor memory device is capable of outputting a preset logic level through an EDC pin according to an operation mode during an initial operation, and providing a stable operation according to the specification of the semiconductor memory device just after t... | 01/01/2013 |
| 8335978 | Liquid container In a semiconductor storage device 10 included in a liquid container 20, on reception of an encoding request for encoding readout data, a write-read controller 140 changes over the position of a switch 141 to output encoded readout data, w... | 12/18/2012 |
| 8321773 | Hardware true random number generator in integrated circuit with tamper detection Circuits and methods to generate a True Random Number Generator (TRNG) with tamper-detection are presented. In one embodiment, the circuit includes two identical TRNG circuits and logic circuitry that combines and correlates the outputs of the two TRNG circuits. The... | 11/27/2012 |
| 8321775 | Non-volatile memory with extended error correction protection Embodiments of the present disclosure provide methods and apparatuses related to NVM devices with extended error correction protection. In some embodiments, a parity cache is used to store parity values of data values stored in a plurality of codewords of an NVM dev... | 11/27/2012 |
| 8321774 | Method for fail-safe transmission, safety switching device and control unit A method for fail-safe transmission of information between a transmitter and a receiver is disclosed. At least two telegrams relating to the information are transmitted as a first telegram via a first channel and a second telegram via a second channel from the trans... | 11/27/2012 |
| 8312361 | Arithmetic circuit, arithmetic processing device, and arithmetic processing method In an arithmetic circuit, every time a numerical value is stored in a register, a partial solution is predicted on the basis of the numerical value, an intermediate value is generated by a predetermined calculation using one or more predicted partial solutions, an e... | 11/13/2012 |
| 8296639 | Method and apparatus for detecting communication errors on a bus A semiconductor memory includes multi-mode reporting signals, a state register, and parity detectors. The parity detector determines whether signals received on a communication bus contain a desired parity. The multi-mode reporting signals enable reporting of commun... | 10/23/2012 |
| 8291305 | Error detection schemes for a cache in a data processing system A method includes providing a cache; and providing a plurality of cache lines within the cache, wherein a first one of the plurality of cache lines has a tag entry and a data entry, wherein the tag entry has a parity field for storing one or more parity bits associa... | 10/16/2012 |
| 8261174 | Protecting and migrating memory lines A data protection method is provided. The method includes receiving data; generating compressed data based on the data; determining a degree of compressibility based on the compressed data; determining an amount of free space based on the degree of compressibility; ... | 09/04/2012 |
| 8250451 | IC card, information processing device, communication type identification method, and program An IC card is provided that is capable of identifying a communication type of incoming data received by non-contact communication. The IC card includes: an error detection portion that, for each of a plurality of communication types, performs error detection of inco... | 08/21/2012 |
| 8250450 | Method and system for using redundancy to exchange data in a multicast or one way environment A system for use in one-way communications takes data from a source and parses it into work units. The work units may have a fixed size. The data of the work units is given to a redundant array of independent disks (RAID) library. The RAID library applies parity to ... | 08/21/2012 |
| 8245120 | Power reduced queue based data detection and decoding systems and methods for using such Various embodiments of the present invention provide systems and methods for data processing. For example, a variable iteration data processing system is disclosed that includes a first detector, a second detector, a decoder and a unified memory buffer. An input dat... | 08/14/2012 |
| 8239743 | Managing common uplink resources in a cellular radio communications system The technology in this application provides for efficient use of a common uplink radio resource, like the common E-DCH resource. A UE lacking a valid radio network identifier, e.g., a UE in an idle mode, receives a data unit and adds error detection bits to generate... | 08/07/2012 |
| 8205146 | Persistent error detection in digital memory A method for detecting a persistent error in a digital memory is provided. Error location information for errors detected in the digital memory is received. A group of the errors that are associated with a same error position is identified from the error location in... | 06/19/2012 |
| 8201067 | Processor error checking for instruction data A method for processor error checking including receiving an instruction data, generating a pre-processing parity data based on the instruction data, maintaining the pre-processing parity data, processing the instruction data, generating a post-processing parity dat... | 06/12/2012 |
| 8181068 | Apparatus for and method of life-time test coverage for executable code A novel and useful apparatus for and method of associating a dedicated coverage bit to each instruction in a software system. Coverage bits are set every time the software application runs, enabling a more comprehensive and on-going code coverage analysis. The code ... | 05/15/2012 |
| 8166380 | Method and apparatus for identifying paths having appropriate lengths for fault simulation A fault analysis apparatus includes: an extracting unit that extracts a segment including a point of fault from a plurality of paths in a target circuit; a detecting unit that detects a candidate path that extends, via the segment, from an upstream circuit element t... | 04/24/2012 |
| 8161362 | Task management control apparatus and method, having redundant processing comparison Processed results are received when processors make compatible computations on data of a common object. A computation command signal is generated and fed to the processors in response to a start signal from any one of the processors so that the processors can make c... | 04/17/2012 |
| 8145985 | Error detection schemes for a unified cache in a data processing system In a data processing system processing circuitry executes a plurality of data processing instructions. A unified cache memory stores data and instructions processed by the processing circuitry. The unified cache memory has a plurality of sets, each set having a plur... | 03/27/2012 |
| 8140565 | Autonomic information management system (IMS) mainframe database pointer error diagnostic data extraction A method and system for autonomic Information Management System (IMS) mainframe database pointer error diagnostic data extraction. A receiving module may receive a database name and an error detection time. An error detection module may locate database pointer error... | 03/20/2012 |
| 8136024 | Optional memory error checking A memory error checking system includes a controller that is operable to transmit memory signals and error check signals. A first memory device coupler is coupled to the controller and operable to couple to a first memory device. The first memory device coupler is o... | 03/13/2012 |
| 8074158 | Erasure detection for a transport channel with an unknown format To perform erasure detection for an intermittently active transport channel with unknown format, a receiver determines an energy metric and a symbol error rate (SER) for a received block with CRC failure. The receiver computes uncorrelated random variables u and v f... | 12/06/2011 |
| 8074159 | Method and apparatus for detecting communication errors on a bus A semiconductor memory includes multi-mode reporting signals, a state register, and parity detectors. The parity detector determines whether signals received on a communication bus contain a desired parity. The multi-mode reporting signals enable reporting of commun... | 12/06/2011 |
| 8037397 | Method for recovering a lost data unit The present invention discloses a method for recovering a lost data unit, the method including: partitioning data to be transmitted into one or more data units, sorting the data units according to importance levels of the data units, and determining a check rule for... | 10/11/2011 |
| 8001453 | CAN system Provided is a CAN system that can generate an error signal without requiring hardware for generating an error signal to be connected to a bus. A protocol processing part within a CAN controller incorporates error data into receive data or send data, based on error d... | 08/16/2011 |
| 7996751 | Transmitter and system for transmitting/receiving digital broadcasting stream and method thereof A digital broadcasting transmission system processes dual transport stream (TS) including multi turbo streams. The digital broadcasting transmission system includes a turbo processor to detect a turbo stream from a dual transport stream (TS) which includes a multipl... | 08/09/2011 |
| 7987415 | Method and system for application of unequal error protection to uncompressed video for transmission over wireless channels A method and system of wireless communication is provided which involves inputting information bits, wherein certain bits have higher importance level than other bits, and applying unequal protection to the bits at different importance levels. As such, important bit... | 07/26/2011 |
| 7979783 | Error detection device and method for error detection for a command decoder An error detection device for a command decoder is described, the command decoder reading out an associated sequence of control signal words from a command memory based on an input word, wherein the sequence of control signal words has at least one control signal wo... | 07/12/2011 |
