"It is my heart-warmed and world-embracing Christmas hope and aspiration that all of us, the high, the low, the rich, the poor, the admired, the despised, the loved, the hated, the civilized, the savage (every man and brother of us all throughout the whole earth), may eventually be gathered together in a heaven of everlasting rest and peace and bliss, except the inventor of the telephone. "
Mark Twain ; Christmas greetings, 1890
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| Number | Title | Issue Date |
| 8181098 | Error correcting Viterbi decoder Methods and corresponding systems in a Viterbi decoder include computing a maximum likelihood (ML) path in a Viterbi trellis in response to executing a first Viterbi algorithm. Thereafter, one or more merge points are selected on the ML path in a second Viterbi algo... | 05/15/2012 |
| 8171384 | Device having turbo decoding capabilities and a method for turbo decoding A device and a method for turbo decoding, the method includes performing multiple iterations of a turbo decoding process until a turbo decoding process is completed; wherein the performing comprises repeating the stages of: (i) initializing at least one state metric... | 05/01/2012 |
| 8145983 | Methods and apparatus for identification of likely errors in data blocks Methods and apparatus are provided for processing a plurality of data blocks. In accordance with embodiments of the invention, a correction flag for each of the data blocks can be received, along with information on at least one error event for each of the data bloc... | 03/27/2012 |
| 8127216 | Reduced state soft output processing Devices, methods, and systems of a communications channel detector are disclosed that can compare a plurality of candidate sequences of bits and decisions to identify unlikely error events. The detector may then discard at least one candidate sequence based on an un... | 02/28/2012 |
| 8099658 | Reduced complexity Viterbi decoder A Viterbi decoder includes a branch metric unit, an add-compare select unit coupled to the branch metric unit, and a trace-back unit coupled to the add-compare select unit. The branch metric unit includes a branch metric computation unit coupled to a thresholder uni... | 01/17/2012 |
| 8010883 | Read channel detector for noise cancellation A detector includes a Viterbi module that generates a first preliminary data estimate signal and a second preliminary data estimate signal based on a received data signal. A first loop generates a first error signal based on said first preliminary data estimate sign... | 08/30/2011 |
| 7962841 | Data decoding apparatus and method in a communication system A majority voting Viterbi decoder includes a branch metric calculator (BMC) for measuring a difference between a received symbol and a reference symbol and outputting branch metrics from the difference; an add-compare-selection (ACS) unit for determining an optimal ... | 06/14/2011 |
| 7958437 | MAP detector with a single state metric engine A maximum a posteriori detector includes a single state metric engine that performs forward and backward processing to produce forward and backward state metrics. The state metric engine includes a plurality of processes that each perform both the forward and the ba... | 06/07/2011 |
| 7937650 | Maximum likelihood decoder and decoding method therefor According to one embodiment, a maximum likelihood decoder includes a branch metric calculator, a processor configured to perform addition, comparison, and selection of an output from the branch metric calculator and a path metric memory, and outputs a selection sign... | 05/03/2011 |
| 7908545 | Pipeline architecture for maximum a posteriori (MAP) decoders The sliding window approach to pipeline maximum a posteriori (MAP) decoder architecture is modified to decrease processing time. Once the forward metrics have been calculated for the first sliding window of the decoder, the reverse metrics for each window are calcul... | 03/15/2011 |
| 7861147 | ACS unit and method thereof An add-compare-select (ACS) unit generates first path metrics having a first bit-pair and a most significant bit-pair (MSB) each including a high bit and a low bit. A first ACS circuit produces the first bit-pair and a first carry. A limiting circuit generates the M... | 12/28/2010 |
| 7779339 | ACS circuit An ACS circuit includes: a basic DPM retaining section (11) for retaining basic DPMs (differential path metrics); a basic DPM calculating section (12) for calculating the basic DPMs; a reference DPM calculating section (13) for calculating refer... | 08/17/2010 |
| 7743314 | Method and apparatus for a data-dependent noise predictive viterbi An improved Viterbi detector is disclosed in which each branch metric is calculated based on noise statistics that depend on the signal hypothesis corresponding to the branch. Also disclosed is a method of reducing the complexity of the branch metric calculations by... | 06/22/2010 |
| 7702991 | Method and apparatus for reduced-state viterbi detection in a read channel of a magnetic recording system A method and apparatus are disclosed for improving the maximum data rate of reduced-state Viterbi detectors with local feedback in magnetic recording systems. A read channel signal is processed in a magnetic recording device by precomputing branch metrics, intersymb... | 04/20/2010 |
| 7653868 | Method and apparatus for precomputation and pipelined selection of branch metrics in a reduced state Viterbi detector A method and apparatus are disclosed for improving the maximum data rate of reduced-state Viterbi detectors with local feedback. The maximum data rate that may be achieved by the disclosed reduced state Viterbi detectors is improved by precomputing a number of candi... | 01/26/2010 |
| 7647547 | Turbo decoder with reduced-size branch metric cache A method and an apparatus is provided for producing branch metrics in a LogMAP turbo decoding operation. During a forward recursion of a trellis, a set of primary branch metrics is generated. The primary branch metrics are stored in receiver form in a relatively sma... | 01/12/2010 |
| 7613990 | Method and system for a multi-channel add-compare-select unit A circuit for a multi-channel add-compare-select unit is disclosed. The circuit includes a compare unit and a datapath. The datapath is coupled to the compare unit, and includes a number of adder units, a selection unit (which is coupled to the adder units), and a n... | 11/03/2009 |
| 7594162 | Viterbi pretraceback for partial cascade processing This invention modifies Viterbi decoding to improve BER. Within the state metric unit cascade block, this invention forces the unused ACS units decision bits to a 0 for the top rail and a 1 for the bottom rail. This invention modifies the final maximum state index w... | 09/22/2009 |
| 7584409 | Method and device for alternately decoding data in forward and reverse directions A decoding device according to the one embodiment of the invention includes: a first decoder performing a first decoding based on first encoded data obtained by encoding unencoded data, and second soft-output data to generate first soft-output data; a second decoder... | 09/01/2009 |
| 7565601 | Circuit for carrying out the add compare select operation with a functionality going beyond this A circuit is disclosed that is designed to carry out add compare select operations for determination of state metrics. The circuit is also designed to carry out a computation operation which goes beyond an add compare select operation for state metric determination,... | 07/21/2009 |
| 7552380 | Method and apparatus for encoding and decoding modulation code A method and an apparatus for encoding and decoding a modulation code are provided. The method includes: adding an error detection bit(s) to source information; performing k-constraint coding by inserting an error pattern that can be detected using an error detectio... | 06/23/2009 |
| 7487432 | Method and apparatus for multiple step Viterbi detection with local feedback A reduced-state Viterbi detector is disclosed that precomputes branch metrics for a multiple-step trellis for speculative sequences of one or more channel symbols; selects one of said precomputed branch metrics for multi-step state transitions based on at least one ... | 02/03/2009 |
| 7458008 | Decision voting in a parallel decoder A method (700) and apparatus (600) are described for performing decision voting in connection with a parallel ACS unit (110) and track buffer (112) in an Ultrawide Bandwidth (UWB) receiver having a parallel DECODER for decoding a message ... | 11/25/2008 |
| 7441177 | Information reproduction apparatus and method using maximum likelihood decoding An information reproduction apparatus using maximum likelihood decoding for calculating likelihood of a value of a reproducing signal to a plurality of reference values, the reproducing signal obtained from a recording medium, to decode the reproducing signal on the... | 10/21/2008 |
| 7426681 | Viterbi detector A path-select-signal memory section in the Viterbi detector outputs each decoded data B′Sik corresponding to a branch that occurred a prescribed time ago in a surviving path to each state at a present time, in response to path select signals ... | 09/16/2008 |
| 7406650 | Variable code rate and signal constellation turbo trellis coded modulation codec Variable code rate and signal constellation turbo trellis coded modulation (TTCM) codec. The decoding can be performed on signals whose various symbols have been mapped to multiple modulations (constellations and mappings) according to a rate control sequence. The r... | 07/29/2008 |
| 7404139 | Decoder with M-AT-A-Time Traceback A Maximum Likelihood Sequence Estimation (MLSE) decoder that decodes an encoded sequence of data symbols includes a branch metric unit for computing branch metrics for each trellis stage of the encoded sequence, a path metric unit for computing a path metric for eac... | 07/22/2008 |
| 7400688 | Path metric normalization Path metric normalization in calculating trellis-based algorithms is improved by normalizing the path metric with an average value (rather than a maximum or a minimum) of the path metrics. Using an average rather than a maximum or a minimum provides various advantag... | 07/15/2008 |
| 7398458 | Method and apparatus for implementing decode operations in a data processor An improved method and apparatus for performing operations (such as Viterbi decode) in digital processors using a reduced number of cycles. In one aspect, the invention comprises efficient methods for performing multiple “butterfly” add-compare-select (ACS) oper... | 07/08/2008 |
| 7392463 | Data reproducing apparatus avoiding selection of incorrect path An apparatus for reproducing data includes a branch metric computation unit and a plurality of parallel computation units. Each parallel computation unit includes path metric computation units that compute path metric values based on branch metric values. Path metri... | 06/24/2008 |
| 7383489 | Method and apparatus for detecting viterbi decoder errors due to quasi-catastrophic sequences A Viterbi decoder that identifies errors in a full decision output comprises a full decision generator that generates the full decision output. An error detector detects errors in the full decision output and generates a signal when the full decision output errors a... | 06/03/2008 |
| 7383488 | Method and apparatus for detecting Viterbi decoder errors due to quasi-catastrophic sequences A Viterbi decoder that identifies errors in an early decision output comprises an early decision generator that generates the early decision output. An error detector detects errors in the early decision output and generates a signal when the early decision output e... | 06/03/2008 |
| 7382831 | Viterbi decoder utilizing compressed survival metrics for reduced memory size requirements A Viterbi decoder is configured for subtracting each survivor metric for each corresponding encoder state by a prescribed subtraction operator based on a prescribed event. The subtraction of each survivor metric by a prescribed subtraction operator based on a prescr... | 06/03/2008 |
| 7380199 | Method and apparatus for precomputation and pipelined selection of branch metrics in a reduced-state Viterbi detector A method and apparatus are disclosed for improving the maximum data rate of reduced-state Viterbi detectors with local feedback. The maximum data rate that may be achieved by the disclosed reduced-state Viterbi detectors is improved by precomputing a number of candi... | 05/27/2008 |
| 7373581 | Device, program, and method for decoding LDPC codes A parallel decoder, which is simpler and more flexible than conventional devices, is provided in decoding device for a LDPC code. The present invention includes a plurality of memory units for storing a received value and a message generated during a Message-Passing... | 05/13/2008 |
| 7373582 | Apparatus and method for turbo decoding using a variable window size An apparatus and method for turbo decoding using a variable window size. A control logic block receives information about a code rate of received data bits and a data block size, adjusts a window size according to the code rate information, and computes an initial d... | 05/13/2008 |
| 7372921 | Apparatus and method for channel encoding/decoding in a communication system An apparatus and method for channel encoding/decoding are provided which vary an iterative decoding number according to service type, data class and channel condition. A message information receiver receives information about a message to be received. A controller d... | 05/13/2008 |
| 7370266 | Digital signal decoding device and digital signal decoding method A digital signal decoding device according to an aspect of the present invention is a digital signal decoding device for generating a binary code sequence by maximum likelihood estimation from a convolutionally encoded input signal sequence, includes an add-compare-... | 05/06/2008 |
| 7369615 | Soft demodulation method and apparatus A soft demodulation method and apparatus including calculating partial sums for a unit of each predetermined number of bits of a codeword received from a channel; calculating a value of each entry of the decoding table by referring to the partial sums; and detecting... | 05/06/2008 |
| 7369622 | Diversity circuit demodulating OFDM-method signals and diversity receiving apparatus having said diversity circuit therein In a receiving apparatus, two respective reference-point computing units in respective diversity branches calculate reference points on a constellation, and two respective reference-point specifying units in the two diversity branches select respectively the referen... | 05/06/2008 |