Microwave Oven With Removable Storage Cassette in Dashboard of Motor Vehicle
A microwave oven adapted for use within a motor vehicle dashboard area. The microwave oven has a removable storage cassette, and slidable platforms for securing and serving containers of beverages and foods.
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| Number | Title | Issue Date |
| 6876317 | Method of context based adaptive binary arithmetic decoding with two part symbol decoding This invention is method of decoding a context based adaptive binary arithmetic encoded bit stream. The invention determines a maximum number of iterations for decoding a next symbol. This preferably employs a left most bit detect command. The invention considers th... | 04/05/2005 |
| 6868521 | Apparatus and method for implementing a decoder for convolutionally encoded symbols An apparatus and method for implementing a decoder for convolutionally encoded symbols (e.g., a viterbi decoder) is described. In one embodiment, a file of all the initial states (or their equivalents) and the nth surviving states associated with the initial states ... | 03/15/2005 |
| 6868518 | Look-up table addressing scheme A method for performing a table look-up operation on a first table having N entries includes generating a second table having kN entries based on the first table. The method includes generating a first data field for the second table including table index values hav... | 03/15/2005 |
| 6848069 | Iterative decoding process Briefly, a method to decode a block of information of a turbo code to produce a decoded block. The method may determine from a structure of an error detection code one or more possible error patterns and may generate a reliability metric based on one or more of the ... | 01/25/2005 |
| 6842872 | Evaluating and optimizing error-correcting codes using projective analysis A method evaluates and optimizes an error-correcting code to be transmitted through a noisy channel and to be decoded by an iterative message-passing decoder. The error-correcting code is represented by a parity check matrix which is modeled as a bipartite graph hav... | 01/11/2005 |
| 6842303 | Magnetic recording and/ or reproducing apparatus A magnetic recording and/or reproducing apparatus includes an equalization section for equalizing a signal sequence which is reproduced from a magnetic recording medium and outputting an equalized waveform, and a conversion section for converting the equalized wavef... | 01/11/2005 |
| 6836516 | Decoding method and apparatus A decoding method and apparatus include providing capability for decoding data symbols that were encoded in a transmitter by either a serial-concatenated code or turbo code in a parallel processing fashion. The receiver upon knowing the encoding method may reconfigu... | 12/28/2004 |
| 6834369 | Apparatus and method for determining a most likely code word in a digital data transmission system In order to rapidly determine a most likely code word at a decoder provided in a digital data transmission system using block codes or convolutional codes for the purposes of combating a noisy channel environment, an adaptively controllable threshold is introduced s... | 12/21/2004 |
| 6823027 | Method for enhancing soft-value information A Reduced-State Sequence Estimation (RSSE) method is disclosed, whereby states in a trellis structure associated, for example, with a Viterbi algorithm are partitioned into a plurality of hyper-states. During a hyper-state decision interval, a hyper-soft value is ca... | 11/23/2004 |
| 6813742 | High speed turbo codes decoder for 3G using pipelined SISO log-map decoders architecture A Bandband Processor for Wireless Communications is presented. The invention encompasses several improved Turbo codes method to provide a more practical and simpler method for implementation a Turbo Codes Decoder in ASIC or DSP coding. (1) A plurality of pipelined p... | 11/02/2004 |
| 6807239 | Soft-in soft-out decoder used for an iterative error correction decoder Adders each add up an addition value sent from a metric calculator and a state metric read from a memory. A maximum value selector generates a first likelihood when a data bit is 1, based on the addition values added up by the adders. A maximum value selector genera... | 10/19/2004 |
| 6807238 | Method and apparatus for decoding M-PSK turbo code using new approximation technique The method of the present invention decodes a received symbol that represents data bits including message bits and parity-check bits. The method comprises (a) mapping the symbol onto a received signal point in a signal space, the signal point having an in-phase comp... | 10/19/2004 |
| 6799295 | High speed turbo codes decoder for 3G using pipelined SISO log-map decoders architecture A baseband processor is provided having Turbo Codes Decoders with Diversity processing for computing signals from separate antennas. The invention decodes multipath signals that have arrived at the terminal via different routes after being reflected from buildings, ... | 09/28/2004 |
| 6788482 | Method and apparatus for Viterbi detector state metric re-normalization A method and apparatus for Viterbi detector state metric re-normalization. The method includes fabricating a Viterbi detector (138) having a predetermined number of states, wherein the Viterbi detector (138) stores a state metric value and a branch met... | 09/07/2004 |
| 6778615 | Method and apparatus for block noncoherent decoding Received symbols are decoded in a communication system using a maximum likelihood block noncoherent decoding algorithm. The noncoherent decoding algorithm utilizes a set of test words determined for a given block of symbols based on a corresponding set of crossover ... | 08/17/2004 |
| 6775801 | Turbo decoder extrinsic normalization This invention presents a unique implementation of the extrinsic block the turbo decoder that solves the problem of generation and use of precision extension and normalization in the alpha and beta metrics blocks. Both alpha metric inputs and beta metric inputs are ... | 08/10/2004 |
| 6771197 | Quantizing signals using sparse generator factor graph codes A method quantizes an input signal of N samples into a string of k symbols drawn from a q-ary alphabet. A complementary method reproduces a minimally distorted version of the input signal from the quantized string, given some distortion measure. First, an [N,k]... | 08/03/2004 |
| 6760699 | Soft feature decoding in a distributed automatic speech recognition system for use over wireless channels A method and apparatus for performing automatic speech recognition (ASR) in a distributed ASR system for use over a wireless channel takes advantage of probabilistic information concerning the likelihood that a given, portion of the data has been accurately decoded ... | 07/06/2004 |
| 6760883 | Generating log-likelihood values in a maximum a posteriori processor A maximum a posteriori (MAP) detector/decoder employs an algorithm that computes log-likelihood value with an a posteriori probability (APP) value employing a number N of previous state sequences greater than or equal to two (N≧2). By defining the APP with more pr... | 07/06/2004 |
| 6757122 | Method and decoding apparatus using linear code with parity check matrices composed from circulants The present invention provides a novel method and apparatus for decoding digital information transmitted through the communication channel or recorded on a recording medium. The method and apparatus are preferably applied in the systems where data is encoded using r... | 06/29/2004 |
| 6757117 | Data detection in a disk drive system using erasure pointers Control circuitry for a disk drive system that has improved data detection by using log likelihood values and erasure pointers. The control circuitry is comprised of a log likelihood modification system and a decoder. The log likelihood modification system receives ... | 06/29/2004 |
| 6757864 | Method and apparatus for efficiently reading and storing state metrics in memory for high-speed ACS viterbi decoder implementations The present invention discloses a method and apparatus for efficiently reading and storing state metrics in memory to enhance high-speed ACS Viterbi decoder implementations. The method includes applying an addressing scheme that determines the address locations of s... | 06/29/2004 |
| 6751586 | Audio decoding device with soft decision error correction by bit interpolation A audio decoding device includes an error correction processing means 13 for generating interpolation process information, a soft decision information generating means 12a for generating a soft decision information indicating a current situation... | 06/15/2004 |
| 6751774 | Rate (M/N) code encoder, detector, and decoder for control data A system for block encoding and block decoding of servo data with a rate (M/N) code, where M is an integer greater than 1 and N is an integer that is greater than M. Two codes are described for the encoding and decoding processes: a rate (2/6) code and a rate (2/8) ... | 06/15/2004 |
| 6745365 | Coder with error correction, decoder with error correction and data transmission apparatus using the coder and decoder An encoder and a decoder each having an error correcting operation, and a data transmission apparatus using them for data transmission in a multilevel modulation system. In transmission data is converted into parallel data. One bit thereof is inputted to a convoluti... | 06/01/2004 |
| 6738948 | Iteration terminating using quality index criteria of turbo codes A method of terminating iteration calculations in the decoding of a received convolutionally coded signal includes a first step of providing a turbo decoder with a first and second recursion processors connected in an iterative loop. Each processor has an associated... | 05/18/2004 |
| 6735724 | Detection error estimation and method A method of monitoring the performance of a Viterbi detector by using the deviations from the noiseless case of the path difference of the two branches entering the minimal state for a number of samples. ... | 05/11/2004 |
| 6732321 | Method, apparatus, and article of manufacture for error detection and channel management in a communication system A weighting device utilizes soft reliability values and class weighting factors to detect errors in digitized information. The soft reliability values can be provided by a decoder that processes the information according to a predetermined coding scheme. Bits repres... | 05/04/2004 |
| 6731692 | Symbol encoding and decoding architecture for trellis-coded modulation in gigabit ethernet A method of encoding a plural-bit data word as a plurality of multi-level symbols, where each of the plurality of multi-level symbols has a value selected from a predetermined plurality of levels. The method includes first translating each one of the selected bit po... | 05/04/2004 |
| 6721916 | System and method for trellis decoding in a multi-pair transceiver system A method and a system for decoding information signals encoded in accordance with a multi-state encoding scheme and transmitted over a multi-dimensional transmission channel by computing a distance of a received word from a codeword. One-dimensional (1D) input signa... | 04/13/2004 |
| 6721366 | Phase tracking apparatus and method for continuous phase modulated signals A method establishes a phase reference signal for trellis demodulating CPM modulated received signals by using phase reference signals and symbol timing estimates. Branch metrics signals representing the highest-probability path through the trellis are calculated to... | 04/13/2004 |
| 6718511 | Method and apparatus to detect a signal received from a channel signal Disclosed is an apparatus for detecting a signal received from a channel signal and for transforming this signal into a binary code sequence via a signal processing apparatus, which can perform a maximum likelihood detection of the reproduced data from an optical di... | 04/06/2004 |
| 6715120 | Turbo decoder with modified input for increased code word length and data rate A turbo decoder system utilizing a MAP decoding algorithm has a predetermined number of turbo decoder modules for decoding segments of a turbo code component code word in parallel, thereby expanding the block-length and data rate capability of the turbo decoder. Upo... | 03/30/2004 |
| 6707849 | Methods, receivers and equalizers having increased computational efficiency Metrics associated with each branch from a previous hypothesized trellis state to each respective possible current trellis state in a DFSE equalizer can be calculated. In particular, a common portion of branch metrics can be calculated that is common to each of the ... | 03/16/2004 |
| 6697443 | Component decoder and method thereof in mobile communication system There is provided a decoder and a decoding method for decoding data modulated with a recursive systematic convolutional code (RSC) in a mobile communication system. In the decoder, a branch metric calculating circuit (BMC) calculates branch metrics (BMs) ... | 02/24/2004 |
| 6691263 | Interative decoding based on dominant error events An iterative decoding system for intersymbol interference (ISI) channels has a module for extracting bit reliabilities from a partial response (PR) channel, an iterative decoder, and a module for updating the bit reliabilities. A transmitter parses a data... | 02/10/2004 |
| 6678862 | Detection apparatus A partial response maximum likelihood (PRML) bit detection apparatus is disclosed for deriving a bit sequence (xk) from an input information signal. The apparatus comprises input means for receiving the input information signal. The apparatus f... | 01/13/2004 |
| 6674816 | Viterbi detector for extending tolerable extent of direct current bias A Viterbi detector for extending tolerable extent of DC bias is disclosed. By adding a fixed value to a reference level or subtracting a fixed value from the reference level, the tolerable extent of the DC bias of the input signal is increased. According ... | 01/06/2004 |
| 6675342 | Direct comparison adaptive halting decoder and method of use A direct comparison adaptive halting turbo decoder computes the sum of the a priori and the extrinsic information sequences at each iteration step. The sum sequences are coded so as to be simple binary sequences. New sum sequences are generated during eac... | 01/06/2004 |
| 6668014 | Equalizer method and apparatus using constant modulus algorithm blind equalization and partial decoding A digital communication receiver includes a blind equalizer using the Constant Modulus Algorithm (CMA) to compensate for channel transmission distortion in digital communication systems. Improved CMA performance is obtained by using a partial trellis deco... | 12/23/2003 |