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| Number | Title | Issue Date |
| 8166379 | Calculating soft information from a multi-level modulation signal Apparatus and methods are provided for calculating soft information in a multi-level modulation scheme using one or more nearest neighbors. The nearest neighbors correspond to signal points in a signal constellation set nearest to the value of a received signal. The... | 04/24/2012 |
| 8136022 | Detector for multi-level modulated signal and detection method using the same, and iterative receiver for multi-level modulated signal and iteratively receiving method using the same Provided are a detector for a multi-level modulated signal and a detection method using the same, and an iterative receiver for a multi-level modulated signal and an iteratively receiving method using the same. The detector includes: a channel estimator estimating a... | 03/13/2012 |
| 8117522 | Sphere decoder and decoding method thereof A sphere decoder sets a Euclidean distance between a lattice vector obtained by using an MMSE or ZF estimate and a received signal as an initial radius, further reduces the initial radius, and searches lattices points included inside a hypersphere with the further r... | 02/14/2012 |
| 8086943 | Serial turbo trellis coded modulation using a serially concatenated coder Serial concatenated trellis coded modulation (SCTCM) includes an outer coder, an interleaver, a recursive inner coder and a mapping element. The outer coder receives data to be coded and produces outer coded data. The interleaver permutes the outer coded data to pro... | 12/27/2011 |
| 8074156 | Decoding method and decoding apparatus Disclosed herein is a decoding method of performing maximum a posteriori probability (MAP) decoding of selecting one decoded word from one or more decoded word candidates obtained by subjecting a linear code to iterative decoding by comparison of distances between a... | 12/06/2011 |
| 8060811 | Low complexity optimal soft MIMO receiver A low-complexity optimal soft MIMO detector is provided for a general spatial multiplexing (SM) systems with two transmit and NR receive antennas. The computational complexity of the proposed scheme is independent from the operating signal-to-noise ratio ... | 11/15/2011 |
| 8042030 | Encoding apparatus, decoding apparatus, encoding method, decoding method, and storage device An ECC decoder outputs, to a likelihood substituting unit, information on data in data blocks that is corrected to be valid. Based on the information, the likelihood substituting unit substitutes likelihood corresponding to the data corrected to be valid by the maxi... | 10/18/2011 |
| 8042031 | Maximum likelihood detection method and system A maximum likelihood detection (MLD) method is disclosed. Received data is processed to obtain preliminary parameters. An initial radius r is determined. r2 is multiplied by a corresponding scaling factor according to a partial Euclidean distance (PED) co... | 10/18/2011 |
| 8001452 | Methods and apparatus for soft decision decoding using reliability values based on a log base two function Methods and apparatus are provided for soft decision decoding using reliability values based on a log base two function. A signal is processed to determine one or more reliability values for a soft decision decoder by computing one or more log-likelihood ratio (LLR)... | 08/16/2011 |
| 7984368 | Method and system for increasing decoder throughput A method for increasing decoder throughput is provided that includes dividing a data block into a plurality of segments. For each of the segments, the segment is decoded by performing a plurality of processes for the segment. At least one process for a current segme... | 07/19/2011 |
| 7945845 | Maximum likelihood decoding via mixed-integer adaptive linear programming A method and system decode a sequence of symbols received via a channel to a codeword of an error-correcting code. Log-likelihood ratios are determined from a sequence of symbols received via a channel. A set of constraints is initialized according to the log-likeli... | 05/17/2011 |
| 7917834 | Apparatus and method for computing LLR Provided are an apparatus and method for efficiently computing a log likelihood ratio (LLR) using the maximum a posteriori (MAP) algorithm known as block combining. The method includes the steps of: calculating alpha values, beta values and gamma values of at least ... | 03/29/2011 |
| 7917835 | Memory system and method for use in trellis-based decoding Systems and modules for use in trellis-based decoding of encoded sets of data bits. A memory system has multiple arrays for storing an index for each one of multiple states. With each array element being associated with a state through which a decoding path may pass... | 03/29/2011 |
| 7913153 | Arithmetic circuit An arithmetic circuit includes a NOR circuit for outputting 1-bit inverted logical OR sf from all of a first bit group x(6) to x(10) containing 0 or more high-order bit of a path metric value composed of a plurality of bits, an inverter for inve... | 03/22/2011 |
| 7913154 | Method and apparatus for pipelined joint equalization and decoding for gigabit communications A method and apparatus for the implementation of reduced state sequence estimation is disclosed, with an increased throughput using precomputation (look-ahead), with only a linear increase in hardware complexity with respect to the look-ahead depth. The present inve... | 03/22/2011 |
| 7900123 | Method for near maximum-likelihood sequential decoding A method for near maximum-likelihood sequential decoding is provided. According to the method, paths unlikely to become the maximum-likely path are deleted during decoding through a level threshold to reduce decoding complexity. Besides, the method performs maximum-... | 03/01/2011 |
| 7895506 | Iterative decoder with early-exit condition detection and methods for decoding Embodiments of an iterative decoder with early-exit condition detection and methods for decoding are generally described herein. Other embodiments may be described and claimed. In some embodiments, a first codeword is generated from decoded bits after one or more ha... | 02/22/2011 |
| 7849385 | Systems and methods for media defect detection utilizing correlated DFIR and LLR data The present invention provides systems and methods for detecting a media defect. A circuit providing a hard output and a soft output is used with the hard output and the soft output being combined and the product compared with a threshold. Based at least in part on ... | 12/07/2010 |
| 7831894 | Address generation for contention-free memory mappings of turbo codes with ARP (almost regular permutation) interleaves Address generation for contention-free memory mappings of turbo codes with ARP (almost regular permutation) interleaves. A novel means is presented by which anticipatory address generation is employed using an index function that is based on an address mapping whi... | 11/09/2010 |
| 7827473 | Turbo decoder employing ARP (almost regular permutation) interleave and arbitrary number of decoding processors Turbo decoder employing ARP (almost regular permutation) interleave and arbitrary number of decoding processors. A novel approach is presented herein by which an arbitrarily selected number (M) of decoding processors (e.g., a plurality of parallel implemented turbo ... | 11/02/2010 |
| 7818653 | Methods of soft-input soft-output decoding for nonvolatile memory In a nonvolatile memory system, data is read from a memory array and used to obtain likelihood values, which are then provided to a soft-input soft-output decoder. The soft-input soft-output decoder calculates output likelihood values from input likelihood values an... | 10/19/2010 |
| 7814401 | Soft decoding of hard and soft bits read from a flash memory To read one or more flash memory cells, the threshold voltage of each cell is compared to at least one integral reference voltage and to at least one fractional reference voltage. Based on the comparisons, a respective estimated probability measure of each bit of an... | 10/12/2010 |
| 7810018 | Sliding window method and apparatus for soft input/soft output processing In one or more embodiments, a method of processing a soft value sequence according to an iterative soft-input-soft-output (SISO) algorithm comprises carrying out sliding-window processing of the soft value sequence in a first iteration using first window placements ... | 10/05/2010 |
| 7805664 | Likelihood metric generation for trellis-based detection and/or decoding Systems and methods for generating likelihood metrics for trellis-based detection and/or decoding are described. In some embodiments, likelihood metrics for a first subset of bit locations in an error pattern (e.g., bit locations that fall within the error event upd... | 09/28/2010 |
| 7805663 | Methods of adapting operation of nonvolatile memory In a nonvolatile memory system a Soft-Input Soft-Output (SISO) decoder corrects errors in data that is read from a memory and a statistical unit connected to the SISO decoder collects data regarding corrections. The statistical unit generates at least one output bas... | 09/28/2010 |
| 7793201 | Bit error detector for iterative ECC decoder An iterative decoder includes at respective variable nodes, that is, at nodes that correspond to the bits of the code word, bit error detectors that after convergence determine if the respective hard decision bit values have changed from the bit values provided by t... | 09/07/2010 |
| 7783962 | Iterative decoding receiver reducing complexity of partial sphere decoding in spatial multiplexing system and method thereof The present invention relates to an iterative decoding receiver for reducing complexity of a partial sphere decoding operation in a spatial multiplexing system, and a method thereof. In the present invention, an iterative detection and decoding (IDD) method using a ... | 08/24/2010 |
| 7770093 | Serial turbo trellis coded modulation using a serially concatenated coder Serial concatenated trellis coded modulation (SCTCM) includes an outer coder, an interleaver, a recursive inner coder and a mapping element. The outer coder receives data to be coded and produces outer coded data. The interleaver permutes the outer coded data to pro... | 08/03/2010 |
| 7770092 | Method for iterative decoding in a digital system and apparatus implementing the method In a digital system using a turbo code, a method for performing iterative decoding in accordance with a Log-MAP Algorithm comprises the steps of:—generating a look-up table comprising a plurality of values representative of a correcting factor;—performing a firs... | 08/03/2010 |
| 7721187 | ACS (add compare select) implementation for radix-4 SOVA (soft-output viterbi algorithm) ACS (Add Compare Select) implementation for radix-4 SOVA (Soft-Output Viterbi Algorithm). Two trellis stages are processed simultaneously and in parallel with one another (e.g., during a single clock cycle) thereby significantly increasing data throughput. During ea... | 05/18/2010 |
| 7716564 | Register exchange network for radix-4 SOVA (Soft-Output Viterbi Algorithm) Register exchange network for radix-4 SOVA (Soft-Output Viterbi Algorithm). Two trellis stages are processed simultaneously and in parallel with one another (e.g., during a single clock cycle) thereby significantly increasing data throughput. Any one or more modules... | 05/11/2010 |
| 7661059 | High performance turbo and Viterbi channel decoding in digital signal processors A digital signal processor performs turbo and Virterbi channel decoding in wireless systems. The computation block of the digital signal processor is provided with an accelerator for executing instructions associated with trellis computations. An ACS instruction per... | 02/09/2010 |
| 7620882 | Decoder and decoding method for decoding a code by selecting a path out of paths in a trellis diagram A decoder decodes a code by selecting, based on a predetermined condition, a path out of paths representing a transition of each of states in a trellis diagram. A storing unit stores, when a path at time k is selected, information on a selection history of a path se... | 11/17/2009 |
| 7620881 | System and method for communicating data using iterative equalizing and decoding and recursive inner code A system and method for communicating data includes an inner encoder for encoding data with the recursive inner rate one code. A modulator coherently modulates a communications signal that carries the data that has been encoded. An interleaver is operative with the ... | 11/17/2009 |
| 7603611 | Maximum likelihood decoding device, signal evaluating method, and reproducing apparatus The invention relates to a maximum likelihood decoding device that performs Partial Response Maximum Likelihood decoding on a reproduced data signal from a recording media or another source. The device includes a Viterbi detector that performs bit detection from the... | 10/13/2009 |
| 7603612 | System and method for communicating data using iterative equalizing and decoding and recursive inner code A system and method for communicating data includes an inner encoder for encoding data with the recursive inner rate one code. A modulator coherently modulates a communications signal that carries the data that has been encoded. An interleaver is operative with the ... | 10/13/2009 |
| 7600179 | Sparse maximum likelihood decoder for block codes A method is provided to decode data encoded by any block code in a manner that substantially improves the error correction capability of the block codes, and that is independent of the encoder. The structure associated with the method desirably allows the testing of... | 10/06/2009 |
| 7594161 | Map decoding A method of approximating the generation of a logarithm of a sum of exponents, for use in a log-MAP decoding operation, by performing a first operation on the data, calculating a correction term in a second operation, and adding the correction term to the results of... | 09/22/2009 |
| 7590926 | Decoding apparatus, decoding method, program-recording medium, program and recording/reproduction apparatus Disclosed is a decoding apparatus for decoding an encoded signal on the basis of a plurality of state-transition trellises having differing state counts. The decoding apparatus includes a decoding section for decoding the encoded signal on the basis of a first state... | 09/15/2009 |
| 7587659 | Efficient front end memory arrangement to support parallel bit node and check node processing in LDPC (Low Density Parity Check) decoders Efficient front end memory arrangement to support parallel bit node and check node processing in LDPC (Low Density Parity Check) decoders. A novel approach is presented by which the front end design of device capable to decode LDPC coded signals facilitates parallel... | 09/08/2009 |
