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Vehicular Impact Signaling Device
An apparatus for the deployment of a visible plume to alert other motorists that a proximate motor vehicle has been involved in a collision.
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| Number | Title | Issue Date |
| 4644539 | Circuit arrangement capable of prohibiting an access to a part of a control memory on occurrence of an error in the part In a circuit arrangement responsive to an address signal related to a main memory for reading each microinstruction out of a control memory with each microinstruction subjected to error detection, the control memory is divided into a plurality of compartm... | 02/17/1987 |
| 4644541 | Diagnostic test for programmable device in a mailing machine Diagnostic test method and apparatus for testing the contents of a programmable device in a mailing machine. Upon initiation of the test sequence, each bit of the mailing machine programmable device under test is added in an accumulator and the resulting ... | 02/17/1987 |
| 4641310 | Data processing system in which unreliable words in the memory are replaced by an unreliability indicator A data processing system comprising a memory receives data in the form of data blocks. Such a data block contains at least one data word and check bits. On the basis of the check bits it is vertified whether the data block contains reliable or unreliable ... | 02/03/1987 |
| 4621323 | Message transmission circuitry The present invention provides parity error detection circuitry to effect an automatic second transmission of the data information signals in the event that a first transmission of said data information signals is determined to have a parity error. The in... | 11/04/1986 |
| 4616335 | Apparatus for suspending a system clock when an initial error occurs An apparatus disposed within a computer system is disclosed for sensing the existence of an error occurring within a computer system and for suspending an internal system clock when a certain number of clock pulses are generated following the occurrence o... | 10/07/1986 |
| 4604749 | Semiconductor memory YA semiconductor memory is provided with memory cells for storing a plurality of sets of data, each of the sets having check bits. A selecting circuit selects some of the memory cells to form a set in response to a first address signal. The circuit includ... | 08/05/1986 |
| 4594685 | Watchdog timer The invention provides apparatus and method to verify appropriate program execution. Hardware external to a processor includes a resettable timer and a shift register for storing and shifting a bit pattern. Internally of the processor a bit pattern is als... | 06/10/1986 |
| 4584663 | Apparatus for power-on data integrity check of inputted characters stored in volatile memory A memory data coincidence device includes a volatile read write memory connected to a main power source and auxiliary backup power source, and a keyboard for supplying data to the read write memory. The device further includes a read only memory for stori... | 04/22/1986 |
| 4571677 | Tracing system A tracing system for confirming an instruction which is executed by a central processing unit in accordance with an address of each instruction is provided with an AND gate for controlling such signal indicating coincidence between the address and trace a... | 02/18/1986 |
| 4562576 | Data storage apparatus Data storage apparatus consisting of an array of RAM chips, with Hamming code checking for detecting double-bit errors. Address signals are fanned-out to the chips by way of driver circuits. Each driver circuit distributes an address bit to only two colum... | 12/31/1985 |
| 4556958 | Device for single line bidirectional data transmission between an intelligent card's microprocessor and a second processor Each section includes a data processing unit (1) provided with circuitry (7) for transmitting processed data to the other station, as well as circuitry (7) and (2) for reception of the data processed by the other station. The transmission occurs between t... | 12/03/1985 |
| 4553200 | Modular output driver for vital processor systems As a component in a vital processing system, the vital driver includes hardware and software elements that enable it to produce a time sensitive output in response to receipt, on a batch basis, of check words. The number, content and rate of the check wor... | 11/12/1985 |
| 4530050 | Central processing unit for executing instructions of variable length having end information for operand specifiers A central processing unit for executing instructions of variable length in which an operand specifier for specifying the addressing mode of an operand is independent of an operation code for ascertaining the kind of an operation and the number of operands... | 07/16/1985 |
| 4516202 | Interface control system for high speed processing based on comparison of sampled data values to expected values An interface control system between a plurality of devices, such as a channel and an I/O device, includes sampling means for high speed sampling input control signals on an interface, a compare circuit for comparing a current sampled value sampled by the ... | 05/07/1985 |
| 4500953 | Data transfer abnormality processing system A data processing system including a data transfer abnormality processing unit in which delays caused by the production of a data transfer abnormality signal during a data transfer cycle period are eliminated. A bus controller, a memory unit and one more ... | 02/19/1985 |
| 4495595 | Method and system of loop transmission In a loop transmission system utilizing specific patterns, a specified station for sending the specific patterns sends a specific pattern S or a specific frame S' which is not delayed in each station in advance of sending a specific pattern G used for dat... | 01/22/1985 |
| 4471486 | Vital communication system for transmitting multiple messages A vital communication system includes a conventional, that is non-vital, communication link, a transmitter and a receiver. The transmitter is responsive to input data, and provides for encoding and transmission as well as checking of its own input arrange... | 09/11/1984 |
| 4460996 | Process and apparatus for error detection A process for the prevention of the propagation of errors in a security processor having processing circuits which carry out arithmetic and logic operations on given operands, and detection devices for detecting single definite breakdowns occurring in the... | 07/17/1984 |
| 4438512 | Method and apparatus for verifying storage apparatus addressing In a data storage system employing sequential data transfers for blocks of data bytes, an address offset is induced in the addressing mechanism such that each block transfer requires loading the address mechanism with an address of a block to be accessed.... | 03/20/1984 |
| 4396995 | Adapter for interfacing between two buses An asynchronous interface adapter for interfacing two bidirectional data buses. Data transfer between buses may occur simultaneously with provision made for storing bus data from a first bus until a receiver on the second bus is available. The adapter pro... | 08/02/1983 |
| 4390989 | Method and an arrangement for supervising faults when transmitting data between computers Arrangement in data transmission between a transmitting computer, sending signal words containing start-stop information, message words and address-control signal information, and a receiving computer, for providing separate supervision of faults on the t... | 06/28/1983 |
| 4369510 | Soft error rewrite control system Refresh and initialize counter circuits included within a dynamic memory system are supplemented with additional counter control circuits for synchronizing them from the same timing source which drives the refresh and initialize counter circuits. The coun... | 01/18/1983 |
| 4347581 | Input setting method for digital operational devices An input setting method for a protective relaying apparatus including an input setting switch for setting data, a digital operational device for carrying out a relaying operation utilizing the data, and a memory device for storing the data, the method com... | 08/31/1982 |
| 4328583 | Data bus fault detector An error detection circuit detects prolonged sequences of unchanged logic state in a data busing structure. The circuit generates a complementary two rail logic output from a pair of flip-flops. The circuit includes a comparator which compares the logic s... | 05/04/1982 |
| 4323966 | Operations controller for a fault-tolerant multiple computer system An operations controller for each computer in a multiple computer system is disclosed. Each operations controller controls the operations of its associated computer, so that all of the computers cooperate to perform system functions in a fault-tolerant ma... | 04/06/1982 |
| 4322847 | Automatic indirect testing to verify operational control System and method for determining whether a first operation is responsive to a controller. A second operation, whose successful functioning depends on the successful functioning of the first operation and which produces a sensible result, is initiated whi... | 03/30/1982 |
| 4314329 | Method and apparatus for using a computer numerical control to control a machine cycle of operation A computer control is utilized to exclusively control the cycles of operation of a machine. The computer control contains a memory for storing a part program defining a number of independent machine processes. Each machine process is defined by a series o... | 02/02/1982 |
| 4312068 | Parallel generation of serial cyclic redundancy check A method and apparatus for assuring the accuracy of data received by any device in a computer system from any other device in the same computer system or from another computer system. The existing hardware of a computer system is utilized to generate a cy... | 01/19/1982 |
| 4308579 | Multiprocessor parcel postage metering system having serial data bus A multiprocessor parcel postage metering system includes a system processor to which a scale subsystem processor, a postage printing subsystem processor and a peripherals subsystem processor may be connected. The processors share a common data bus over wh... | 12/29/1981 |
| 4295208 | Signalling system including apparatus for generating and testing data and command words within first and second message intervals Apparatus for a signalling system, includes a microprocessor operative to process data words and command words within first and second message intervals. During the first message interval, the microprocessor operates to generate and apply data words in su... | 10/13/1981 |
| 4257098 | Computer to recording medium interface A central computer is utilized to control a recording medium while a peripheral computer is utilized to supply data to the recording medium for recording on magnetic tape. Method and apparatus is provided whereby an error indication is provided to the cen... | 03/17/1981 |
| 4253141 | Programmable sequence controller with counting function A programmable sequence controller with a counting function comprises an addressable latch circuit including at least one flip flop. A counter is connected to the flip flop such that the content of the counter is changed by one each time the flip flop is ... | 02/24/1981 |
| 4231089 | Data processing system with apparatus for correcting microinstruction errors In a data processing system, a method and apparatus which enable an erroneous microinstruction word to be rewritten before it is executed. After the microinstruction word is written from memory into a control register, a parity network coupled to the cont... | 10/28/1980 |
| 4183459 | Tester for microprocessor-based systems An automatic test apparatus coupled to a bit-directional internal data and control bus of a programmed microprocessor-based system tests the performance of the system in real time. Signal responses of the bus within a known good system are compared in rea... | 01/15/1980 |
| 4167786 | Load control processor A load control processor, for a programmable energy load controller system, includes a receiver-decoder section, a power supply section and a load switching section. The receiver-decoder section includes means for receiving an incoming data transmission e... | 09/11/1979 |
| 4118790 | Data processing equipment Data processing equipment suitable for recording details of manually connected telephone calls has a plurality of operator stations with keyboards and VDU's connected in groups to operator's control units which respond to keyed instructions to obtain data... | 10/03/1978 |
| 4070648 | Computer to computer communication system A computer to computer data communication system for minimizing software protocol is disclosed wherein transmitted errors in data transmitted from one computer to another are detected when they occur by means of a bit-by-bit data echo transmission techniq... | 01/24/1978 |
| 4032757 | Control apparatus Control apparatus for controlling an aircraft gas-turbine engine, having two control lanes operated in parallel with one another and each of which is capable of performing the function of the control apparatus individually, includes a computer and a monit... | 06/28/1977 |
| 3995258 | Data processing system having a data integrity technique A data processing system includes a plurality of units coupled to transfer information over a common bus having an address portion and a data portion. The use of parity bits is made unnecessary by use of both the address and data portion to essentially tr... | 11/30/1976 |
| 3931505 | Program controlled data processor A program controlled data processing system which includes two data manipulation units generally operated in parallel. The two data manipulation units, however, by design react differently in the execution of certain program order words. The system includ... | 01/06/1976 |
