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| Number | Title | Issue Date |
| 4710866 | Method and apparatus for validating prefetched instruction A method and data processing system for validating prefetch instruction. The system includes an instruction unit, an n-stage pipeline which provides data segments representing instruction words from a memory to the instruction unit. The system further inc... | 12/01/1987 |
| 4698785 | Method and apparatus for detecting control system data processing errors A digital-based control data processing system detects during system operation the occurrence of data processing errors. Data processing accuracy is verified by receiving output information developed from system input information in accordance with a firs... | 10/06/1987 |
| 4696003 | System for testing interactive software A method for testing host resident interactive software. The host resident interactive software is first executed while an interactive test case if captured. The test case is then executed on another version of the interactive software. The differences be... | 09/22/1987 |
| 4694420 | Inverse assembly method and apparatus An inverse assembly method for converting binary executable microprocessor code into corresponding assembly language mnemonics provides for the storage of all the possible binary codes and corresponding assembly language mnemonics in a plurality of tables... | 09/15/1987 |
| 4683532 | Real-time software monitor and write protect controller Verification of proper operation of computer programs executing in a central processor and protection of critical data is accomplished by an independent software monitor which accepts data keys from the executing program and outputs defined legitimate cod... | 07/28/1987 |
| 4670838 | Single chip microcomputer capable of debugging an external program without an increase of the number of terminals/ports A single chip microcomputer responsive to internal and external instructions in normal and debug modes, respectively, comprises a program counter and first, second, third, and fourth port groups in both of the normal and the debug modes. The first through... | 06/02/1987 |
| 4656631 | Process and circuit arrangement for checking a program in data processing units In checking a program in data processing units, the working memory, before the completion of the program, has written into it information to which respectively a false parity signal is assigned. In this way program mistakes in the program to be checked, w... | 04/07/1987 |
| 4598364 | Efficient trace method adaptable to multiprocessors The disclosure describes a separate trace table for each CPU in an MP to avoid inter-CPU interference in making trace table entries for explicit and implicit tracing instructions enabled by flag bits in a control register (CR). Explicit tracing entries ar... | 07/01/1986 |
| 4595981 | Method of testing interfaces between computer program modules A method of testing interfaces between computer program modules. The individual cause/effect charts of each of the modules are used to test the interfaces between the modules by executing the test cases in the charts in such manner that each test case nee... | 06/17/1986 |
| 4517671 | Apparatus for operational analysis of computers An apparatus for operational analysis of computing devices which, when coupled to the address, data, and control buses of a computer, displays a representation of a selectable subgroup of the bus signals on a bit map display for each occurrence of a selec... | 05/14/1985 |
| 4491914 | Initial program load system This invention provides an initial program load system wherein, even when one IPL device has gone wrong, other IPL devices are automatically operated in succession instead of the faulty IPL device, whereby the automatic restoration of a whole system inclu... | 01/01/1985 |
| 4453093 | Multiple comparison circuitry for providing a software error trace signal Apparatus and method for performing a logical not function in a multi-compare environment is disclosed. By performing two equivalence compares of a measured variable against selectable target values and using the result of the equivalence compares to sele... | 06/05/1984 |
| 4437184 | Method of testing a data communication system A method of testing the implementation of a communication system definition by constructing a model of the communication system definition in a high level computing language such as PL/1; compiling the model and producing an executable machine language pr... | 03/13/1984 |
| 4429368 | Microprogram-testing apparatus An electronic computer is disclosed which includes microprogram memory in which a microinstruction is stored, a microaddress control unit for supplying an address to said memory and a register for holding a microinstruction read out of said microprogram m... | 01/31/1984 |
| 4314328 | Information extractor for the selective visualization of data stored in a monitoring memory Data pertaining to the operation of a signal-processing system are written in zones of a central read/write memory which are either permanently or temporarily allocated to respective peripheral units to be monitored and which are each divided into a plura... | 02/02/1982 |
| 4275441 | Microprogram control system for microprogram debugging In a microprogram control system of the type comprising an electronic computer having a programmable interruption control unit and a debugging microprogram executed during interruption which permits single step execution of a user's microprogram. When an ... | 06/23/1981 |
| 4237533 | Preventing initial program load failures Means are provided to prevent the failure of an Initial Program Load (IPL) command in a data processing system because of a "busy" indication from a Direct Access Storage Device (DASD) control device which is executing the command. An IPL operation from a... | 12/02/1980 |
| 4118789 | Program protection module for programmable controller A program protection module for a programmable controller checks the critical, or protected, portion of the control program each time the controller is switched to the run mode. This is accomplished by reading each control program instruction out of the c... | 10/03/1978 |
| 4099230 | High level control processor A method and means for implementing the control structure of a computer comprising, for example the basic constructs of repetition, conditional execution, and nesting whereby, at any point, a machine language program can be decompiled into the English lan... | 07/04/1978 |
| 4095270 | Method of implementing manual operations A method for performing manual operations, such as address compare equal stop, single cycle alter, etc., in a time slice controlled microprocessor with microprogramming, which avoids stopping the processor clock when any of the programs requires a manual ... | 06/13/1978 |
