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| Number | Title | Issue Date |
| 6560721 | Testcase selection by the exclusion of disapproved, non-tested and defect testcases A testcase management system comprises a test suite including a plurality of testcases, wherein these testcases are cooperable with a test harness for executing a test run in which at least one of the testcases is executed on a system to be tested. A meth... | 05/06/2003 |
| 6553514 | Digital circuit verification A method of verifying a digital circuit in which state transition information is extracted from the output of a non-formal first verification technique. A formal verification tool is then applied to the extracted state transition information to extend the... | 04/22/2003 |
| 6549944 | Use of server access logs to generate scripts and scenarios for exercising and evaluating performance of web sites A visual Web site analysis program, implemented as a collection of software components, provides a variety of features for facilitating the analysis, management and load-testing of Web sites. A mapping component scans a Web site over a network connection ... | 04/15/2003 |
| 6530047 | System and method for communicating with an integrated circuit A system and method for communicating with an integrated circuit is provided that allows an integrated circuit to communicate debugging information and system bus transaction information with an external system. The system may include an interface protoco... | 03/04/2003 |
| 6507842 | System and method for importing and exporting test executive values from or to a database A system and method for importing and exporting test executive values from or to a database. A test executive may provide the user various places, referred to as variables and properties, in which data values can be stored. These data values may affect ex... | 01/14/2003 |
| 6493841 | Method and apparatus for determining expected values during circuit design verification Hardware Verification Languages (HVLs) permit the convenient modeling of the environment for a device under test (DUT). HVLs permit the DUT to be tested by stimulating certain inputs of the DUT and monitoring the resulting states of the DUT. The present i... | 12/10/2002 |
| 6463552 | Scripting method and apparatus for testing devices A testing system includes a controller, a device driver for the controller, and a processor. The controller is operable to control a device coupled thereto. The device driver is operable to provide a generic interface for data transfers to and from the co... | 10/08/2002 |
| 6457152 | Device and method for testing a device through resolution of data into atomic operations A method of testing a device includes monitoring an output of the device, wherein the output is generated by the device in response to an applied test command; and resolving the output into atomic operations, wherein the atomic operations are substantiall... | 09/24/2002 |
| 6449755 | Instruction signature and primary input and primary output extraction within an IEEE 1149.1 compliance checker A computerized method and system for automatically extracting an IEEE 1149.1 standard design from a netlist and performing compliance checking. The present invention receives the TAP (test access port) description and compliance enable ports of a netlist.... | 09/10/2002 |
| 6449744 | Flexible test environment for automatic test equipment A flexible test environment for automatic test equipment, whereby sequences of steps for developing and executing test programs are specified using hierarchical trees of nodes. The nodes in one tree include end leaves that correspond with the test program... | 09/10/2002 |
| 6442709 | System and method for simulating disaster situations on peer to peer remote copy machines The present invention relates to a method for testing the operability of a Peer to Peer Remote Copy (PPRC) data storage system in disaster situations. A PPRC data storage system includes a host processor, a primary storage subsystem and a secondary storag... | 08/27/2002 |
| 6438514 | Generation of a system model A computer is operated to generate electronic data defining a system model by loading into the computer a class definition defining instructions which are processed by the system, the definition including a set of functional methods to which the instructi... | 08/20/2002 |
| 6430705 | Method for utilizing virtual hardware descriptions to allow for multi-processor debugging in environments using varying processor revision levels A method and apparatus for concurrent testing of a plurality of microprocessors, each of which may have a different revision, by creating an abstract base class which specifies the names of a plurality of tests, creating a derived class for each revision ... | 08/06/2002 |
| 6421634 | Interface independent test system A system and method for circuitry design verification testing using a structure of interface independent classes to provide for rapid prototyping and design modification while maximizing test code re-use. A circuit simulation subsystem is interfaced with ... | 07/16/2002 |
| 6415396 | Automatic generation and maintenance of regression test cases from requirements An apparatus and method for generating and maintaining a regression test case set directly and automatically from requirements models. A user operating the invention generates a representation of a system which captures temporal, functional, life cycle or... | 07/02/2002 |
| 6401220 | Test executive system and method including step types for improved configurability A test executive program which provides greatly improved configurability and modularity, thus simplifying the creation, modification and execution of test sequences. The test executive program includes process models for improved flexibility, modularity a... | 06/04/2002 |
| 6393589 | Watchdog timer control circuit with permanent and programmable enablement A new control circuit for a watchdog timer which is incorporated on the same integrated circuit as a microprocessor or microcontroller. The control circuit permits either permanent or software enablement or disablement of the watchdog timer depending on t... | 05/21/2002 |
| 6393490 | Method and system for a programmatic feedback process for end-user support A method for supporting the end-user of a software application program is provided, wherein the end-user is provided the capability of communicating directly with the application program vendor and/or developer to request enhancement, provide comments, re... | 05/21/2002 |
| 6385741 | Method and apparatus for selecting test sequences A method and an apparatus for selecting test sequences that comprises preparing tree-structured state transition data associated with state transition weights from state transition data, extracting test sequences from the tree-structured state transition ... | 05/07/2002 |
| 6385740 | Method to dynamically change microprocessor test software to reflect different silicon revision levels A method and apparatus for testing one of a plurality of revisions of a microprocessor by creating an abstract base class which specifies the names of a plurality of tests or attributes, creating a derived class for each revision and defining each of the ... | 05/07/2002 |
| 6378088 | Automated test generator A test generator generates tests by randomly traversing a description of the interface of a program being tested, thereby generating tests that contain randomly selected actions and randomly generated data. When executed, these tests randomly manipulate t... | 04/23/2002 |
| 6370492 | Modified design representation for fast fault simulation of an integrated circuit A system and method perform a two-pass fault simulation on an original design representation including a software-modeled design element and a hardware-modeled design element. Logic simulation generates input stimulus for a port on the boundary of the sof... | 04/09/2002 |
| 6298452 | Hardware test coverage using inter-chip event filtering in multi-chip simulations A simulator simulates and verifies inter-chip functionality in a multi-chip computer system model. The chips within the multi-chip computer system model are characterized by a combination of detailed, low-level hardware models and generalized, high-level ... | 10/02/2001 |
| 6295612 | Method and system for independent monitoring of multiple control systems A method and system are provided for invoking and monitoring of tests executed by multiple, diverse control systems/algorithms on a main controller which allows a single monitor system to be used to monitor the test results without requiring the monitor s... | 09/25/2001 |
| 6279122 | Apparatus and method for self generating error simulation test data from production code A method and apparatus for automatically testing device drivers is disclosed. The invention is applicable to any system wherein software or a device driver receives primitive errors from a device and reports high level errors to a client. The invention ge... | 08/21/2001 |
| 6266787 | Method and apparatus for selecting stimulus locations during limited access circuit test A system that can test individual components having tolerances on a circuit board without complete access to every node on the board is disclosed. The system uses a method that develops test limits from a model of the board, component tolerances, and a li... | 07/24/2001 |
| 6247145 | Automated reliability and maintainability process The PC SEDS database system provides a flexible database system that can encompass any type of Reliability and Maintainability (R&M) evaluation, while accurately storing and characterizing the collected data. The PC SEDS database system includes interface... | 06/12/2001 |
| 6243833 | Apparatus and method for self generating error simulation test data from production code A method and apparatus for automatically testing device drivers is disclosed. The invention is applicable to any system wherein software or a device driver receives primitive errors from a device and reports high level errors to a client. The invention ge... | 06/05/2001 |
| 6243832 | Network access server testing system and methodology A network access test system includes a test computer system having a modem bank coupled to a network access server via a telephone switch. The network access server is coupled to one or more host computer systems, preferably over a local area network. Th... | 06/05/2001 |
| 6243835 | Test specification generation system and storage medium storing a test specification generation program A test specification generation system which utilizes a repository of design information entered in a design process so as to enhance operational efficiency of a testing process. A data analysis device reads statements written in the test configuration fi... | 06/05/2001 |
| 6240529 | Debugging method and debugging apparatus for microcomputer system and recording medium on which debug program is recorded If an event set in advance is detected by state storage event detection unit 119 when an instruction is executed, then this is reported from state storage event occurrence reporting unit 120 to state storage unit 116, by which state storage file 118 is pr... | 05/29/2001 |
| 6237112 | SCSI device available for breakdown prediction and self-examination and a method thereof A SCSI device available for breakdown prediction and self-examination or a breakdown prediction and self-examination method by this device which increases the overall system performance through reducing the loading of a master I2C processor and SCSI bus, ... | 05/22/2001 |
| 6233673 | In-circuit emulator with internal trace memory An in-circuit emulator (ICE) including an internal trace memory and a bit-width converter. The internal trace memory is embedded in an ICE CPU to trace CPU internal signals fed from a CPU core that executes the same operations as a CPU of a debugged syste... | 05/15/2001 |
| 6233701 | Method and apparatus for test program execution control, and a computer-readable recording medium with a program for making a computer execute the method recorded therein A test program execution control apparatus, in which an operation of testing is started according to controls by a test program execution control section, a period of editing data for test results to a test editing section is specified by an editing perio... | 05/15/2001 |
| 6226760 | Method and apparatus for detecting faults A fault diagnostic apparatus for the recognition of defective components of a technical system with fault-relevant process variables contains a diagnostic module which has a checklist and a table of predetermined conditions (in memory). The conditions are... | 05/01/2001 |
| 6219805 | Method and system for dynamic risk assessment of software systems A method and system for assessing risks associated with software systems include the steps of dynamically retrieving, from a plurality of external database systems, a set of risk factor data associated with the components of the software systems, and dete... | 04/17/2001 |
| 6212493 | Profile directed simulation used to target time-critical crossproducts during random vector testing A technique for verification of a complex integrated circuit design, such as a microprocessor, using a randomly generated test program to simulate internal events and to determine the timing of external events. The simulation proceeds in two passes. Durin... | 04/03/2001 |
| 6205559 | Method and apparatus for diagnosing failure occurrence position In a failure diagnosing apparatus for a semiconductor integrated circuit device as a semiconductor integrated circuit device (106), an operation of a semiconductor integrated circuit device is simulated using a set of test vectors to produce a simulation ... | 03/20/2001 |
| 6195765 | System and method for testing an application program A system (8) for testing an application program (20) includes a normal operating environment (12) within which the application program (20) is intended to execute when not being tested. A shared database (18) stores the application program (20) and provid... | 02/27/2001 |
| 6167352 | Model-based diagnostic system with automated procedures for next test selection A model-based diagnostic system that enables selection of components for replacement and selection of the next test to apply to a device under test based on economic costs associated with replacing components and conducting tests.... | 12/26/2000 |
