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| Number | Title | Issue Date |
| 8161329 | Generating random sequences based on stochastic generative model having multiple random variates Random sequences are generated based on a stochastic generative model having multiple random variates. Inputs representative of the stochastic generative model are received. The inputs include a first random variate having a finite set of alphabets, a second random ... | 04/17/2012 |
| 8132053 | System and method for grammar based test planning The present disclosure generally relates to the testing of a system that includes software or hardware components. In some embodiments, a testing framework generates a set of test cases for a system under test using a grammar. Each test case may perform an action, s... | 03/06/2012 |
| 8132052 | System and method for locating a fault on a device under test System and method for analyzing operation of a device under test (DUT). In one embodiment, a reference component associated with a reference device may be received. The reference device may be in communication with the DUT and a component associated with the DUT can... | 03/06/2012 |
| 8042000 | Apparatus, system, and method for validating application server replication errors An apparatus, system, and method are disclosed for validating application server replication errors. The method includes receiving a first information message with a test sequence from a caller. The caller is engaged in a communication session with a callee accordin... | 10/18/2011 |
| 8032790 | Testing of a system logging facility using randomized input and iteratively changed log parameters A method and computer program product for testing a system logger. Randomized input is provided into a logging facility and automated testing of the logging facility is performed in a multi-processing environment. Self-verification of data retrieved from the logging... | 10/04/2011 |
| 8010843 | System and method for debugging a target computer using SMBus Methods and systems for debugging a software program, such as BIOS is provided. The methods and systems make use of a debugger application executing on a host computer and configured to communicate with a debugger module executing on a target computer via serial/par... | 08/30/2011 |
| 7987389 | System and method for testing sleep and wake functions of computer A system for testing sleep and wake functions of a computer includes a test device and a test software installed on a motherboard of the computer. The test device includes a timing module, a counting module, and a switch module. The test software includes an initial... | 07/26/2011 |
| 7917809 | BIOS test system and test method thereof A basic input output system (BIOS) test system includes a protocol conversion module and a computer. The protocol conversion module is connected to a tested device. The computer is connected to the protocol conversion module. The computer controls the protocol conve... | 03/29/2011 |
| 7877638 | Apparatus and method for testing computer An apparatus for testing a computer includes a control module having a power cycling test program and a display driving program therein, a switch module connected to the control module for receiving trigger signals generated from the power cycling test program and p... | 01/25/2011 |
| 7836343 | Method and apparatus for reducing test case generation time in processor testing A method, apparatus and computer program product are provided for use in a system that includes one or more processors, and multiple threads that are respectively associated with the one or more processors. One embodiment of the invention is directed to a method tha... | 11/16/2010 |
| 7823018 | Methods, systems and computer program products for CPU signaturing to aide in performance analysis Methods, systems and computer program products for CPU signaturing to aide in performance analysis. Exemplary embodiments include a performance analysis method including identifying a workload having one or more testcases, assigning a CPU signature to each of the on... | 10/26/2010 |
| 7814370 | Wake on LAN (WOL) test system and method thereof The invention presents a Wake On LAN (WOL) test system and method thereof, wherein the system is applied for a client/server structure with the ILO (Integrated Lights-Out) inside server platform. The system is composed of an examiner end, an examinee end and a netwo... | 10/12/2010 |
| 7757124 | Method and system for automatic correlation of asynchronous errors and stimuli A test and system state recorder (TSSR) controller of a test and system state recorder automatically correlates and captures information about possible stimuli from telemetry information events generated by a test or tests of a test system. The TSSR controller simul... | 07/13/2010 |
| 7689866 | Method and apparatus for injecting transient hardware faults for software testing The invention includes a method and apparatus for injecting dynamic faults in a circuit device. The apparatus includes a first register adapted with selection data identifying selected ones of a plurality of outputs of the circuit device and/or selected ones of a pl... | 03/30/2010 |
| 7685468 | Method and system for test case generation A method and apparatus is described for generating a test case for an application or system modelled using a Stochastic Automata Network model. The method contemplates the inclusion of a plurality of automata and including the steps of: (a) setting an initial global... | 03/23/2010 |
| 7636871 | Method for comparing customer and test load data with comparative functional coverage hole analysis One aspect of the present invention includes performance of a comparative functional coverage technique for comparing analysis of actual operational load data, such as customer data, with test operational load data. In one embodiment, coverage and holes analysis ope... | 12/22/2009 |
| 7568127 | Signal drive de-emphasis control for serial bus Transmitting a transition between high and low states across a lengthy conductor with a main transmitter to transmit data, providing emphasis with an emphasis transmitter to strengthen the transmission of the transition, transmitting a low-to-high transition to test... | 07/28/2009 |
| 7543185 | Debug system with event-based virtual processing agents Some aspects provide determination of a debug event, selection of a controller context based on the determined debug event, and execution of the selected controller context. The debug event may be associated with a microprocessor, and the controller context may be s... | 06/02/2009 |
| 7543184 | System and method for distributing system tests in parallel computing environments A mechanism for the distribution of a test vector for a system test to a parallel computing environment is discussed. A test vector which controls the parameterization of a system test being conducted is provided as an input parameter to a function. In one implement... | 06/02/2009 |
| 7519864 | Automation test systems An automated testing system is provided that includes a computer system, a handset, script and scripting interface, a test module, and a data comparison component. The handset has at least one application resident thereon to be tested. The handset is coupled to comm... | 04/14/2009 |
| 7500148 | Test apparatus and testing method There is provided a testing apparatus that tests a device under test. The testing apparatus includes: a command executing unit operable to sequentially execute commands included in a test program for the device under test every command cycle; a test pattern memory o... | 03/03/2009 |
| 7457987 | Test vector manager, method of managing test vectors and a test tool employing the manager and the method The present invention provides a test vector manager for use with a unit under test (UUT). In one embodiment, the test vector manager includes a gateway device, coupled to the UUT, configured to provide a testing pathway for the UUT to coordinate test requests and r... | 11/25/2008 |
| 7451350 | Object oriented scaleable test executive The present invention provides for a test system having a test executive software system for performing tests on units under test. The test executive software system includes a test kernel component that provides control through a generic interface to the test execu... | 11/11/2008 |
| 7444558 | Programmable measurement mode for a serial point to point link A serial point to point link that communicatively couples an integrated circuit (IC) device to another IC device is initialized by transferring a training sequence of symbols over the link. Registers of the IC device are programmed, to set a symbol data pattern and ... | 10/28/2008 |
| 7425896 | Tag testing device, tag testing method, and tag testing program A tag testing device uses an infrared camera to take an image of a plurality of radio frequency identification tags, compares the image with a stored standard tag pattern image storage, and detects defective tags based on the comparison. A radio wave transceiver bul... | 09/16/2008 |
| 7401259 | System and method for scenario generation in a distributed system A system and method may emulate scenarios for testing a distributed system. The distributed system may include a plurality of nodes, each having one or more resources. The system may include a resource driver for each type of the one or more resources in the distrib... | 07/15/2008 |
| 7386763 | Proactive systemic scheduler for resource limited test systems An apparatus having a proactive systemic scheduler connected with a network testing system. The scheduler receives a list of tests to be run on the network test system during a testing interval, as well as available test baseline information for the tests to be run.... | 06/10/2008 |
| 7373577 | CAN system Provided is a CAN system that can generate an error signal without requiring hardware for generating an error signal to be connected to a bus. A protocol processing part within a CAN controller incorporates error data into receive data or send data, based on error d... | 05/13/2008 |
| 7366951 | Method and apparatus for test program generation based on an instruction set description of a processor A method and apparatus for generating processor test programs using a formal description of the processor's instruction set. An instruction set for a processor is formally described using a language such as ISDL. The formal description of the instruction set identif... | 04/29/2008 |
| 7366957 | Method and apparatus for controlling SAS/fibre target behavior from a host The present invention is a method and system for providing a complete validation of an initiator and target within bus architecture. A target's behavior may be controlled by an initiator. Control of the target may be through execution of initiator commands including... | 04/29/2008 |
| 7360119 | Method and apparatus for handling SAS/SATA communication deadlock Broadly speaking, a method and apparatus is provided for identifying and responding to a deadlock condition in a SAS/SATA communication process. More specifically, an initiator device involved in the SAS/SATA communication process is defined to recognize a received ... | 04/15/2008 |
| 7356738 | Electronic apparatus having improved diagnostic interface Electronic apparatus, such as a personal computer, is described comprising main operative functionality and a power provisioning system for powering the apparatus from an external power source, the power provisioning system comprising:—a main power supply output f... | 04/08/2008 |
| 7356424 | Diagnostic compiler for pipeline analog-to-digital converter, method of compiling and test system employing the same The present invention is directed to a diagnostic compiler for use with a pipeline analog-to-digital converter (ADC) having code sequences corresponding to stages thereof. In one embodiment, the diagnostic compiler includes a transition locator configured to determi... | 04/08/2008 |
| 7352486 | Printer The printer includes a CPU, a bridge image processing unit, a RAM, a ROM, a supply power control unit, a printing unit, a communication I/F, and physical layer I/Fs. When the Ethernet is connected to the communication I/F, if the DMA transfer request signal is not o... | 04/01/2008 |
| 7353474 | System and method for accessing signals of a user design in a programmable logic device Access to a signals of a user design in a programmable logic device (PLD) is provided without a compilation delay following selection of the signals. The system may include a generator, a compiler, a selector, the PLD, and a monitor. The generator selects sets of si... | 04/01/2008 |
| 7353430 | Device for validating an integrated circuit A device (10) for validating a circuit (1) comprising at least one microprocessor (3) and a specialized unit (2) provided with registers includes a base (11) for receiving the circuit, a memory (4, 5) simulating an external ... | 04/01/2008 |
| 7350185 | System, method, and computer program product for effort estimation A system and method for establishing an estimate for proposals and other customer requests which precludes an extensive up front investment in expert opinion and design. This is accomplished by applying a pattern-based technique toward rough application effort sizin... | 03/25/2008 |
| 7343395 | Facilitating resource access using prioritized multicast responses to a discovery request Systems and methods are provided to facilitate resource access using prioritized multicast responses to a discovery request. ... | 03/11/2008 |
| 7343558 | Configurable automatic-test-equipment system A method and system for measuring a device under test includes connecting a first test instrument and a second test instrument to a programmable logic device. The programmable logic device is configured to comply with interface specifications of the first test instr... | 03/11/2008 |
| 7333289 | Magnetic recording and reproducing apparatus, method of controlling the same, magnetic recording medium, and stamper for manufacturing magnetic recording medium A magnetic recording and reproducing apparatus and a method of controlling the same, capable of increasing the output of a position control signal and performing a precise positioning control of a magnetic head. The magnetic recording and reproducing apparatus has: ... | 02/19/2008 |
