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Pizza Pie With Concentric Rings of Crust
A pizza mold for forming a plurality of concentric raised ridges of dough (i.e., crust) on the surface of a pizza pie.
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| Number | Title | Issue Date |
| 8181067 | Apparatus and method for test and debug of a processor/core having advanced power management An interface unit is provided in a JTAG test and debug procedure involving a plurality of processor cores. The interface unit includes a TAP unit. A switch unit is coupled to the interface unit and switch units are coupled to each of the plurality of processor/cores... | 05/15/2012 |
| 8176365 | Computer apparatus and processor diagnostic method A computer apparatus includes a first processor, a second processor, and a main memory. The computer apparatus further includes a memory-diagnostic unit, a diagnostic-program loading unit, and a defective-function identifying unit. The memory-diagnostic unit causes ... | 05/08/2012 |
| 8122291 | Method and system of error logging Method and system of error logging. At least some of the illustrative embodiments are methods including detecting assertion of an error pin by a processor system, (comprising at least a main processor and a chipset, the assertion of the error pin an indication to re... | 02/21/2012 |
| 8112669 | Wireless diagnostic system Results of field testing of portions of a distributed system such as a Broadband Communications System from a testing device to a controller which downloads programmed test protocols and sequences thereof to the separate testing device over a wired or wireless link ... | 02/07/2012 |
| 8108730 | Debugging a multiprocessor system that switches between a locked mode and a split mode A data processing system 2 is provided with multiple processors 4, 6 which can operate in either a split-mode in which each processor executes its own program flow or a locked-mode in which the processors execute the same program flow. Debug circuitry ... | 01/31/2012 |
| 8103912 | Sequencer and test system including the sequencer A test system 100 that can accept a plurality of plug-in electronic cards in Xi Slots 126 or PXI slots 134 is described. The test or source measure switching system 100 includes a sequencer or sequence engine 130 which is fully cap... | 01/24/2012 |
| 8060783 | Distributed runtime diagnostics in hierarchical parallel environments A technique is disclosed for distributed runtime diagnostics in hierarchical parallel environments. In one embodiment, a user is allowed to configure, during runtime, a processing element on which to perform diagnostics, an algorithm for the processing element to ex... | 11/15/2011 |
| 8046638 | Testing of distributed systems In an embodiment, a method is provided for tracking a test. In this method, a test session identifier is transmitted to a test system. The test session identifier identifies a particular test session. A test of a component is triggered at the test system, and this t... | 10/25/2011 |
| 8037356 | System and method for validating channel transmission A system for validating communications between a plurality of processors is disclosed. The system includes a plurality of loop back paths, and each of the loop back paths is coupled to a corresponding one of the plurality of processors. In addition, each loop back p... | 10/11/2011 |
| 8032789 | Apparatus maintenance system and method An apparatus maintenance system and method are provided. The apparatus maintenance system includes an apparatus including a first control part, and a second control part connected to the first control part and a maintenance-data management server managing maintenanc... | 10/04/2011 |
| 7984332 | Distributed system checker A distributed system checker may check a distributed system against events to detect bugs in the distributed system. The events may include machines crashes, network partitions, and packet losses, for example. The distributed system checker may check a distributed s... | 07/19/2011 |
| 7958396 | Watchdog processors in multicore systems Systems and methods are provided for securing a multicore computer chip with a watchdog processor. In a system with a watchdog process and any number of other processors and components, the watchdog processor monitors bus communications between the second processor ... | 06/07/2011 |
| 7954007 | Detecting faulty CPU heat sink coupling during system power-up The present invention is directed to the detection of faulty CPU heat sink coupling during system power-up. A method in accordance with an embodiment of the present invention includes: monitoring a slope of a CPU temperature rise from initial system power-up; determ... | 05/31/2011 |
| 7882395 | Debug device for embedded systems and method thereof A debug device of embedded systems is provided. The embedded system includes an embedded processor for reading a bootloader from a flash memory through a data flash interface. The debug device includes a memory transmission interface, a dada storage module, a data c... | 02/01/2011 |
| 7877637 | Multicore abnormality monitoring device A monitoring side core has an input protection part including an access checking part and an address information storage part. Address information of a count RAM area and an access prohibiting mode to the address are stored in the address information storage part in... | 01/25/2011 |
| 7870430 | Method and apparatus for sharing debug resources A method includes providing an integrated circuit having a plurality of debug resources. The debug resources are usable exclusively for debug operations. The debug operations include operations directed by debug software executed by the integrated circuit and operat... | 01/11/2011 |
| 7865774 | Multiprocessor core dump retrieval In particular embodiments, a monitoring processor may receive an interrupt from status monitoring logic associated with a monitored processor that has experienced an error. Interrupt logic at the monitoring processor may interrupt the monitored processor to initiate... | 01/04/2011 |
| 7730354 | Control microcomputer verification device and vehicle-mounted control device The present invention offers an advanced control software verification technology, particularly, an assertion-based verification technology, by providing a control microcomputer verification device and vehicle-mounted control device that exhibit improved verificatio... | 06/01/2010 |
| 7702956 | Circuit for transferring test flag signals among multiple processors, the test flag signals being used by a test controller to generate test signals A system on chip processor, that is, a semiconductor integrated circuit in which a processor, a cache memory and the like are integrated into one chip, includes a test controller, and a trace memory. The test controller generates test control signals in response to ... | 04/20/2010 |
| 7603586 | Intelligent stationary power equipment and diagnostics Stationary power equipment including a sensing device configured to collect data associated with an operation of the equipment, and a data storage device configured for storing the collected data. Information derived from the collected data may be transmitted to a r... | 10/13/2009 |
| 7596719 | Microcontroller information extraction system and method A system for debugging a device under test may include a processor register with a program count and a debug program register that receives the program count upon execution of an instruction by a processor. In one implementation, a microcontroller under test by a de... | 09/29/2009 |
| 7577874 | Interactive debug system for multiprocessor array A debug network on a multiprocessor array includes communication channels, a master controller, and one or more individual debug units in communication with one or more of the processors. The master controller solicits information from the debug units by sending mes... | 08/18/2009 |
| 7558984 | Apparatus and method for test and debug of a processor/core having advanced power management An interface unit is provided in a JTAG test and debug procedure involving a plurality of processor cores. The interface unit includes a TAP unit. A switch unit is coupled to the interface unit and switch units are coupled to each of the plurality of processor/cores... | 07/07/2009 |
| 7529976 | Multiple subsystem error reporting To log errors of a plurality of subsystems, a master reporting tool provides a table identifying the subsystems and their interface protocol addresses with respect to a network. A subsystem reports errors, via the network, to the master reporting tool, and the repor... | 05/05/2009 |
| 7526679 | Apparatus for developing and verifying system-on-chip for internet phone Provided is an apparatus for developing and verifying a system-on-chip for an Internet phone. The object of the present invention is to provide the system-on-chip developing and verifying apparatus for the Internet phone, which can develop and verify the system-on-c... | 04/28/2009 |
| 7516363 | System and method for on-board diagnostics of memory modules A memory hub includes an on-board diagnostic engine through which diagnostic testing and evaluation of the memory system can be performed. The memory hub includes a link interface for receiving memory requests for access to memory devices of the memory system and a ... | 04/07/2009 |
| 7484123 | Micro telecommunications computing architecture, MicroTCA, test system and method A Micro Telecommunications Computing Architecture, MicroTCA, test system comprises an interconnect for communication between modules of the MicroTCA test system. A test controller module, such as a JTAG, Switch Module, is coupled to the interconnect and comprises an... | 01/27/2009 |
| 7484122 | Controlling timing of execution of test instruction by target computing device Controlling the timing of execution of test instructions by a target computing device is disclosed. A method initiates a test process at each target computing device. The method receives a process handle of the test process from each target computing device, as gene... | 01/27/2009 |
| 7478281 | System and methods for functional testing of embedded processor-based systems Functional testing of an embedded system is performed by a test control system that implements a peripheral emulation module to interface with an externally accessible port of the embedded system. The test control system implements a test generation processor that o... | 01/13/2009 |
| 7444546 | On-board diagnostic circuit for an integrated circuit An integrated circuit having a plurality of functional circuits interconnected via a functional bus is provided with a diagnostic bus-master circuit which uses bus transactions on the functional bus to perform diagnostic operations. These diagnostic operations can b... | 10/28/2008 |
| 7444573 | VLCT programmation/read protocol An integrated circuit with built-in self test enables internal data registers to be written to or read from via an external tester. In a command phase the programmable built-in self test unit receives a command, an address and a data transfer count. The address spec... | 10/28/2008 |
| 7444574 | Stimulus extraction and sequence generation for an electric device under test A method and system that utilizes a graphical interface that enables a user to select and capture building blocks of a Device Under Test (DUT) test scenario from a previously run test case or from multiple stimulation results. Each of these extracted building block ... | 10/28/2008 |
| 7437618 | Method in a processor for dynamically during runtime allocating memory for in-memory hardware tracing A method, apparatus, and computer program product are disclosed in a processor for dynamically, during runtime, allocating memory for in-memory hardware tracing. The processor is included within a data processing system. The processor includes multiple processing un... | 10/14/2008 |
| 7430688 | Network monitoring method and apparatus A network monitoring method and system reduces a load to a monitoring network without deteriorating accuracy of detecting a malfunction. A plurality of network constituent elements that constitute a communication network are connected to an operation system through ... | 09/30/2008 |
| 7424642 | Method for synchronization of a controller A system and method for reintegration of a redundant controller after occurrence of a fault is provided, comprising synchronizing outputs of a primary controller with outputs of secondary controllers. The controller is placed in a different mode of operation in whic... | 09/09/2008 |
| 7421384 | Semiconductor integrated circuit device and microcomputer development supporting device During software development, a multichip module is used which encloses a target chip and a development chip in one package. A CPU of the development chip fetches instructions from a flash memory in the chip to execute them, and accesses RAM and peripheral circuits i... | 09/02/2008 |
| 7418631 | Program-controlled unit A program-controlled unit has debug resources for monitoring the operations proceeding within the program-controlled unit. The program-controlled unit described is distinguished by the fact that the debug resources contain a CPU, and/or that a portion of the debug r... | 08/26/2008 |
| 7415700 | Runtime quality verification of execution units One embodiment disclosed relates to a method of compiling a program to be executed on a target microprocessor with multiple execution units of a same type. The method includes selecting one of the execution units for testing and scheduling the parallel execution of ... | 08/19/2008 |
| 7401259 | System and method for scenario generation in a distributed system A system and method may emulate scenarios for testing a distributed system. The distributed system may include a plurality of nodes, each having one or more resources. The system may include a resource driver for each type of the one or more resources in the distrib... | 07/15/2008 |
| 7401260 | Apparatus, system, and method for performing storage device maintenance An apparatus, system, and method are disclosed for performing a storage device maintenance operation. A management module receives a command through an interconnection module configured as a non-blocking switch. The management module performs a maintenance operation... | 07/15/2008 |
