Bizarre Patents
A Christmas stocking having illumination means associated therewith for signalling the arrival of Santa Claus.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 4965717 | Multiple processor system having shared memory with private-write capability A computer system in a fault-tolerant configuration employs multiple identical CPUs executing the same instruction stream, with multiple, identical memory modules in the address space of the CPUs storing duplicates of the same data. Memory references. The... | 10/23/1990 |
| 4964105 | Replacement switch A procedure for replacing an existing switch (62) with a greater-capacity replacement switch (12) in a communication system (10) is disclosed. The replacement switch (12) has redundant interconnect memories (40) that can store different interconnect maps.... | 10/16/1990 |
| 4939736 | Protection against loss or corruption of data upon switchover of a replicated system In a protection-switching arrangement, each optical output of replicated switching nodes (12,13) is connected to the input of an error detector (17,18) and of an optical delay line (19,20); their outputs are in turn connected to inputs of an optical AND g... | 07/03/1990 |
| 4933838 | Segmentable parallel bus for multiprocessor computer systems A multiprocessor system includes a segmentable parallel bus for dividing the multiprocessor system into several independent groups of processors. Each group of processors can access its segment of the segmentable parallel bus to carry on processing within... | 06/12/1990 |
| 4907232 | Fault-tolerant parallel processing system A fault tolerant processing system which includes a plurality of at least (3f+1) fault containment regions each including a plurality of processors and a network element connected to each of the processors and to the network elements of the other regions.... | 03/06/1990 |
| 4858233 | Redundancy scheme for multi-stage apparatus A multi-stage apparatus has an input which is coupled to an output by way of a plurality of first stages. The stages are sequentially coupled together to form a chain. A spare stage, which is substantially identical to at least a selected one of said firs... | 08/15/1989 |
| 4789985 | Document processing apparatus having fauet detection capabilities A document processing apparatus that utilizes a plurality of resources, such as CRT displays and printers, are provided. A control system can determine if a resource has a fault and can select an alternative resource if it is capable of providing a functi... | 12/06/1988 |
| 4774455 | Method for automatic guard selection in automatic test equipment During the testing of circuit boards with Automatic Test Equipment in some circuit configurations the performance of a component may not be as expected even though it is sound due to the influence of surrounding components. In such a situation guards may ... | 09/27/1988 |
| 4752927 | Synchronous changeover A synchronous changeover device detects both peak amplitude and pulse width, automatically switching between sets of signals without a noticeable glitch when a fault is detected. The signals of each set are peak detected and combined so that if any signal... | 06/21/1988 |
| 4722084 | Array reconfiguration apparatus and methods particularly adapted for use with very large scale integrated circuits An array reconfiguration apparatus is employed in large integrated circuits and large systems. The apparatus makes use of spare wires and/or computation elements which are incorporated in the array. The apparatus uses spare wires in place of defective wir... | 01/26/1988 |
| 4691317 | Feature deselect control The present invention is concerned with a method of deselecting the features of a xerographic printing machine to be able to continue operation of the machine even though a fault has been detected. In particular, the control isolates a detected malfunctio... | 09/01/1987 |
| 4644498 | Fault-tolerant real time clock Three hardware real time clock subcircuits are connected in a triple modular redundancy configuration to assure continued operation if one subcircuit fails. A power supply or processor failure will not cause a clock supplying other processors to fail. Out... | 02/17/1987 |
| 4633467 | Computer system fault recovery based on historical analysis A method of identifying faulty units in a computer-controlled system. The system units generate error reports in response to the detection of error conditions. When an error report is received, an initial list is generated containing probable fault weight... | 12/30/1986 |
| 4613959 | Zero power CMOS redundancy circuit A redundancy circuit that consumes no power before or after activation switches a pair of output nodes from a first set of complementary logic levels to an inverted set when it is activated by blowing a pair of fuses.... | 09/23/1986 |
| 4602349 | Digital polarity correlator A self-testing facility is provided for a correlator comprising a delaying shift register (DSR) whose stages are respectively associated with a set of channels each incorporating a coincidence detector (G1+G2) and an integrating counter (IC), and a furthe... | 07/22/1986 |
| 4590549 | Control system primarily responsive to signals from digital computers A system controlled by digital computers includes first and second dissimilar digital computers which are distinctly programmed to generate respective nominally identical control signals alternately. The computer alternately generates limiting values for ... | 05/20/1986 |
| 4583224 | Fault tolerable redundancy control A redundant control system in which three output signals from three equivalent signal processors are compared with each other to judge whether each of the output signals is normal or abnormal, an abnormal output signal thus determined is replaced by a set... | 04/15/1986 |
| 4575842 | Survivable local area network Enhanced availability and survivability of communications between geographically remote locations with a minimum of redundancy of transmission facilities and media is provided by a survivable bus network capable of providing continued interprocessor or ot... | 03/11/1986 |
| 4503535 | Apparatus for recovery from failures in a multiprocessing system A number of intelligent nodes (bus interface units-BIUs and memory control units-MCUs) are provided in a matrix composed of processor buses (105) with corresponding error-reporting and control lines (106); and memory buses (107) with corresponding error-r... | 03/05/1985 |
| 4376300 | Memory system employing mostly good memories A memory system is described which employs a plurality of "mostly good" memory chips. A redundant memory chip is used to store data designated to the defective locations in the mostly good memories. In one embodiment a PROM is programmed to recognize the ... | 03/08/1983 |
| 4365318 | Two speed recirculating memory system using partially good components A CCD recirculating memory system is disclosed in which "partially good" CCD memory chips and "all good" memory chips are mounted on memory cards. The defective portions of the partially good chips are in the same chip octants on the same card. The cards ... | 12/21/1982 |
| 4327437 | Reconfiguring redundancy management Input signals from sensor (S) in a redundancy management system are provided redundantly in parallel so that a primary control signal may be selected. Median value signals for groups of three sensors are detected in median value selectors (30, 32, 34, 36,... | 04/27/1982 |
| 4254477 | Reconfigurable memory circuit The disclosed device uses an interconnect switch for the selective coupling of serial memory elements in series with other memory elements. A control unit may test elements, designate some of the elements as operable for use and designate other elements a... | 03/03/1981 |
| 4188670 | Associative interconnection circuit The disclosed apparatus uses an associative memory technique for the selective coupling of circuit elements to a data bus wherein each element is assigned an associative address and is coupled to the data bus when it receives said address on its address l... | 02/12/1980 |
| 4150428 | Method for providing a substitute memory in a data processing system A method for substituting one memory module for another, faulty, memory module comprises designating and marking a memory module as the substitute module, which, upon detection of a fault in the other memory module, is inhibited from responding to its own... | 04/17/1979 |
| 4133039 | True mean rate measuring system A micro-computer circuit including a read-only memory averages pulse information at a plurality of averaging levels with each averaging level corresponding to a progressively increasing maximum count level and generates a best estimate of the true mean ra... | 01/02/1979 |
| 4133027 | Process control system with backup process controller A process control system having a plurality of process controllers each connected to a data highway to receive and send process control data is controlled by a backup director receiving input signals from each of the plurality of process controllers to se... | 01/02/1979 |
| 4074354 | Process control system A process control system of the type arranged to accept sensing signals from field sensing devices, to digitally process data represented thereby, and to supply control signals to field control devices. The system is characterized by a centralized mainten... | 02/14/1978 |
| 4070704 | Automatic reconfiguration apparatus for input/output processor An automatic reconfiguration hardware capability for automatically altering the local memory/processor configuration and reinitiating a bootload sequence in the event of a failure in the start-up phase of the input/output processor bootload. The automatic... | 01/24/1978 |
| 4040023 | Recorder transfer arrangement maintaining billing data continuity Redundant but independently operable data processors called encoders are arranged so that control of a particular recorder gathering billing data in a telephone switching system can be transferred while maintaining billing continuity for calls being handl... | 08/02/1977 |
| 4038648 | Self-configurable circuit structure for achieving wafer scale integration A self-configurable circuit structure and method for forming the same, for achieving wafer scale integration including the combination of an integrated circuit wafer having an input and an output, wafer control means to provide test and operational modes,... | 07/26/1977 |
| 3967250 | Control system of an electronic exchange A new and improved stored program controlled electronic exchange system for a common channel signaling system through separate data links has been found. The control facility of said electronic exchange is shared by a common signal controller and a stored... | 06/29/1976 |
