Did You Know...
...that the Band-Aid Bandage was invented by a Johnson & Johnson employee whose wife had cut herself? Earl Dickson's wife was rather accident prone, so he set out to develop a bandage that she could apply without help. He placed a small piece of gauze in the center of a small piece of surgical tape, and what we know today as the Band Aid bandage was born!
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| Number | Title | Issue Date |
| 8166340 | Apparatus and method for testing a communication circuit An apparatus for testing a communication circuit includes a detection module and a capture module. The detection module provides an enable signal in response to receiving at least one predetermined plurality of data from a communication device under test. The captur... | 04/24/2012 |
| 8156371 | Clock and reset synchronization of high-integrity lockstep self-checking pairs An apparatus comprises first and second modules configured to operate in a lockstep mode and a reset mode. Each of the first and second modules is configured to asynchronously enter the reset mode when a parent reset signal is asserted at the respective each module.... | 04/10/2012 |
| 8117496 | Detecting and recovering from silent data errors in application cloning systems A method, system, and article for resolving a silent error is disclosed. A primary program copy runs on a primary host, and a secondary program copy runs on a secondary host. The primary and secondary copies communicate to maintain synchronized execution. A third co... | 02/14/2012 |
| 8108718 | Checkpointing in massively parallel processing One embodiment is a method that performs a local checkpoint at a processing node in a massively parallel processing (MPP) system that executes a workload with a plurality of processing nodes. The local checkpoint is stored in local memory of the processing node. Whi... | 01/31/2012 |
| 8090984 | Error detection and communication of an error location in multi-processor data processing system having processors operating in Lockstep A system and method are provided. The system comprises a first and second processor, and a cross-signaling interface. The first processor executes instructions. The second processor executes the instructions in lockstep with the first processor. The cross-signaling ... | 01/03/2012 |
| 8055940 | Recoverable error detection for concurrent computing programs A system and method detects communication error among multiple nodes in a concurrent computing environment. One or more barrier synchronization points/checkpoints or regions are used to check for a communication mismatch. The barrier synchronization point(s)/checkpo... | 11/08/2011 |
| 8051325 | Multiprocessor system and failure recovering system A multiprocessor system includes a plurality of nodes, each of which includes a plurality of processors, a plurality of memories, and first and second node controllers. Unique identifiers are assigned to all the components. Each of the first and second node controll... | 11/01/2011 |
| 7996714 | Systems and methods for redundancy management in fault tolerant computing Systems and methods for redundancy management in fault tolerant computing are provided. The systems and methods generally relate to enabling the use of non-custom, off-the-shelf components and tools to provide redundant fault tolerant computing. The various embodime... | 08/09/2011 |
| 7979739 | Systems and methods for managing a redundant management module Systems and methods for managing a redundant management module are provided. In this regard, a representative system, among others, includes first and second management modules that are configured to manage a computing device; and a programmable logic device that is... | 07/12/2011 |
| 7774645 | Techniques for mirroring data within a shared virtual memory system A technique protects shared data in a local device having local memory. The technique involves observing a page table entry (PTE) on the local device. The PTE is stored in a page table used for managing virtual to physical address translations, tracking page modific... | 08/10/2010 |
| 7770062 | Redundancy system having synchronization function and synchronization method for redundancy system A redundancy system that can perform synchronization even if a failure occurs to an application. According to the redundancy system of the present invention, a synchronization data memory area, a management bit map table having a flag created for each segment of the... | 08/03/2010 |
| 7757115 | Feedback control device A feedback control device capable of continuously performing high-accuracy, stable control even in cases where any of multiple controllers for controlling a controlled system becomes incapable of control action. A controller (master controller) generates control dat... | 07/13/2010 |
| 7752493 | High reliability system, redundant construction control method, and program A high reliability system in which a plurality of apparatuses each having a variable function unit and a fixed function unit are mutually connected through an internal network. Pairs of apparatuses are constructed and spare apparatuses are allocated, thereby providi... | 07/06/2010 |
| 7752494 | Method and system of aligning execution point of duplicate copies of a user program by exchanging information about instructions executed Aligning execution point of duplicate copies of a user program by exchanging information about instructions executed. At least some of the exemplary embodiments may be a method of operating duplicate copies of a user program in a first and second processor, allowing... | 07/06/2010 |
| 7730350 | Method and system of determining the execution point of programs executed in lock step A method and system of determining the execution point of programs executed in lock step. At least some of the illustrative embodiments are computer systems comprising a first processor that executes a program, and a second processor that executes a duplicate copy o... | 06/01/2010 |
| 7694176 | Fault-tolerant computer and method of controlling same A fault-tolerant computer has duplex systems each comprising a CPU subsystem for controlling access to a CPU and a storage unit, and an IO subsystem for controlling data which are input to the IO subsystem from an external circuit and output from the IO subsystem to... | 04/06/2010 |
| 7694177 | Method and system for resynchronizing data between a primary and mirror data storage system Disclosed is system and method for mirroring data from a primary data storage system on a mirroring data storage system. According to some embodiments to the present invention, prior to resynchronization of a data unit on the mirroring system with corresponding data... | 04/06/2010 |
| 7661025 | Method of ensuring consistent configuration between processors running different versions of software A method of establishing and maintaining a consistent configuration state of a first processor, running on a first version of operating software, and a second processor, running on a second version of operating software, is described. The method involves determining... | 02/09/2010 |
| 7644306 | Method and system for synchronous operation of an application by a purality of processing units A method for effecting synchronized operation of an application by a plurality of processing units, each processing unit may include an application processing section coupled with an own data store and a communication section coupled for communications with other pr... | 01/05/2010 |
| 7624302 | System and method for switching the role of boot processor to a spare processor responsive to detection of loss of lockstep in a boot processor According to one embodiment, a method comprises detecting loss of lockstep (LOL) for a processor in a multi-processor system. The method further comprises determining that the processor for which the LOL is detected is assigned the role of boot processor, and switch... | 11/24/2009 |
| 7620845 | Distributed system and redundancy control method A distributed system using a quorum redundancy method in which a redundancy process is executed by at least Q processing elements of N processing elements communicable with each other, each of N processing elements includes a resynchronization determining unit for d... | 11/17/2009 |
| 7617412 | Safety timer crosscheck diagnostic in a dual-CPU safety system A dual-processing unit with single clock source CPUs safety I/O module having a safety timer crosscheck diagnostic to enable each CPU to verify the accuracy of the clock source of the other CPU. The diagnostic works by having the first CPU act as a controlling CPU a... | 11/10/2009 |
| 7610510 | Method and apparatus for transactional fault tolerance in a client-server system Method and apparatus for transactional fault tolerance in a client-server system is described. In one example, output data generated by execution of a service on a primary server during a current epoch between a first checkpoint and a second checkpoint is buffered. ... | 10/27/2009 |
| 7549082 | Method and system of bringing processors to the same computational point A method and system of bringing processors to the same computational point. At least some of the illustrative embodiments are computer systems comprising a first processor executing a program, a second processor executing a duplicate copy of the program (but at diff... | 06/16/2009 |
| 7516360 | System and method for execution of a job in a distributed computing architecture The present invention provides a system and method for the execution of jobs in a distributed computing architecture that uses worker clients which are characterized by a checkpointing mechanism component for generating checkpointing information being assigned to at... | 04/07/2009 |
| 7502958 | System and method for providing firmware recoverable lockstep protection According to at least one embodiment, a method comprises detecting loss of lockstep for a pair of processors. The method further comprises triggering, by firmware, an operating system to idle the processors, and recovering, by the firmware, lockstep between the pair... | 03/10/2009 |
| 7500139 | Securing time for identifying cause of asynchronism in fault-tolerant computer A fault-tolerant computer has a pair of duplex systems having respective CPU subsystems that are operable identically in lock-step synchronism. Each of the duplex systems has a CPU, a main storage unit, a CPU bus controller, and a DMA controller. The CPU and the mai... | 03/03/2009 |
| 7496786 | Systems and methods for maintaining lock step operation A system is provided for rapidly synchronizing two or more processing elements in a fault-tolerant computing system. Embodiments of this system allow for the rapid synchronization of two processing elements through partial copies of the contents of memory associate ... | 02/24/2009 |
| 7475284 | Redundancy system having synchronization function and synchronization method for redundancy system A redundancy system that can perform synchronization even if a failure occurs to an application. According to the redundancy system of the present invention, a synchronization data memory area, a management bit map table having a flag created for each segment of the... | 01/06/2009 |
| 7467327 | Method and system of aligning execution point of duplicate copies of a user program by exchanging information about instructions executed A method and system of aligning execution point of duplicate copies of a user program by exchanging information about instructions executed. At least some of the exemplary embodiments may be a method comprising operating duplicate copies of a user program in a first... | 12/16/2008 |
| 7447941 | Error recovery systems and methods for execution data paths Systems and methods for error recovery in an integer execution unit of a multi-core processor are disclosed. In an exemplary embodiment a method may comprise checking parity for a transaction in an execution data path having parallel data registers. The method may a... | 11/04/2008 |
| 7441150 | Fault tolerant computer system and interrupt control method for the same A fault tolerant (FT) computer system includes a primary system and a secondary system. The primary system includes a first CPU; a first FT control section connected with the first CPU; and a first south bridge connected electrically and operatively with the first F... | 10/21/2008 |
| 7437605 | Hot standby method and apparatus An apparatus provides hot standby operation with normal and standby processors, each of which includes vital inputs electrically interconnected with the vital inputs of the other processor, vital outputs, and an application routine inputting the vital inputs and out... | 10/14/2008 |
| 7436906 | Synchronous detector with high accuracy in detecting synchronization and a method therefor In a symbol timing detector, a correlator calculates a correlation value for a received radio packet signal. A peak detector compares the correlation value with a threshold value to be used, and sends, upon a correlation value detected larger than the threshold valu... | 10/14/2008 |
| 7437546 | Multiple, cooperating operating systems (OS) platform system and method Embodiments of a multi-processor platform including multiple, cooperating operating systems are described. Multiple operating systems, each of which may be of a different type or nature, run on different partitions of the multi-processor platform, yet coexist and co... | 10/14/2008 |
| 7434098 | Method and system of determining whether a user program has made a system level call Method and system of determining whether a user program has made a system level call and thus whether the user program is uncooperative with fault tolerant operation. Some exemplary embodiments may be a processor-based method comprising providing information from a ... | 10/07/2008 |
| 7433442 | Linear half-rate clock and data recovery (CDR) circuit A linear, half-rate clock and data recovery (CDR) circuit for recovering clock information embedded in a received data signal. The half-rate CDR circuit comprises a phase detector that may receive the data signal and generate a phase error signal representative of t... | 10/07/2008 |
| 7430687 | Building-up of multi-processor of computer nodes In an aspect of the present invention, a computer system includes a plurality of computer nodes and an inter-node connecting unit configured to connect the plurality of computer nodes. Each of the plurality of computer nodes includes a local memory configured to sto... | 09/30/2008 |
| 7428660 | Starting control method, duplex platform system, and information processor There is disclosed a system equipped with information processors of control and standby systems interconnected to communicate with each other. The information processor of the control system executes a POST operation and a starting operation (S101 to S103 | 09/23/2008 |
| 7428659 | Programmable controller with CPU units and special-function modules and method of doubling up A programmable controller includes two CPU units each having a detachably attached special-function module for carrying out a calculation process, each of the two CPU units recognizing conditions of the other CPU unit, one of them becoming an active unit and the oth... | 09/23/2008 |
