Did You Know...
...that the Slinky toy was the result of a failed attempt by engineer Richard James to produce an antivibration device for ship instruments? His goal was to develop a spring that would instantaneously counterbalance the wave motion that rocks a ship at sea. Instead, he developed the Slinky.
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| Number | Title | Issue Date |
| 7685401 | Guest to host address translation for devices to access memory in a partitioned system Embodiments of apparatuses, methods, and systems for guest to host address translations for devices to access memory in a partitioned system are disclosed. In one embodiment, an apparatus includes an interface, partitioning logic, first address translation logic, an... | 03/23/2010 |
| 7676645 | Method, system, and article of manufacture for reserving memory Provided are a method, system, and article of manufacture, wherein in certain embodiments, a plurality of logical memory blocks corresponding to a memory in a computational device are allocated. An attribute is associated with at least one logical memory block, wher... | 03/09/2010 |
| 7669032 | Host-based virtualization optimizations in storage environments employing off-host storage virtualization A system for host-based virtualization optimizations in storage environments employing off-host virtualization may include a host, one or more physical storage devices, and an off-host virtualizer such as a virtualizing switch. The off-host virtualizer may be config... | 02/23/2010 |
| 7647470 | Memory device and controlling method for elongating the life of nonvolatile memory A memory device and controlling method for nonvolatile memory are provided. The memory device and the controlling method for a nonvolatile memory are provided by which, where a file management system wherein there is a tendency that lower logic addresses are used fr... | 01/12/2010 |
| 7644251 | Non-volatile solid-state memory controller A controller includes a volatile random access memory and translation hardware. The volatile random access memory includes a table having at least one entry. The at least one entry includes a portion of a physical address of a memory location at a NAND flash non-vol... | 01/05/2010 |
| 7631162 | Non-volatile memory with adaptive handling of data writes A memory system is presented where sectors are normally stored in logically contiguous groups. As repeated writes of the same small sector group can causes a massive garbage collection (data relocation), the pattern of host access is monitored by checking the sector... | 12/08/2009 |
| 7627733 | Method and system for dual mode access for storage devices A method and system for reading data from a non-volatile mass storage device is provided. The method includes, performing logical configuration for the non-volatile mass storage device, wherein file data is allocated addresses in a virtual logical address space; and... | 12/01/2009 |
| 7606993 | Flash memory controller, memory control circuit, flash memory system, and method for controlling data exchange between host computer and flash memory A controller included in a flash memory system, which can be applied to a memory interface of a host computer is disclosed. A buffer is used for data exchange operation between the host computer and the controller, and data exchange operation between a flash memory ... | 10/20/2009 |
| 7600093 | Device, method and computer program product for multi-level address translation A method for retrieving information from a storage unit, the method includes: receiving, by an input output memory management unit second-level translation information representative of a partition of a storage unit address space; receiving, by a input output memory... | 10/06/2009 |
| 7596676 | Method of inheriting information identifying virtual volume and storage system using the same With the migration of a logical volume between virtualization apparatuses, there has been a need to change the setting of a host computer in order to access a migration destination logical volume. In a control method for a computer system including a host computer, ... | 09/29/2009 |
| 7594093 | Virtual memory mapping for efficient memory usage A processor (e.g. utilizing an operating system and/or circuitry) may access physical memory by paging, where a page is the smallest partition of memory mapped by the processor from a virtual address to a physical address. An application program executing on the pro... | 09/22/2009 |
| 7590819 | Compact memory management unit A memory management unit (MMU) for a device controller that provides enhanced functionality while maintaining a small physical size or footprint, such that the die size required to manufacture the memory management unit circuitry within the device controller integra... | 09/15/2009 |
| 7581078 | Memory controller for non-homogeneous memory system A memory controller includes at least one interface adapted to be coupled to one or more first memory devices of a first memory type having a first set of attributes, and to one or more second memory devices of a second memory type having a second set of attributes.... | 08/25/2009 |
| 7577815 | Apparatus and method for reallocating logical to physical disk devices using a storage controller, with access frequency and sequential access ratio calculations and display A storage controller calculates an access frequency of each logical disk; that is selects a first logical disk device of which the access frequency exceeds a first predetermined value, the first logical disk device being allocated to a first physical disk device; se... | 08/18/2009 |
| 7571298 | Systems and methods for host virtual memory reconstitution Systems and methods are described herein to provide for host virtual memory reconstitution. Virtual memory reconstitution is the ability to translate the host device's virtual memory addresses to the host device's physical memory addresses. The virtual memory recons... | 08/04/2009 |
| 7552310 | Virtualization and hosting service platform system and method A computer cluster for providing hosting services includes a plurality of nodes, and a control center coordinating activity of the nodes. Each node includes a plurality of virtual environments such that each virtual environment responds to user requests and appears ... | 06/23/2009 |
| 7552309 | Data storage methods for hierarchical copies A method for copying a logical volume in a data storage system, including forming a first logical volume having one or more logical partitions and storing data at a physical location associated with the one or more logical partitions. The method further includes rec... | 06/23/2009 |
| 7549035 | System and method for reference and modification tracking A method for propagating reference and modification bit values into a translation table. The method includes issuing a write instruction including a virtual address, translating the virtual address to a corresponding physical address in a corresponding entry in a TL... | 06/16/2009 |
| 7546439 | System and method for managing copy-on-write faults and change-protection A method of identifying a shared main memory page containing a physical address corresponding to a virtual address included in an issued write instruction. The method includes determining the selected virtual address is not within a reach of a TLB entry that is curr... | 06/09/2009 |
| 7512769 | Process migration Migrating a process between separate logical address spaces involves saving information on a state of a process running in a first logical address space in machine memory mapped to the first logical address space, remapping the machine memory containing the saved in... | 03/31/2009 |
| 7509471 | Methods for adaptively handling data writes in non-volatile memories A memory system is presented where sectors are normally stored in logically contiguous groups. As repeated writes of the same small sector group can causes a massive garbage collection (data relocation), the pattern of host access is monitored by checking the sector... | 03/24/2009 |
| 7500082 | Automating the testing of software or hardware components by dynamically creating virtual storage devices on a simulated system bus in a physical computer system Disclosed is a method for automating testing tasks which would otherwise have to be done manually using actual hardware by providing the capability to dynamically create many types of storage devices with different storage media, thus eliminating the need to have te... | 03/03/2009 |
| 7493465 | Method and system for extended memory with user mode input/output operations A computer system having a kernel for mapping virtual memory address space to physical memory address space. The computer system uses a method for performing an input/output operation. A physical memory buffer is registered with a subsystem, and the physical memory ... | 02/17/2009 |
| 7493466 | Virtualization system for virtualizing disks drives of a disk array system A first storage controller has a multilayer memory hierarchy constructed by LDEV (logical device) connected from LUN, and VDEV (virtual device) connected to the lower order of the LDEV. At least one of the VDEVs is constructed by mapping the memory resources arrange... | 02/17/2009 |
| 7487328 | Storage apparatus having virtual-to-actual device addressing scheme A storage apparatus includes a storage unit and a controller, wherein control of inputting/outputting data from/to a device provided in said storage unit is executed in accordance with a request received by said storage apparatus. An actual device of the storage app... | 02/03/2009 |
| 7487329 | Page replacement policy for systems having multiple page sizes In a data processing system utilizing multiple page sizes for virtual memory paging, a system, method, and article of manufacture for managing page replacement. In one embodiment, the page replacement method begins with a page frame allocation request, such as may b... | 02/03/2009 |
| 7487327 | Processor and method for device-specific memory address translation A processor employing device-specific memory address translation. In one embodiment, a processor may include a device interface configured to receive a memory access request from an input/output (I/O) device, where the request specifies a virtual memory address and ... | 02/03/2009 |
| 7484072 | Page replacement policy for systems having multiple page sizes In a data processing system utilizing multiple page sizes for virtual memory paging, a system, method, and article of manufacture for managing page replacement. In one embodiment, the page replacement method begins with a page frame allocation request, such as may b... | 01/27/2009 |
| 7478221 | System and method for using consistent virtual addresses to communicate in cooperative multi-layer virtualization environments A system using consistent virtual addresses to communicate in cooperative multi-layer virtualization environments includes a volume server, one or more physical storage devices, a front-end layer and a back-end layer of virtualization participants. The volume server... | 01/13/2009 |
| 7472252 | Merging identical memory pages Multiple virtual addresses map to the same physical location in memory if it has been determined that they are all intended to access the same data. In one embodiment, such virtual addresses are identified, and correspondence information (such as from a translation ... | 12/30/2008 |
| 7472253 | System and method for managing table lookaside buffer performance A computer system comprising a main memory and a processor die coupled to the main memory by a first bus. The processor die includes a processor core coupled to a first cache memory and multiple base and bounds registers (BBRS). Each of BBRs have a base virtual addr... | 12/30/2008 |
| 7472251 | Data storage apparatus detachably mounted to a host apparatus A data storage device including a non-volatile semiconductor memory and an attribute information storage unit. In an attribute information storage unit of the data storage device, there are stored the number of sectors in one block and the information indicating the... | 12/30/2008 |
| 7469332 | Systems and methods for adaptively mapping an instruction cache Systems and methods for adaptively mapping system memory address bits into an instruction tag and an index into the cache are disclosed. More particularly, hardware and software are disclosed for observing collisions that occur for a given mapping of system memory b... | 12/23/2008 |
| 7464249 | System and method for alias mapping of address space Mapping of address space by providing real storage including first and second address spaces. The second address space is smaller than and contained within the first address space. Provided within virtual storage is a system execution space. Providing within the sys... | 12/09/2008 |
| 7451291 | System and method for mode select handling for a partitioned media library One embodiment of the present invention includes a method for handling status commands direct to a partitioned media library that comprises establishing a set of initial logical element addresses for a set of physical element addresses with each initial logical elem... | 11/11/2008 |
| 7447868 | Using vector processors to accelerate cache lookups Typical embodiments of the present invention maintain the cache metadata in arrays, and use vector instructions to process the array elements in parallel. The cache metadata comprises virtual tags corresponding to main memory addresses and physical addresses corresp... | 11/04/2008 |
| 7444492 | Processor, virtual memory system, and virtual storing method A processor includes an address specifying unit that specifies an address range on a virtual storage area; an instruction code setting unit that sets an instruction code for a process of deciding data corresponding to the specified address range; a calculating unit ... | 10/28/2008 |
| 7444486 | Storage system, storage access restriction method and computer program product Provided is a storage system having one or more logical devices mapped to a virtual device provided in a mapping destination storage system, and a storage controller for controlling the reading and writing of data from and to the logical devices. Upon receiving a re... | 10/28/2008 |
| 7444636 | Method and system of determining attributes of a functional unit in a multiple processor computer system A method and system of determining by a first program an attribute of a first functional unit by referencing a virtual memory address (the first functional unit comprising a first processor and a random access memory (RAM) coupled to the first processor in a compute... | 10/28/2008 |
| 7444460 | Data storage device, method for updating management information in data storage device, and computer program The invention provides a data storage device and a method of updating management information, capable of dealing with management information in a highly reliable manner so that information is not easily lost when an error occurs. File management information such as ... | 10/28/2008 |
