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| Number | Title | Issue Date |
| 8185717 | Apparatus and method for profiling software performance on a processor with non-unique virtual addresses A system includes a processor with a memory map specifying a user mode region with virtual address translation by a memory management unit and a kernel mode region with direct virtual address translation. The processor executes an application in the user mode region... | 05/22/2012 |
| 8185716 | Memory system and method for using a memory system with virtual address translation capabilities A memory system comprises a first memory having associated therewith a first local memory access controller configured to access the first local memory using physical memory addresses and a second memory having associated therewith a second local memory access contr... | 05/22/2012 |
| 8171253 | Virtual disk mapping A storage area network can include a storage virtualization entity—intelligent storage application resource (iSAR)—either as a separate device in the fabric, or as an integrated module in one or more switches within the fabric. All I/O operations can be re-direc... | 05/01/2012 |
| 8166276 | Translate and verify instruction for a processor In an embodiment, a first instruction is defined that comprises at least a first operand from which the execution core is configured to determine a virtual address and a second operand that specifies one or more translation attributes that exist in a page table entr... | 04/24/2012 |
| 8156307 | Multi-processor system having at least one processor that comprises a dynamically reconfigurable instruction set A multi-processor system comprises at least one host processor, which may comprise a fixed instruction set, such as the well-known x86 instruction set. The system further comprises at least one co-processor, which comprises dynamically reconfigurable logic that enab... | 04/10/2012 |
| 8151083 | Dynamic address translation with frame management What is disclosed is a frame management function defined for a machine architecture of a computer system. In one embodiment, a frame management instruction is obtained which identifies a first and second general register. The first general register contains a frame ... | 04/03/2012 |
| 8135937 | Logical partition memory A mechanism is provided, in a data processing system, for accessing memory based on an effective address submitted by a process of a partition. The mechanism may translate the effective address into a virtual address using a segment look-aside buffer. The mechanism ... | 03/13/2012 |
| 8131972 | Method and apparatus for improving memory coalescing in a virtualized hardware environment The illustrative embodiments described herein provide a computer implemented method, apparatus, and computer program product for managing memory in a shared environment. Upon receiving a file open event associated with a file, a tag value is generated based on the a... | 03/06/2012 |
| 8131973 | Priority determination when dumping files A computer dumps information stored in a storage space used by a program, into a file when the program ends abnormally, by determining a priority representative of an order in which the information is dumped into the file, for storage areas which are predetermined a... | 03/06/2012 |
| 8122221 | Method and apparatus to combine scattered buffer addresses into a contiguous virtual address space A method of combining scattered buffer addresses into a contiguous virtual address space comprises; receiving a plurality of read completion data portions corresponding to a single read request, storing the plurality of read completion data portions in a memory devi... | 02/21/2012 |
| 8117418 | Method and system for managing virtual addresses of a plurality of processes corresponding to an application The present invention provides a method and system for managing virtual addresses of a plurality of processes corresponding to an application. The method comprises designating a first set of ranges of virtual addresses to the plurality of processes, wherein the virt... | 02/14/2012 |
| 8117419 | Storage apparatus and method for eliminating redundant data storage using storage apparatus A storage apparatus provides, in a dynamic provisioning system, a virtual logical device (DP-LDEV) that is a virtual logical device configured of a real logical device (N-LDEV). In the storage apparatus, a storage area of a real logical device is managed by being di... | 02/14/2012 |
| 8117417 | Dynamic address translation with change record override What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. A segment table entry obtained from ... | 02/14/2012 |
| 8103849 | Reducing memory usage of kernel memory management structures One aspect of the present invention relates to techniques utilized within an operating system or a similar virtualization environment for reducing overhead of memory management data structures. Memory management data structures are used by operating systems to track... | 01/24/2012 |
| 8095772 | Large memory pages for shared libraries A method for loading shared libraries. The method includes receiving an indication of a requirement to load the shared library into the virtual memory and determining that the shared library is a candidate for using shared large pages. Further, the method includes, ... | 01/10/2012 |
| 8095771 | Method and system for caching address translations from multiple address spaces in virtual machines A method of virtualizing memory through shadow page tables that cache translations from multiple guest address spaces in a virtual machine includes a software version of a hardware tagged translation look-aside buffer. Edits to guest page tables are detected by inte... | 01/10/2012 |
| 8086821 | Input-output memory management unit (IOMMU) and method for tracking memory pages during virtual-machine migration An input-output memory management unit (IOMMU) and method for tracking memory pages during virtual-machine migration are generally described herein. The IOMMU includes an IOMMU manager to service address translation requests associated with memory pages received fro... | 12/27/2011 |
| 8078826 | Effective memory clustering to minimize page fault and optimize memory utilization An embodiment of the invention provides a method for effective memory clustering to minimize page faults and optimize memory utilization. More specifically, the method monitors data access requests to secondary storage and identifies data addresses in secondary stor... | 12/13/2011 |
| 8074046 | Semiconductor memory device and operation method thereof A semiconductor memory device comprises an input unit inputting an address and data; a storage unit storing data and a FAT; an address conversion unit converting the address; an access unit accessing the storage unit according to the converted address; a detection u... | 12/06/2011 |
| 8069332 | Device and method for extracting memory data A device and method for extracting data stored in a volatile memory are provided. In particular, a memory-data extracting device and method for ensuring integrity of data extracted from a volatile memory installed in a computer are provided. A memory-data extracting... | 11/29/2011 |
| 8055876 | Selectively mark free frames as unused for cooperative memory over-commitment Disclosed is a computer implemented method, apparatus and computer program product for communicating virtual memory page status to a virtual memory manager. An operating system may receive a request to free a virtual memory page from a first application. The operati... | 11/08/2011 |
| 8051271 | Translation of virtual to physical addresses Address translation circuitry for translating virtual addresses to physical addresses for a data processor in response to access requests from said data processor targeting virtual addresses is disclosed. The address translation circuitry comprises: a data store com... | 11/01/2011 |
| 8046562 | Storage apparatus having virtual-to-actual device addressing scheme A storage apparatus includes a storage unit and a controller, wherein control of inputting/outputting data from/to a device provided in said storage unit is executed in accordance with a request received by said storage apparatus. An actual device of the storage app... | 10/25/2011 |
| 8041922 | Enhanced dynamic address translation with load real address function What is provided is a load real address function defined for a machine architecture of a computer system. In one embodiment, a machine instruction containing an opcode is obtained indicating that a load real address is to be performed. The instruction further identi... | 10/18/2011 |
| 8037279 | Method and system for cross-domain data sharing A method for sharing data between a first domain and a second domain, including issuing a first request for data from a storage pool by the first domain, receiving the first request by a control domain driver in a control domain, obtaining the data by the control do... | 10/11/2011 |
| 8037278 | Dynamic address translation with format control What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. An index portion of the virtual addr... | 10/11/2011 |
| 8032733 | Apparatus and method for reallocating logical to physical disk devices using a storage controller with access frequency and sequential access ratio calculations and display A storage controller calculates an access frequency of each logical disk; that is selects a first logical disk device of which the access frequency exceeds a first predetermined value, the first logical disk device being allocated to a first physical disk device; se... | 10/04/2011 |
| 8028147 | Arrangements for storing and retrieving blocks of data having different dimensions A method for storing and retrieving blocks of data having different dimensions is disclosed. The method can include receiving a first data segment to be stored in a block storage device where the first data segment has an address. The method can also include determi... | 09/27/2011 |
| 8019964 | Dynamic address translation with DAT protection What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of any one of a region first table, a region second table, a region third table, or a segment table are obtained... | 09/13/2011 |
| 8019965 | Data migration The present invention provides for a method for managing the storage of data in a computing system that includes a data processor and local physical storage, involving the steps of: defining a virtual storage volume for access by the data processor, the data process... | 09/13/2011 |
| 8019966 | Data sharing utilizing virtual memory having a shared paging space A method for sharing memory locations in a virtual memory system is disclosed. The method can include processing instructions and accessing data utilizing a virtual memory system with a paging device that is accessible by multiple clients. The method can also includ... | 09/13/2011 |
| 8015387 | Virtual memory mapping for efficient memory usage A processor (e.g. utilizing an operating system and/or circuitry) may access physical memory by paging, where a page is the smallest partition of memory mapped by the processor from a virtual address to a physical address. An application program executing on the pro... | 09/06/2011 |
| 8005851 | Streaming virtual disk for virtual applications A sparsely populated, streaming virtual disk may be used with a virtual application to enable fast launching of a virtual application from a network server. The virtual disk may be configured and populated in blocks, enabling those blocks that are used at a particul... | 08/23/2011 |
| 8006065 | Method and system for combining page buffer list entries to optimize caching of translated addresses Certain aspects of a method and system for combining page buffer list entries (PBLEs) to optimize caching of translated addresses are disclosed. Aspects of a method may include encoding at least two page buffer list entries in a remote direct memory access (RDMA) me... | 08/23/2011 |
| 8001359 | Mapping an -bit application ported from an -bit application to an -bit architecture Embodiments of the present invention provide a system that maps an N-bit application to virtual memory. The N-bit application may be obtained by porting an M-bit application to an N-bit architecture where N is greater than M. During operation, the system receives a ... | 08/16/2011 |
| 7996648 | Coupled symbiotic operating systems A single application can be executed across multiple execution environments in an efficient manner if at least a relevant portion of the virtual memory assigned to the application was equally accessible by each of the multiple execution environments. A request by a ... | 08/09/2011 |
| 7979667 | Memory array search engine Systems and/or methods that facilitate a search of a memory component(s) to locate a desired logical block address (LBA) associated with a memory location in a memory component are presented. Searches to locate a desired LBA(s) in a memory component(s) associated wi... | 07/12/2011 |
| 7979668 | Method and system for automatically distributing real memory between virtual memory page sizes A method, system and computer program product for allocating real memory to virtual memory page sizes when all real memory is in use is disclosed. In response to a page fault, a page frame for a virtual page is selected. In response to determining that said page doe... | 07/12/2011 |
| 7971027 | Mark page-out pages as critical for cooperative memory over-commitment Disclosed is a computer implemented method and apparatus for marking as critical a virtual memory page in a data processing system. An operating system indicates to a virtual memory manager a virtual memory page selected for paging-out to disk. The operating system ... | 06/28/2011 |
| 7971028 | Virtualized computer platform providing hosting services A computer cluster for providing hosting services includes a plurality of nodes, and a control center coordinating activity of the nodes. Each node includes a plurality of virtual servers such that each virtual server responds to user requests and appears to the use... | 06/28/2011 |
