Did You Know...
...that the x-ray was discovered purely by accident? When German physicist Wilhelm Konrad von Roentgen was experimenting with cathode rays in 1895, he put an activated Crookes tube in a book and went out to lunch. When he returned, he discovered that a key that had also been placed in the book showed up as an image on the developed film!
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 5159681 | Page printer memory allocation A memory management system for a page printer controller (11) which includes random access memory (17) allocated among bit map memory (30), page buffer memory (29), and user memory (28). The memory management system allocates the random access memory to p... | 10/27/1992 |
| 5157784 | Memory control system responsive to determination, allocating adjacent test space for editing space, relocating adjacent text and editing selected text A memory control unit comprising: a first memory for storing a plurality of text information; a second memory for storing title information to segment those text information stored in the first memory; and control device which reads out the title informat... | 10/20/1992 |
| 5134697 | Remote memory-mapped display with interactivity determination An apparatus for rapidly updating a target display buffer memory from a source display buffer memory using a communication subsystem includes an element for associating a region number and an update indicator with each of a plurality of data-containing re... | 07/28/1992 |
| 5109336 | Unified working storage management A process of efficiently managing working storage that unifies the use of queues of fixed size free storage blocks and a global list of blocks of random size. The process implements continuous garbage collection that continually purges unused storage bloc... | 04/28/1992 |
| 5027313 | Apparatus for determining maximum usable memory size An apparatus for determining maximum usable memory size is disclosed. Permanent connections on a base memory unit and additional memory modules provide signals indicative of the amount of memory installed at each location. The signals are read by the proc... | 06/25/1991 |
| 5021946 | Mostly contiguous file allocation technique involving file extension A method for selecting the sizes and the ordering of the extents used to construct a file, a segment, or a virtual space of a computer system (file). The general method is defined to be any function, applied to this purpose, that, in general, attaches lar... | 06/04/1991 |
| 5014195 | Configurable set associative cache with decoded data element enable lines A set associative cache using decoded data element select lines which can be selectively configured to provide different data sets arrangements. The cache includes a tag array, a number of tag comparators corresponding to the maximum possible number of se... | 05/07/1991 |
| 5010481 | Main memory control system for virtual machine A system for controlling virtual main memories (VMMs) of a plurality of virtual machines (VMs) which has a section for detecting an overload state of a VMM of any VM, a section for requesting a VMM corresponding to a required capacity in response to the d... | 04/23/1991 |
| 5003469 | Method and apparatus for processing data in a decentralized processing system In a decentralized processing system comprising a multiplicity of processors linked together through a transmission medium, a method of processing data of variable length that can be relocated in the transmission medium wherein each processor stores in a ... | 03/26/1991 |
| 4951194 | Method for reducing memory allocations and data copying operations during program calling sequences Segments of memory are allocated to a stack cache as needed to accommodate additional continuation frames during execution of a program. When a continuation is captured, flags in all segments of the stack cache are set to indicate the signals are shared b... | 08/21/1990 |
| 4949246 | Adapter for transmission of data words of different lengths An apparatus for controlling the transfer of data between a first remote processor constructed to process data words of a first length and a second remote processor constructed to process data words of a second length and which includes a storage member c... | 08/14/1990 |
| 4947319 | Arbitral dynamic cache using processor storage A data cache in a computer operating system that dynamically adapts its size in response to competing demands for processor storage, and exploits the storage cooperatively with other operating system components. An arbiter is used to determine the appropr... | 08/07/1990 |
| 4882642 | Sequentially processing data in a cached data storage system The disclosure relates to sequential performance of a cached data storage subsystem with a minimal control signal processing. Sequential access is first detected by monitoring and examining the quantity of data accessed per unit of data storage (track) ac... | 11/21/1989 |
| 4870572 | Multi-processor system Two or more processors with differing address space sizes are used in a multi-processor system. A portion of the memory means accessible by the first processor with a larger address space size is also accessible by the second processor for elevating a uti... | 09/26/1989 |
| 4858118 | Method and apparatus for determining in a computer which of a number of programs are allowed to utilize a rapid access memory A method and apparatus for determining what program shall utilize a rapid access memory in a computer working with a plurality of programs and having a conventional slow access (NM) memory and a rapid access memory (CM), characterized in that during a tes... | 08/15/1989 |
| 4809234 | Memory device including memories having different capacities A memory device includes a plurality of memory arrays, each having a plurality of memory elements, placed in a memory address space, a memory array selecting device responsive to the address information for designating a given address in the memory addres... | 02/28/1989 |
| 4780815 | Memory control method and apparatus A memory control method and apparatus useful in an input/output buffer memory of a multistation system. The buffer memory storage locations are dynamically divided into a plurality of unit groups having varying storage capacities, and flags are provided w... | 10/25/1988 |
| 4758944 | Method for managing virtual memory to separate active and stable memory blocks A pointer, N, indicates an address in a virtual memory space of a demand paged memory including a plurality of virtual address pages and a fixed number of physical memory pages into which blocks of information can be written. A back-up memory store is pro... | 07/19/1988 |
| 4638431 | Data processing system for vector processing having a cache invalidation control unit A data processing system for vector processing having a main memory accessible in parallel by a plurality of processors, each processor having a cache memory, wherein, in response to a storage instruction given to the main memory by a processor, a main me... | 01/20/1987 |
| 4580211 | Method for controlling storage of data sets in memory unit In a computer system, there is provided the information representing empty areas generated when data sets are stored in a magnetic disk apparatus. From that information, the total capacity of empty areas and the deree of nonuniformity in size of empty are... | 04/01/1986 |
| 4503501 | Adaptive domain partitioning of cache memory space A method of operation of a memory array for storage of records of differing predetermined sizes is disclosed which features division of the array into domains which are substantially integral multiples of the predetermined record sizes. In a preferred emb... | 03/05/1985 |
| 4499539 | Method and apparatus for limiting allocated data-storage space in a data-storage unit A data-storage buffer transfers data signals with other units in relatively large blocks of data. Such large blocks storable in large address spaces are not always filled with meaningful data. To more efficiently use the data-storage space in the data-sto... | 02/12/1985 |
| 4430712 | Adaptive domain partitioning of cache memory space A method of operation of a memory array for storage of records of differing predetermined sizes is disclosed which features division of the array into domains which are substantially integral multiples of the predetermined record sizes. In a preferred emb... | 02/07/1984 |
| 4378594 | High speed to low speed data buffering means A system is provided in which a memory is divided into two parts, so that a substantially continuous printing operation can be carried out by reading information to be printed from one part of the memory, with printing being interrupted for brief periods ... | 03/29/1983 |
| 4344152 | Buffer memory control circuit for label scanning system A scanning system includes a pair of buffer memories for alternately accumulating strings of signals which may contain bar coded label data. Candidate selection logic circuits examine incoming signals to generate a candidate signal when a string of signal... | 08/10/1982 |
| 4021655 | Oversized data detection hardware for data processors which store data at variable length destinations Size exception detection hardware for use with a digital data processor arithmetic unit for providing high-speed detection of lost data which results from storing an arithmetic result in a destination which is smaller than one or both of the source operan... | 05/03/1977 |
| 4001786 | Automatic configuration of main storage addressing ranges An apparatus for automatically selecting the one of a plurality of main storage units containing a range of addresses which includes the address of the data to be accessed. The storage capacity of each storage unit is simultaneously compared with a portio... | 01/04/1977 |
