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"Transmission of documents via telephone wires is possible in principle, but the apparatus required is so expensive that it will never become a practical proposition."
Dennis Gabor, British physicist
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| Number | Title | Issue Date |
| 7725665 | Data processor A data processor (1) has a central processing unit (3) and a memory controller (6) capable of controlling a memory (8) to be connected to an outside. The memory has a buffer capable of temporarily holding data within an address range corr... | 05/25/2010 |
| 7721055 | System and method for controlling the updating of storage device Arrangements for controlling the updating of a storage device, which investigates the number of times that a lock waiting time exceeds an upper limit value to judge whether or not the number of times that the upper limit value has been exceeded exceeds a frequency t... | 05/18/2010 |
| 7721053 | Intelligent logical unit provisioning In one embodiment, a storage controller comprises a first I/O port that provides an interface to a host computer, a second I/O port that provides an interface to a storage device, a processor that receives I/O requests generated by the host computer and, in response... | 05/18/2010 |
| 7721054 | Speculative data loading using circular addressing or simulated circular addressing This invention prevents illegal memory address faults on speculative data loads. Circular addressing of the address pointer limits memory access to a range of addresses including all addresses used by the address pointer and not including any invalid addresses. The ... | 05/18/2010 |
| 7716429 | Apparatus, system, and method for dynamic address tracking An apparatus, system, and method are disclosed for dynamic address tracking. A token module creates a token for a job that accesses data in a storage system comprising a plurality of storage devices. The token comprises a job name. The job is a batch job. A storage ... | 05/11/2010 |
| 7711908 | Virtual storage system for virtualizing a plurality of storage systems logically into a single storage resource provided to a host computer A virtual storage system is equipped with a plurality of storage systems and a virtualization device for virtualizing the plurality of storage systems logically into a single storage resource provided to a host computer. When one of the storage systems receives a co... | 05/04/2010 |
| 7707366 | Memory control device Improved efficiency of address/data communication over a memory bus. A memory-control device is located between a processor 30 and memory ranks 40a, 40b and controls access to the memory ranks 40a, 40b. ... | 04/27/2010 |
| 7707367 | Data storage system having separate atomic operation/non-atomic operation paths A data storage system having protocol controller for converting packets between PCIE format used by a storage processor and Rapid IO format used by a packet switching network. The controller includes a PCIE end point for transferring atomic operation (DSA) requests,... | 04/27/2010 |
| 7707176 | Content management system with improved performance There is provided a system and method for improving the performance of a content management system. More specifically, in one embodiment, there is provided a computer readable medium having instructions operable to receive a request to perform a record management fu... | 04/27/2010 |
| 7707365 | Memory address monitoring device and memory address monitoring method A memory address monitoring device for monitoring a memory includes an address determining module and an identification determining module. A first process has a first process identification and issues a request address to access the memory. The memory saves data of... | 04/27/2010 |
| 7707368 | Memory device trims Methods and apparatus are provided. A memory device has a memory array, base trim circuitry adapted to store base control parameter values common to the memory array, and a reference trim circuit corresponding to a portion of the memory array. The reference trim cir... | 04/27/2010 |
| 7702862 | Metrics modules and methods for monitoring, analyzing and optimizing bus and memory operations in a complex integrated circuit A processing system includes a processing circuit having one or more buses, a memory interface unit to control access by the processing circuit to a memory, and a metrics module. The metrics module includes one or more metrics registers and a metrics controller to m... | 04/20/2010 |
| 7702861 | Format mapping scheme for universal drive device A drive device and method of reading from or writing to a record carrier are provided, where data is input or output via an interface using a first format according to a first file system. In the drive device, the first format is mapped to a second format according ... | 04/20/2010 |
| 7698511 | Interface for writing to memories having different write times An interface between memories having different write times is described. The interface includes a latch for capturing address and data information during a memory access by a processor of a first memory device. The interface also includes an index counter for provid... | 04/13/2010 |
| 7698512 | Compressing address communications between processors In one embodiment, the present invention includes a method for determining if data of a memory request by a first agent is in a memory region represented by a region indicator of a region table of the first agent, and transmitting a compressed address for the memory... | 04/13/2010 |
| 7694082 | Computer program and method for managing resources in a distributed storage system A resource management system uses a virtual resource pool distributed across a set of storage devices to manage resources in a distributed storage system. The storage devices dedicate a resource in an allocation pool available to the virtual resource pool. The virtu... | 04/06/2010 |
| 7694083 | System and method for providing a virtual memory architecture narrower and deeper than a physical memory architecture Some embodiments provide a method of presenting virtual memory as narrower and deeper than a physical memory. The method receives a memory address location including a set of real memory address bits and a set of virtual memory position bits. The method retrieves an... | 04/06/2010 |
| 7694084 | Ultra low power ASIP architecture A microcomputer architecture comprises a microprocessor unit and a first memory unit, the microprocessor unit comprising a functional unit and at least one data register, the functional unit and the at least one data register being linked to a data bus internal to t... | 04/06/2010 |
| 7689786 | Techniques for overriding device reservations Described are techniques for overriding an existing device reservation. Discovery processing is performed by a first data storage system to locate a specified device. The discovery processing includes determining whether there is a reservation conflict for said devi... | 03/30/2010 |
| 7689784 | Methods and apparatus for dynamic linking program overlay Methods and apparatus provide for loading at least one software program module from a storage medium into a local memory of a processor for execution, the storage medium containing a main module and a plurality of sub-modules of the software program; and updating an... | 03/30/2010 |
| 7689787 | Device and method for controlling number of logical paths In a control device of a computer system in which a plurality of host computers are capable of sharing a same host interface of a storage system are provided: a VOL status monitoring portion that monitors a VOL status of each VOL mapped to the VVOL and determines wh... | 03/30/2010 |
| 7689785 | Digital device configuration and method Systems and methods for transferring data between storage components in a device. During a user interaction, at least some of the data to be transferred is loaded from an electromechanical data storage arrangement into an electronic storage. The transfer of data may... | 03/30/2010 |
| 7689788 | System and method for executing transactions A method for executing transactions including obtaining a memory location required by a first transaction, where the first transaction is identified using a first transaction identification and a first transaction version; determining a second transaction with owner... | 03/30/2010 |
| 7685378 | Methods and apparatus for adjusting a journal area for continuous data protection In a storage system implementing journaling for data backup and restore, users are able to easily determine information regarding amounts journal data generated over specified periods of time. Flexible and automatic adjustment of the journal area is enabled by provi... | 03/23/2010 |
| 7685376 | Method to support heterogeneous memories A method and apparatus is described herein for supporting heterogeneous local memories. A resource affinity table includes an entry for each local memory mapped into an address space. Each entry associating the corresponding local memory with a logical distance, suc... | 03/23/2010 |
| 7685377 | Piecewise logical data management A method for storing data that is reconstructable in a piecewise manner comprises receiving a user data unit in the form of a data stream to be stored in the data storage system. A plurality of logical data units associated with the user data unit are then identifie... | 03/23/2010 |
| 7680991 | Correlated analysis of wasted space and capacity efficiency in complex storage infrastructures A system and method for correlated analysis of wasted space and capacity efficiency in complex storage infrastructures are provided. The system and method of the illustrative embodiments bring together wasted space data from all areas and components of the storage i... | 03/16/2010 |
| 7680864 | Method and apparatus for managing access to stored objects based on retention policy In one embodiment, a method is provided that may include determining, at least in part, by a device comprised, at least in part, in storage, whether to request that the storage perform, at least in part, at least one operation. The at least one operation may involve... | 03/16/2010 |
| 7680990 | Superword memory-access instructions for data processor Atomic sixteen-byte memory accesses are provided in a 64-bit system in which eight of the bytes are stored in a 64-bit general-purpose register and eight of the bytes are stored in a 64-bit special-purpose register. A 16-byte load instruction transfers the low eight... | 03/16/2010 |
| 7676638 | Combined pessimistic and optimistic concurrency control Various technologies and techniques are disclosed that improve implementation of concurrency control modes in a transactional memory system. A transactional memory word is provided for each piece of data. The transactional memory word includes a version number, a re... | 03/09/2010 |
| 7669016 | Memory control device and method for controlling the same The present invention provides a storage control device which enables the time between failures to prolong as much as possible, though it uses HDD's whose mean time between failures is relatively short. The storage control device controls spindle motors in a manner ... | 02/23/2010 |
| 7669017 | Method of and circuit for buffering data A method of buffering data in a circuit processing data in both a natural address order and a modified address order is described. The method comprises the steps of storing a first block of data according to a first addressing order of a natural address order or a m... | 02/23/2010 |
| 7657713 | Memory using packet controller and memory A memory that includes a plurality of packet pins, a synchronous memory, and a packet controller. The synchronous memory receives address and control signals in synchronization with a clock signal. The packet controller sequentially receives packet data bits through... | 02/02/2010 |
| 7657714 | Apparatus and method to provide one or more commands to a data storage and retrieval system A method is disclosed to provide commands to an information storage and retrieval comprising one or more data storage devices, where one or more first communication links interconnect one or more host computers and the data storage and retrieval system. The method s... | 02/02/2010 |
| 7657715 | Dynamic operation mode transition of a storage subsystem A host implement a method for controlling a dynamic transition of the host from a current operation mode to a target operation mode. The method involves the host receiving an operation mode transition request to transition a logical representation of a storage subsy... | 02/02/2010 |
| 7650472 | Method for reducing memory power consumption Provided is a method for reducing memory power consumption. A period of time allocated to a process is split into time slices each have a predetermined time interval, and a timer interrupt is generated for every time slice. It is checked whether context switch betwe... | 01/19/2010 |
| 7650470 | Method and devices for data transfer A storage apparatus is proposed for facilitating wireless communication between a computer device and one or more external portable electronic devices, or between those external devices. The storage apparatus includes a wireless transceiver for entering communicatio... | 01/19/2010 |
| 7650473 | Secure deletion of information from hard disk drive A method of securely deleting data from a storage medium includes generating a bitmap that corresponds to unused locations on the storage medium; initiating a background process that wipes the unused locations, where the background process runs asynchronously with a... | 01/19/2010 |
| 7650471 | Head of queue cache for communication interfaces A technique includes identifying an address of a head end of a queue and monitoring a coherent interconnect to identify a data transfer that is communicated by a producer, which targets the address. The technique includes storing the data of the data transfer in the... | 01/19/2010 |
| 7647456 | Comparing data in a new copy relationship to data in preexisting copy relationships for defining how to copy data from source to target Provided are a method, system, and program for establishing copy relationships to copy source data to target data. A request is received to establish a copy relationship indicating to copy source data to target data. A determination is made as to whether the source ... | 01/12/2010 |
