Did You Know...
...that Robert Adler has the dubious distinction of being the Father of the Couch Potato? Back in 1955 Adler was employed by what was then Zenith Radio Corp., where he was charged to invent something that would allow viewers to turn down the TV volume without leaving their chairs. After a series of flops (such as a wired contraption that people tripped over), Adler hit on the idea of using sound waves. Thus the Remote Control was born...
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| Number | Title | Issue Date |
| 6671780 | Modified least recently allocated cache replacement method and apparatus that allows skipping a least recently allocated cache block A modified least recently allocated cache enables a computer to use a modified least recently allocated cache block replacement policy. In a first embodiment, an indicator of the least recently allocated cache block is tracked. When a cache block is refer... | 12/30/2003 |
| 6671766 | Method and system for implementing memory efficient track aging Each time a track is referenced, a value representing the last referenced age is entered for a track entry in a last referenced age table (LRAT). The last referenced age table is indexed by track. A second table, an age frequency table (AFT), counts all s... | 12/30/2003 |
| 6662173 | Access control of a resource shared between components A resource including a plurality of elements, such as a cache memory having a plurality of addressable blocks or ways, is shared between two or more components based on the operation of an access controller. The access controller, controls which of the el... | 12/09/2003 |
| 6654855 | Method and apparatus for improving the efficiency of cache memories using chained metrics A time-weighted metric is associated with each line of data that is being held in a data cache. The value of the metric is recomputed as the lines are accessed and the metric value is used to group cache lines for paging purposes. The metrics are computed... | 11/25/2003 |
| 6643737 | Cache lock device and method therefor A cache lock device eliminates the need of transferring data to a cache at execution of a lock instruction by excluding the possibility of an invalid data to be locked in the cache. The cache lock device has a least recently used (LRC) output conversion c... | 11/04/2003 |
| 6643742 | Method and system for efficient cache memory updating with a least recently used (LRU) protocol A method of and system for concurrently processing multiple memory requests. The first and second memory requests contain a linear address. A search for the cache entry in a cache block is issued in response to the linear address. After locating the cache... | 11/04/2003 |
| 6640286 | Cache control system A cache memory unit that preferentially stores specific lines at the cache memory, according to the program nature, dynamically changes the priority ranks of lines, and increases the cache memory hit rate. For this purpose, the lines to be accessed by a p... | 10/28/2003 |
| 6633902 | Communication cache management device and method therefor The invention relates to a network emulating a local network, and particularly provides a communication cache management device that uses, e.g., an MPOA for efficiently transmitting LAN data within an ATM network, and a method therefor. A communication ca... | 10/14/2003 |
| 6629210 | Intelligent cache management mechanism via processor access sequence analysis In addition to an address tag, a coherency state and an LRU position, each cache directory entry includes historical processor access information for the corresponding cache line. The historical processor access information includes different subentries f... | 09/30/2003 |
| 6601144 | Dynamic cache management in a symmetric multiprocessor system via snoop operation sequence analysis In addition to an address tag, a coherency state and an LRU position, each cache directory entry includes historical processor access and snoop operation information for the corresponding cache line. The historical processor access and snoop operation inf... | 07/29/2003 |
| 6601143 | Self-adapting cache management method and system A self-adapting method and apparatus for determining an efficient cache line replacement algorithm for selecting which objects (or lines) are to be evicted from the cache. Objects are prioritized based upon weights which are determined dynamically for eac... | 07/29/2003 |
| 6598123 | Snoop filter line replacement for reduction of back invalidates in multi-node architectures A snoop filter in a multi-processor system maintains a plurality of entries, each representing a cache line that may be owned by one or more nodes. When replacement of one of the entries is required, the snoop filter selects for replacement the entry repr... | 07/22/2003 |
| 6598125 | Method for caching information between work sessions A method of caching information between work sessions for future use is described. The method efficiently determines those blocks of information least likely to be required for future use and preferentially discards such blocks from the cache when additio... | 07/22/2003 |
| 6594742 | Cache management via statistically adjusted slot aging The invention features a method and a system for selecting a slot within a memory unit, e.g., cache, for removal. The memory unit is accessible to a plurality of processors, and each slot in the memory unit has a corresponding entry in an age table. Each ... | 07/15/2003 |
| 6590579 | System for low miss rate replacement of texture cache lines A system and method is provided for mipmap texturing in which texture tiles are mapped into sets of a set-associative texture cache for use in displaying a graphic primitive. When a miss occurs, a new texture tile is called from main memory to replace a t... | 07/08/2003 |
| 6591346 | Mechanism for managing an object cache An improved mechanism for managing an object cache is disclosed. An object cache manager receives a request for an object resident in an object cache. A determination is made as to whether the requested object is currently within a particular portion of t... | 07/08/2003 |
| 6591347 | Dynamic replacement technique in a shared cache A dynamically configurable replacement technique in a unified or shared cache reduces domination by a particular functional unit or an application such as unified instruction/data caching by limiting the eviction ability to selected cache regions based on... | 07/08/2003 |
| 6587113 | Texture caching with change of update rules at line end A graphics processing unit in which the caching algorithm changes at the end of a line (or alternatively when the data from the beginning of the current line comes up for discard). This avoids the problem of continuous misses at the start of a new line, w... | 07/01/2003 |
| 6584547 | Shared cache structure for temporal and non-temporal instructions A method and system for providing cache memory management. The system comprises a main memory, a processor coupled to the main memory, and at least one cache memory coupled to the processor for caching of data. The at least one cache memory has at least t... | 06/24/2003 |
| 6584548 | Method and apparatus for invalidating data in a cache A data processing system comprising a cache memory, wherein a cache entry containing data is stored in the cache memory. A cache coordinator, wherein the cache coordinator invalidates one or more cache entries in response to a signal. An ID-based invalida... | 06/24/2003 |
| 6570573 | Method and apparatus for pre-fetching vertex buffers in a computer system According to one embodiment, a computer system includes a memory and a central processing unit (graphics accelerator) coupled to the memory. The graphics accelerator is adaptable to process three-dimensional (3D) graphics primitives stored in the memory a... | 05/27/2003 |
| 6532520 | Method and apparatus for allocating data and instructions within a shared cache A method and apparatus are provided for managing cache allocation for a plurality of data types in a unified cache having dynamically allocable lines for first type data and for second type data. Cache allocation is managed by counting misses to first typ... | 03/11/2003 |
| 6523091 | Multiple variable cache replacement policy A method for selecting a candidate to mark as overwritable in the event of a cache miss while attempting to avoid a write back operation. The method includes associating a set of data with the cache access request, each datum of the set is associated with... | 02/18/2003 |
| 6516388 | Method and apparatus for reducing cache pollution In a cache which writes new data over less recently used data, methods and apparatus which dispense with the convention of marking new cache data as most recently used. Instead, non-referenced data is marked as less recently used when it is written into a... | 02/04/2003 |
| 6510494 | Time based mechanism for cached speculative data deallocation A method of operating a processing unit of a computer system, by issuing an instruction having an explicit prefetch request directly from an instruction sequence unit to a prefetch unit of the processing unit. The invention applies to values that are eith... | 01/21/2003 |
| 6510493 | Method and apparatus for managing cache line replacement within a computer system A cache memory having a mechanism for managing cache lines replacement is disclosed. The cache memory comprises multiple cache lines partitioned into a first group and a second group. The number of cache lines in the second group is preferably larger than... | 01/21/2003 |
| 6505284 | File segment subsystem for a parallel processing database system A File SeGment (FSG) subsystem of a PDE (parallel database extension) provides services for managing and allocating secondary memory such as cache, providing data commits and retrieval operations on disk, and providing routines to perform disk I/O (Input/... | 01/07/2003 |
| 6499088 | Methods and apparatus for populating a network cache Methods and apparatus for populating a network cache are described. A router associated with the cache is enabled to compile flow data relating to object traffic. The flow data are analyzed to determine a first plurality of frequently requested objects. T... | 12/24/2002 |
| 6493801 | Adaptive dirty-block purging An adaptive cache coherent purging protocol includes recognizing system performance, especially latency, is affected by when cache is purged. The occurrence of performance enhancing and degrading events regarding a cache are counted and compared to a thre... | 12/10/2002 |
| 6493797 | Multi-tag system and method for cache read/write A method and device are provided for reading data from a trace cache in a manner that reduces the time and power consumed by such an operation. A mini-tag is provided for comparing to a requested address to reduce the amount of data that must be read. Min... | 12/10/2002 |
| 6490665 | Memory-access management method and system for synchronous random-access memory or the like A memory-access management method and system is provided for use with an SDRAM (Synchronous Dynamic Random-Access Memory) or the like, for the purpose of increasing the performance of memory access to the SDRAM by means of tracking the memory-access histo... | 12/03/2002 |
| 6490654 | Method and apparatus for replacing cache lines in a cache memory A cache memory replacement algorithm replaces cache lines based on the likelihood that cache lines will not be needed soon. A cache memory in accordance with the present invention includes a plurality of cache lines that are accessed associatively, with a... | 12/03/2002 |
| 6487638 | System and method for time weighted access frequency based caching for memory controllers A system and method for replacing cached data for a computer system utilizing one or more storage devices is disclosed. The storage devices are divided into a plurality of areas or bins. Each bin is preferably the same size. A Bin Access Table (BAT) is an... | 11/26/2002 |
| 6480834 | Method and apparatus for serving files from a mainframe to one or more clients A method and apparatus provides random access to mainframe files that are accessed using an operating system that does not provide random access. This allows a computer system such as a mainframe on which random access is not supported to act as a file se... | 11/12/2002 |
| 6470425 | Cache line replacement threshold based on sequential hits or misses A cache memory having a plurality of entries includes a hit/miss counter checks a cache hit or a cache miss on each of the plurality of entries, and a write controller which controls an inhibition of a replacement of each of the plurality of entries based... | 10/22/2002 |
| 6467025 | Cache memory system and method utilizing doubly-linked loop of cache lines and a single pointer to address a cache line in the doubly-linked loop An improved cache memory and method of operation thereof. The cache memory includes a doubly-linked loop of cache lines and a single pointer operable to address a cache line in the doubly-linked loop. In the cache memory, the pointer is preferably operabl... | 10/15/2002 |
| 6457105 | System and method for managing data in an asynchronous I/O cache memory The present invention is generally directed to a system and method for providing improved memory management in an asynchronous I/O cache memory. The method includes the steps of identifying a request for data from the system memory by a requesting device ... | 09/24/2002 |
| 6453386 | Method and system for performing variable aging to optimize a memory resource A method and system for performing aging of a memory in a computer system is disclosed. The memory contains a plurality of items. The method and system include purging the memory of a portion of the plurality of items each time an epoch equal to an aging ... | 09/17/2002 |
| 6453387 | Fully associative translation lookaside buffer (TLB) including a least recently used (LRU) stack and implementing an LRU replacement strategy A memory unit is presented employing a least recently used (LRU) replacement strategy. The memory unit may include a memory subunit for storing data items, circuitry coupled to the memory subunit for determining if the memory subunit contains a needed dat... | 09/17/2002 |
| 6449695 | Data cache using plural lists to indicate sequence of data storage A cache system controls the insertion and deletion of data items using a plurality of utilization lists. When a data item is stored within the data cache, a corresponding data pointer, or other indicator, is stored within the utilization list in a manner ... | 09/10/2002 |
