Class 711/104 - Solid-state random access memory (RAM)

Subclass of Class 711 - Electrical computers and digital processing systems: memory
Definition: Subject matter including apparatus or method for accessing
No. of patents: 761
Last issue date: 05/01/2012

«First «Previous1 2 3 4 5 6 7 8 9 10 11 Next»Last»

Number	Title	Issue Date
8171209	Write protection method and device for at least one random access memory device In a write protection method for at least one random access memory device, the inherent problems of such memory devices with regard to data integrity and security with respect to hacker attacks, such that they can also be used for secure archiving in particular of a...	05/01/2012
8145833	Compression solution for embedded devices and systems An embedded device is hibernated by storing state data of the embedded device to a non-volatile data storage medium, and powering off the embedded device. The embedded device is later woken up in response to the detection of a wakeup event from a wakeup source. The ...	03/27/2012
8131918	Method and terminal for demand paging at least one of code and data requiring real-time response A method and terminal for demand paging at least one of code and data requiring a real-time response is provided. The method includes splitting and compressing at least one of code and data requiring a real-time response to a size of a paging buffer and storing the ...	03/06/2012
8108450	Aggregation of write traffic to a data store A method and a processing device are provided for sequentially aggregating data to a write log included in a volume of a random-access medium. When data of a received write request is determined to be suitable for sequentially aggregating to a write log, the data ma...	01/31/2012
8086791	Solid state memory device with PCI controller A system interface controller for enabling a computing appliance to read and write data to a fixed or removable non-volatile memory device includes a peripheral component interface having one or more disk and or bus controller registers, a flash memory controller, a...	12/27/2011
8069303	Method and apparatus for controlling memory precharge operation A memory controller sequentially holds access requests including access addresses. A semiconductor memory includes a plurality of banks each having a plurality of pages. The memory controller decides page hit/page miss of the bank corresponding to each of the held a...	11/29/2011
8065475	Registered dual in-line memory module having an extended register feature set A registered dual in-line memory module is configured with multiple random access memory chips and a DRAM register configured to receive address and control signals from a memory controller. The DRAM register distributes the address and control signals to the random...	11/22/2011
8032694	Direct logical block addressing flash memory mass storage architecture A nonvolatile semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. Erase cycles are avoided by programming an alt...	10/04/2011
8032693	Serial in random out memory A serial in random out memory circuit has a number of memory cells integrated with write control circuitry for writing a sequence of data inputs to sequential locations in the memory cells. Read control circuitry is integrated to receive address signals from an exte...	10/04/2011
8028124	Fast processing memory array The illustrative embodiments described herein provide a computer implemented method, apparatus, and computer program product for increasing efficiency associated with data access. In one illustrative embodiment a memory chip is presented comprising of a plurality of...	09/27/2011
8024511	Systems, devices, and/or methods to access synchronous RAM in an asynchronous manner Certain exemplary embodiments can provide a method, which can comprise, via a state machine implemented as an application specific integrated circuit, responsive to an automatically detected asynchronous RAM interface signal, automatically transmitting a correspondi...	09/20/2011
8001320	Command interface for memory devices A method for operating a memory device that includes a plurality of analog memory cells includes accepting at an input of the memory device a self-contained command to perform a memory access operation on at least one of the memory cells. The command includes an ins...	08/16/2011
7987194	Targeting advertisements based on cached contents A request including a domain name is received. Content associated with the domain name is identified in a cache. A language preference is determined based on the identified content. A content item is selected based on the identified content and the determined langua...	07/26/2011
7953774	Aggregation of write traffic to a data store A method and a processing device are provided for sequentially aggregating data to a write log included in a volume of a random-access medium. When data of a received write request is determined to be suitable for sequentially aggregating to a write log, the data ma...	05/31/2011
7937524	Cache write integrity logging An apparatus, as well as systems, methods, and articles can operate to record the address of write operations to a memory cached by a non-volatile cache prior to executing an operating system cache driver. In an embodiment, a non-volatile cache may be implemented by...	05/03/2011
7925823	Reuse of functional data buffers for pattern buffers in XDR DRAM A mechanism is provided to reuse functional data buffers. With Extreme Data Rate (XDR™) Dynamic Random Access Memory (DRAM), test patterns are employed to dynamically calibrate data with the clock. To perform this task, data buffers are employed to store data and ...	04/12/2011
7873683	File system having transaction record coalescing An electronic data system comprises memory storage having stored data, file system software, and a transaction file. The transaction file is maintained by the file system software, and includes a plurality of transaction records corresponding to transactions that ha...	01/18/2011
7818496	Processor system management mode caching In some embodiments, an apparatus comprises one or more processors supporting a system management mode, system management memory, and software controllable caching of memory, one or more memory modules, a memory controller, and a communication bus to couple the one ...	10/19/2010
7793037	Partial page scheme for memory technologies Systems and methods of managing memory provide for detecting a request to activate a memory portion that is limited in size to a partial page size, where the partial page size is less than a full page size associated with the memory. In one embodiment, detecting the...	09/07/2010
7747814	Virtual machine state snapshots Saving state of Random Access Memory (RAM) in use by guest operating system software is accomplished using state saving software that starts a plurality of compression threads for compressing RAM data blocks used by the guest. Each compression thread determines a co...	06/29/2010
7721041	PSRAM and method for operating thereof Disclosed is a pseudo static random access memory (PSRAM) and a method for operating the same. The PSRAM includes a multi-bit control register and a multiplexer circuit operatively coupled to the multi-bit control register. The multi-bit control register has a first...	05/18/2010
7664907	Page stream sorter with dynamic binning Techniques and systems for dynamic binning, in which a stream of requests to access a memory is sorted into a reordered stream that enables efficient access of the memory. A page stream sorter can group requests to access a memory in a manner that results in some �...	02/16/2010
7660942	Daisy chainable self timed memory chip A memory chip suitable for use in a daisy chain of memory chips. Timing of an array on the memory chip is dynamically determined by circuitry on the memory chip that tracks an access timing of the array. The memory chip is configured to receive an address/command wo...	02/09/2010
7631139	System and method for persistent RAM disk The contents of a RAM disk are copied to an image file in nonvolatile memory on power-down and copied back on reboot to provide an appearance of persistence. A locking method can use in-use tables to limit access to the same blocks of data in a RAM disk. ...	12/08/2009
7594068	System and method for persistent RAM disk The contents of a RAM disk are copied to an image file in nonvolatile memory on power-down and copied back on reboot to provide an appearance of persistence. A locking method can use in-use tables to limit access to the same blocks of data in a RAM disk. ...	09/22/2009
7546410	Self timed memory chip having an apportionable data bus A self timed memory chip having an apportionable data bus. Access timing to an array on the memory chip is dynamically determined by circuitry on the memory chip. A ring oscillator on the memory chip has a frequency that is indicative of how fast an array on the mem...	06/09/2009
7519766	Method and device for transmission of adjustment information for data interface drivers for a RAM module A method and a device are described for transmission of control information for the adjustment of operating parameters of drivers in the data interface of a RAM module by means of a controller, with control bits for adjustment purposes being sent during an adjustmen...	04/14/2009
7509451	Method and circuit for updating a software register in semiconductor memory device A method and circuit for updating a software register is disclosed, wherein the software register is updated using data received through a data I/O pad, and the updated data is read and transferred to the outside through the data I/O pad. The disclosed method of upd...	03/24/2009
7506099	Semiconductor storage apparatus A semiconductor storage apparatus comprising: a ferroelectric memory; an SRAM 30; a counter 41; a CAM 10 that judges whether or not a block of data requested to be read out from the ferroelectric memory is stored in the SRAM 30; a storage...	03/17/2009
7475186	System and method for persistent RAM disk The contents of a RAM disk are copied to an image file in nonvolatile memory on power-down and copied back on reboot to provide an appearance of persistence. A locking method can use in-use tables to limit access to the same blocks of data in a RAM disk. ...	01/06/2009
7475187	High-speed interface circuit for semiconductor memory chips and memory system including the same In a semiconductor memory system, the memory chips are linked to a memory module in a shared loop forward architecture and connected in a point-to-point connection to a memory controller. Each memory chip includes a high-speed interface circuit including: a read and...	01/06/2009
7472221	Mirrored memory Accessing data memory includes writing data to a first memory location and to a second memory location in response to a request to write data to a memory address that corresponds to both locations, where the first and second memory locations are mirrored, in respons...	12/30/2008
7444456	SRAM bus architecture and interconnect to an FPGA An SRAM bus architecture includes pass-through interconnect conductors. Each of the pass-through interconnect conductors is connected to routing channels of the general interconnect architecture of the FPGA through an element which includes a pass transistor connect...	10/28/2008
7441073	System for indicating a plug position for a memory module in a memory system A memory system including a first and second of set of socket pads adapted for connection to memory module continuity pins. The memory system also includes a first indicator corresponding to the first set of socket pads. The memory system also includes a second indi...	10/21/2008
7426607	Memory system and method of operating memory system A random access memory system has a memory controller, a first memory device, a second memory device, and a memory bus. The memory controller is configured to control access to a plurality of memory devices. The memory bus is configured to alternatively couple the m...	09/16/2008
7418566	Memory arrangement and method for reading from a memory arrangement A memory arrangement is provided, which has a programmable memory and a first buffer memory associated with the programmable memory, to which buffer memory, in the case of a command access, at least one command following the accessed command is written. A second buf...	08/26/2008
7415590	Integrated circuit having a memory cell array capable of simultaneously performing a data read operation and a data write operation An integrated circuit comprising a memory cell array capable of simultaneously performing data read and write operations is provided. The integrated circuit to which inputs and outputs (IOs) are separately provided and to which a write address and a read address are...	08/19/2008
7414875	Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules A layout for simultaneously sub-accessible memory modules is disclosed. In one embodiment, a memory module includes a printed circuit board having a plurality of sectors, each sector being electrically isolated from the other sectors and having a multi-layer structu...	08/19/2008
7412575	Data management technique for improving data reliability A method for managing data stored in a non-volatile memory having a plurality of memory blocks includes, first, determining if an error occurs in the read data in a selected memory block. If an error occurs in the read data in the selected memory block, then a regio...	08/12/2008
7409488	Data processing system A data processing system comprises a local probe storage array having a plurality of sensors for reading data from a storage surface. A plurality of data processing elements are mounted on the storage array. Each data processing element is connected to different sen...	08/05/2008

«First «Previous1 2 3 4 5 6 7 8 9 10 11 Next»Last»

PatentStorm

Did You Know...

PatentStorm News

Class 711/104 - Solid-state random access memory (RAM)