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| Number | Title | Issue Date |
| 8024507 | Transaction-safe FAT file system improvements Concepts for enhancing operation of transaction-safe file allocation table systems are described. The concepts include writing a file to non-volatile memory media and rendering an update of file size to the TFAT storage medium; and receiving a request to locate data... | 09/20/2011 |
| 7925819 | Non-volatile memory storage system and method for reading an expansion read only memory image thereof A non-volatile memory storage system including a connecting interface, a non-volatile memory, a buffer memory, a microcontroller, and a virtual host module is provided. The connecting interface is used for connecting to a host. The non-volatile memory is used for st... | 04/12/2011 |
| 7895391 | Method for recording information on a record medium, record medium containing information, and method and device for reading information from a record medium A method for writing an audio/video information stream to an optical disc, and for reading the information from disc. The information stream includes alternative video parts which are recorded in an interleaved manner; an interleaved unit includes angle blocks, each... | 02/22/2011 |
| 7797478 | Data storage apparatus that appropriately revises FDCB information during background formatting A data storage apparatus, including a controller that formats a rewritable recording medium in the background, interrupts the background formatting when a host computer requests to store data in the rewritable recording medium, stores the data in the rewritable reco... | 09/14/2010 |
| 7725643 | Methods and systems for detecting and avoiding an address dependency between tasks Methods, systems, and articles of manufacture consistent with the present invention provide a optimization tool for avoiding an address dependency between tasks in a program. The tool determines whether two or more tasks of the program are dependent on at least one ... | 05/25/2010 |
| 7716412 | Data storage apparatus and data access method for controlling address information for data writing using a free area control table A data storage apparatus is provided. The data storage apparatus includes: a storage unit managed using a logical block address; a memory; a storage control unit for storing in the storage unit a free area control table transmitted from the host apparatus in which i... | 05/11/2010 |
| 7644223 | Circuit and method for patching for program ROM This invention discloses a system comprising a first comparator circuit configured to assert a first control signal in response to a first input number matching one of a first numbers stored therein, a second comparator circuit configured to assert a second control ... | 01/05/2010 |
| 7613869 | Long-term digital data storage Embodiments are directed to recording digital data on an optically ablatable digital storage media. In one embodiment, a device configured to ablate portions of ablatable material on an optically ablatable digital storage media receives digital data that is to be re... | 11/03/2009 |
| 7584322 | Method for storing and/or changing state-information of a memory as well as integrated circuit and data carrier In a method for storing and/or changing state information in a memory (2) containing a plurality of memory cells (3), wherein the memory cells (3) assume an irreversible memory state as a result of a programming step, wherein the state informati... | 09/01/2009 |
| 7496708 | Boot read-only memory (ROM) configuration optimization Embodiments of the invention address deficiencies of the art in respect to boot ROM handling and provide a method, system and computer program product for optimized boot ROM handling for I/O devices. In one embodiment of the invention, a ROM scan area optimization m... | 02/24/2009 |
| 7454557 | System and method for booting from a non-volatile application and file storage device A system for booting a microprocessor controlled system wherein a basic interface between the processor and peripheral devices is stored and retrieved from the general purpose application and file storage device. ... | 11/18/2008 |
| 7434111 | Non-volatile memory system having a pseudo pass function A non-volatile memory system comprises a non-volatile memory and a memory controller controlling the non-volatile memory. The non-volatile memory has a pseudo pass function of returning a pass as a status even if a bit error reaching allowable number of bits occurs ... | 10/07/2008 |
| 7426607 | Memory system and method of operating memory system A random access memory system has a memory controller, a first memory device, a second memory device, and a memory bus. The memory controller is configured to control access to a plurality of memory devices. The memory bus is configured to alternatively couple the m... | 09/16/2008 |
| 7424570 | Method for patching ROM instructions in an electronic embedded system including at least a further memory portion A mechanism for patching read only memory (ROM) instructions in an embedded system is provided. The embedded system includes non-volatile memory such as a ROM, a RAM and an EEPROM. In one configuration, the ROM contains application modules (subroutines) that are sub... | 09/09/2008 |
| 7409491 | System memory board subsystem using DRAM with stacked dedicated high speed point to point links A memory system comprising memory modules including memory chips stacked with switching circuits. A memory controller coupled to the memory modules is configured to initiate memory accesses. When a stacked switching circuit detects the memory access, the switching c... | 08/05/2008 |
| 7404030 | Method of controlling a non-volatile memory device in which a data erase block is larger than a data write block According to exemplary embodiments, there is provided an information storage apparatus having a non-volatile memory device in which a data erase block is larger than a data write block, the apparatus includes an erase device to effect erase in the non-volatile memor... | 07/22/2008 |
| 7373491 | Processor with versatile external memory interface A processor architecture suitable for embedded systems and compatible with different kinds of external memory, executes a bootstrap program to determine the characteristics of the external memory before connection with the external memory. For this purpose, system s... | 05/13/2008 |
| 7369851 | Communications network capable of determining SIM card changes in electronic devices A communication network comprising a carrier network with a service coordinator is capable of acting upon SIM card change information detected by an agent located in the electronic devices used in the communication network. In general, the agent in electronic device... | 05/06/2008 |
| 7366125 | Extensible satellite communication system A satellite network [100] includes backbone satellites [110]. The backbone satellites [110] act as routers for data units transmitted through network [100]. The backbone satellites [110] communicate with one another through inter-s... | 04/29/2008 |
| 7367027 | System for generating efficient and compact update packages A system for generating efficient and compact update packages makes it possible to process a source binary image of software/firmware for an electronic device and a target binary image in order to generate a compact update package. It generates bubbles information t... | 04/29/2008 |
| 7363530 | Data recording method and data recording apparatus The latest management data recorded in a recording medium is read. Then, it is judged whether the fault is in this latest management data or not. When it is judged the fault is not in this latest management data, a data size of user data under the management of this... | 04/22/2008 |
| 7363405 | Communication control apparatus and method An initiator has logical devices A, B and C. In the directory structure of the config ROM showing the unit structure, instance directories A, B and C are made; initiator unit directories 1, 2, and 3 are made under the respective instance directories A,... | 04/22/2008 |
| 7356727 | Electronic device employing efficient fault tolerance Disclosed herein is an electronic device capable of providing efficient fault-tolerance update processes by employing a backup memory block used in conjunction with a block-by-block update process, wherein the backup memory block may be employed to store backup cont... | 04/08/2008 |
| 7352708 | Method and apparatus for border node behavior on a full-duplex bus A method and apparatus relating to the behavior of border nodes within a high performance serial bus system is disclosed. A method for determining and communicating the existence of a hybrid bus is disclosed. A method for determining a path to a senior border... | 04/01/2008 |
| 7353322 | System and method for providing dynamic configuration ROM using double image buffers A dynamic configuration ROM which may be updated while linked to the serial bus and with little or no risk of publishing inconsistent configuration ROM information to the other nodes on the bus. The dynamic configuration ROM comprises first and second configuration ... | 04/01/2008 |
| 7353284 | Synchronized transmission of audio and video data from a computer to a client via an interface A method for controlling data transmission between a computer and a video client via an interface, the method comprising: the computer polling the interface a first time to determine the size of the buffer on the interface; receiving a first buffer size value from t... | 04/01/2008 |
| 7347570 | Multimedia presentation apparatus and method A multimedia presentation apparatus and method by which a presenter is freed from the requirement of having or providing or transporting a supporting computer system such as the notebook or laptop system by the incorporation of computing capability and an accessible... | 03/25/2008 |
| 7350089 | System for memory hot swap A system may include a motherboard, a chipset coupled to the motherboard, a memory module mount coupled to the chipset, a power transistor electrically coupled to the memory module mount, a voltage regulator to provide power to the power transistor, and an I/O expan... | 03/25/2008 |
| 7345944 | Programmable detection of power failure in an integrated circuit A programmable power-failure-detection circuit in an integrated circuit is provided that permits programmable selection of operating modes that either monitor a power supply of the integrated circuit or provide reduced power consumption from the power supply by disa... | 03/18/2008 |
| 7346730 | Mobile electronic device In a memory, first and second data areas are set as an area which stores one data item and a management area which stores determination information used to determine which one of the first and second data areas stores the newest data is additionally set. In the proc... | 03/18/2008 |
| 7339300 | Structural support member for stator retention and method of assembling an electromechanical transmission An electromechanical transmission includes a motor/generator having a stator and a rotor and including a structural support member that supports the stator in fixed relation thereto and the rotor in rotational relation thereto. By supporting both the stator and the ... | 03/04/2008 |
| 7340736 | Electronic device with an update agent that employs preprocessing techniques for update Methods of updating an electronic device having an update agent employing preprocessing techniques is disclosed. The methods described permit an electronic device having a non-volatile memory to update a plurality banks in an efficient manner, by preprocessing the o... | 03/04/2008 |
| 7336516 | Unified multilevel memory systems and methods A Unified Memory may store multiple types of content such as data or fast code or slow code. The data or code may be stored in separate arrays or in a common array. In an array, a tag bit may indicate the type of content such as data or fast code or slow code or sin... | 02/26/2008 |
| 7337282 | Memory system and process for controlling a memory component to achieve different kinds of memory characteristics on one and the same memory component According to the invention, a memory system, and a process for controlling a memory component, to achieve different kinds of memory characteristics on one and the same memory component, is provided, the process comprising the steps: | 02/26/2008 |
| 7334079 | Worm providing storage system A method for operating a storage system configured to provide a Write Once and Read Many (WORM) function includes receiving a first command at a storage subsystem from a host. At least a portion of the first command is stored on a WORM storage device coupled to the ... | 02/19/2008 |
| 7333232 | Image processing apparatus having a function to receive control programs transferred from external device An image processing apparatus avoids abnormal control on loads including an optional device and enables only program transfer when transfer of a control program from an external device is not normally proceeding. Through a communication interface, the control progra... | 02/19/2008 |
| 7328301 | Dynamically mapping block-alterable memories In one embodiment, the present invention includes a method for reassigning a first address of a block-alterable memory to a second address of the block-alterable memory, where the second address corresponds to an updated available block. In such manner block-alterab... | 02/05/2008 |
| 7321959 | Control method of a non-volatile memory apparatus A control method of a non-volatile memory apparatus, which can execute data writing normally after the next startup even when a process is interrupted because of the occurrences of abnormal conditions such as power shut down during data writing or data erasing is pr... | 01/22/2008 |
| 7317694 | Method and apparatus for border node behavior on a full-duplex bus A method is disclosed for determining and communicating the existence of a hybrid bus. The method comprises the acts of determining whether the node has a connection to a Legacy link layer; if the node determines that it has a connection to a Legacy link layer, then... | 01/08/2008 |
| 7315917 | Scheduling of housekeeping operations in flash memory systems A re-programmable non-volatile memory system, such as a flash EEPROM system, having its memory cells grouped into blocks of cells that are simultaneously erasable is operated to perform memory system housekeeping operations in the foreground during execution of a ho... | 01/01/2008 |
