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| Number | Title | Issue Date |
| 8117360 | On-vehicle electronic control device An on-vehicle electronic control device 100A serially transmits A/D conversion data of plural channels from a second control circuit unit 300A including a multichannel A/D converter 204A to a microprocessor 110A disposed in a first contro... | 02/14/2012 |
| 7953909 | Storage system comprising power saving function A storage system constituted such that power saving to an administrator-desired storage device can be performed from a management device. That is, the storage system comprises a power-saving indication receiving section for receiving from a management console a powe... | 05/31/2011 |
| 7953908 | High throughput pipelined data path Methods and apparatus to provide a high throughput pipelined data path are described. In one embodiment, an apparatus may include three stages to process inbound data packets, e.g., to align one or more bits of data. Other embodiments are also described. ... | 05/31/2011 |
| 7895375 | Data transfer apparatus and data transfer method A Direct Memory Access (DMA) controller issues a read request to read data stored in a cache memory and sends a cache controller the read request via a bridge chip. When a response time monitored by a response time monitor exceeds a predetermined time, a status info... | 02/22/2011 |
| 7831750 | Method, apparatus and software for processing input or output requests for a mirrored storage volume A method, apparatus and software is disclosed for processing input/output (I/O) requests for a mirrored storage volume in recovery mode in which the processing of normal I/O is optimised using the recovery map for the volume. ... | 11/09/2010 |
| 7822892 | Managing the copying of writes from primary storages to secondary storages across different networks Provided are a method, system, and article of manufacture for managing the copying of writes from primary storages to secondary storages across different networks. Information is maintained on a first group of at least one primary storage, at least one primary devic... | 10/26/2010 |
| 7818479 | Interface apparatus and packet transfer method A device interface circuit unit transfers a command and data in packet format between the unit and the host. A transport layer is provided with a receive FIFO, a command detection circuit and a send FIFO, and an application layer is provided with a receive task file... | 10/19/2010 |
| 7403957 | Image forming apparatus having control codes and rewrite control method for the same In an image forming apparatus for forming an image in accordance with control codes stored in a plurality of memory media, when the control codes stored in the plurality of memory media to control the image forming apparatus is rewritten, rewrite execution codes ada... | 07/22/2008 |
| 7379418 | Method for ensuring system serialization (quiesce) in a multi-processor environment A method of ensuring system serialization in a multiprocessor multi-nodal environment is used to force all processors in a multiprocessor environment to temporarily suspend operations while one processor changes the system state. Architected designs where latencies ... | 05/27/2008 |
| 7376793 | Cache coherence protocol with speculative writestream A system and method for performing speculative writestream transactions in a computing system. A computing system including a plurality of subsystems has a requesting subsystem configured to initiate a writestream ordered (WSO) transaction to perform a write operati... | 05/20/2008 |
| 7373448 | Method, system, and program for building a queue to test a device Provided are a method, system, and device for signaling a reconnection inhibitor over a bus to cause the reconnection inhibitor to access the bus to inhibit an Input/Output (I/O) controller from accessing the bus. An initiator transmits I/O requests on the bus to th... | 05/13/2008 |
| 7366805 | Data transfer control system, electronic instrument, program, and data transfer control method A data transfer control system includes a buffer controller that controls access to a data buffer and a transfer controller that controls data transfer between a PC connected to a BUS1 and the logical units LUN1 and LUN2 connected to a BUS2 | 04/29/2008 |
| 7343451 | Disk array device and remote copying control method for disk array device Various types of resources of the disk array device are divided for respective users and communications resources used in remote copying are appropriately assigned to the users so that functional interference between the split units is prevented and stable remote co... | 03/11/2008 |
| 7340621 | Power conservation techniques for a digital computer A computer capable of playing real time applications includes a processing circuit configured to operate in a first power state, a second power state, and a third power state where the processing circuit consumes less power in the second state than in the first stat... | 03/04/2008 |
| 7321945 | Interrupt control device sending data to a processor at an optimized time An interrupt control device for issuing interrupts to a central processing unit (CPU) includes an object acquiring unit for acquiring data or resource(s) for use by the CPU and an interrupt issuing unit for issuing interrupts to the CPU. The interrupt issuing unit i... | 01/22/2008 |
| 7305358 | Computing method for accounting The present invention provides a computing method for accounting, comprising: (a) the first step of installing and storing spreadsheet software capable of creating accounting screens each of which is a matrix of cells including input setting cells and output display... | 12/04/2007 |
| 7290065 | Method, system and product for serializing hardware reset requests in a software communication request queue A system, method, and product are disclosed in a data processing system for serializing hardware reset requests in a software communication request queue in a processor card. The processor card processes software communication requests utilizing the queue in a seria... | 10/30/2007 |
| 7287107 | Method and apparatus for passive PCI throttling in a remote server management controller The disclosed embodiments relate generally to remote server management technology. More particularly, the embodiments relate to improving the ability of remote server management tools to snoop large amounts of data, including graphical video data, from a communicati... | 10/23/2007 |
| 7281140 | Digital throttle for multiple operating points A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline. The monitored activity is scaled according to the current operating point of the processor and a power state is determined from the sc... | 10/09/2007 |
| 7266708 | System for idling a processor pipeline wherein the fetch stage comprises a multiplexer for outputting NOP that forwards an idle signal through the pipeline A processor disclosed herein comprises a clock configured to drive clock signals and a processor pipeline having a plurality of stages. The processor includes processor idling circuitry, which is configured within the stages and is responsive to an idle_request sign... | 09/04/2007 |
| 7206873 | Throughput optimization by activation of selected parallel channels in a multichannel tape drive The present invention describes a method and system for adjusting the rate of data transfer between a high-speed multi-channel tape drive and a slower-capability network interface. The present invention allows for selectively enabling/disabling active channels to ad... | 04/17/2007 |
| 7194562 | Method, system, and program for throttling data transfer Disclosed is a technique for throttling data transfer. An amount of resources that are in use is determined. When the amount of resources reaches a high threshold, one or more primary control units are notified to temporarily stop sending data. When the amount of re... | 03/20/2007 |
| 7184379 | Optical disk recording/reproducing method and apparatus in which recording properties of the disk are detected when recording speed is changed An operation for recording a recording signal onto a disk (1) is interrupted, when an amount of signal data stored in a buffer RAM (11) for temporarily storing the recording signal is less than an interruption setting value during performing of the rec... | 02/27/2007 |
| 7167934 | Peripheral device data transfer protocol A client driver requests data packet transfers from a peripheral device through a protocol stack and a host controller. The protocol stack receives the data transfer request and allocates the request into the host controller schedule. The host controller schedule re... | 01/23/2007 |
| 7167427 | Data recorder A data recorder for recording data that prevents buffer overrun errors emits a laser beam against a recording medium to record data. The data has a level that determines the power of the laser beam. When there is a possibility of a buffer overrun, data recording is ... | 01/23/2007 |
| 7136944 | Method and apparatus for using address traps to pace writes to peripheral devices A system and method for pacing writes to a legacy peripheral device includes a control block configured to trap on the address of the legacy peripheral device and slows the rate that the CPU posts writes to avoid backpressure. ... | 11/14/2006 |
| 7120710 | Controller for data recorder A controller for a data recorder controls data recording to prevent buffer overrun errors. The data recorder emits a laser beam against a recording medium to record data. The data has a level that determines the power of the laser beam. When there is a possibility o... | 10/10/2006 |
| 7106675 | Data recorder A data recorder for writing data to a recording medium that prevents buffer underrun errors. An optical head generates a laser beam at a high power level when writing data on the recording medium and at a low power level when reading data from the medium. The writin... | 09/12/2006 |
| 7103764 | Parallel port with direct memory access capabilities The parallel or printer port in a personal computer can receive data from the memory under the control of the direct memory access (DMA) controller, releasing processor resources. The processor enables the parallel port, which then indicates to the DMA controller th... | 09/05/2006 |
| 7099978 | Method and system of completing pending I/O device reads in a multiple-processor computer system A method and system for completing pending I/O device reads by periodically stalling the issuance of I/O device accesses by a program in a multiple-processor computer system. ... | 08/29/2006 |
| 7099246 | Method and apparatus for recording data on an optical disc with restarting writing of data after data recording interruption A data recording equipment that accurately restarts the writing of data to an optical disc after data recording is interrupted. The equipment interrupts recording when detecting an external shock or when predicting the occurrence of a buffer underrun error. The equi... | 08/29/2006 |
| 7089257 | Method and system for providing a unified data exchange and storage format A method and system is presented that provides for a unified format for both data exchange and data storage protocols in a network. The unified data format provides for an efficient protocol for receiving, parsing, decoding, and storing varying sizes of real-time da... | 08/08/2006 |
| 7076545 | Load balancing the servicing of received packets A system and method for distributing a portion of the processing of a received packet among a plurality of service threads. When an ISR or similar process retrieves a packet from a communication interface via a receive descriptor ring, it places the packet on one of... | 07/11/2006 |
| 7075546 | Intelligent wait methodology A central processing unit (CPU) configured to apply an intelligent wait methodology is provided. The CPU includes a chip select module that defines a chip select signal associated with an external device. The chip select module includes an address space configured t... | 07/11/2006 |
| 7072615 | Automatic installation process for wireless communication system A method of inserting a communications module (6) into a wireless communication system (1) comprising at least one control module (2) and a plurality of communications modules (3, 4, 5) is disclosed. The system (1) is adapted to tr... | 07/04/2006 |
| 7047402 | Process for booting and causing completion of synchronization based on multiple actuations of designated key when the system is off A Computer based on a dual processing structure, with a main processing subsystem associated to an alternate processing subsystem. The main subsystem includes a main processor, a keyboard and a display, and the alternate processing subsystem has a quicker response t... | 05/16/2006 |
| 7047330 | System for digital stream transmission and method thereof A system and methods are shown for generating a transport stream. An application reads a transport stream file stored in memory. The application provides access to the transport stream file to a graphics card using a multimedia peripheral port (MPP). The MPP is used... | 05/16/2006 |
| 7016984 | System controller using plural CPU's In a system controller in which a plurality of CPUs connected through a shared bus are connected to a plurality of memory units or IO devices through a bus for separate transfer of a read instruction from a read data return, a CPU which has issued a new instruction ... | 03/21/2006 |
| 7017007 | Disk array device and remote copying control method for disk array device Various types of resources of the disk array device are divided for respective users and communications resources used in remote copying are appropriately assigned to the users so that functional interference between the split units is prevented and stable remote co... | 03/21/2006 |
| 6992957 | Controller of data recorder A controller of a data recorder that records data on a recording medium such that the occurrence of buffer underrun errors are prevented. Data encoded by an encoder is recorded on the recording medium. A decoder decodes the data recorded on the recording medium. The... | 01/31/2006 |
